diff --git a/data/registers/sysctl_v53.yaml b/data/registers/sysctl_v53.yaml
index 11b0b85..8ffbc6c 100644
--- a/data/registers/sysctl_v53.yaml
+++ b/data/registers/sysctl_v53.yaml
@@ -313,6 +313,7 @@ fieldset/CLOCK_CPU:
       description: current mux in clock component 0:osc0_clk0 1:pll0_clk0 2:pll0_clk1 3:pll0_clk2 4:pll1_clk0 5:pll1_clk1 6:pll1_clk2 7:pll1_clk3.
       bit_offset: 8
       bit_size: 3
+      enum: CLOCK_MUX
     - name: SUB0_DIV
       description: "ahb bus divider, the bus clock is generated by cpu_clock/div 0: divider by 1 1: divider by 2 …."
       bit_offset: 16
diff --git a/data/registers/sysctl_v62.yaml b/data/registers/sysctl_v62.yaml
index c19d8cc..03b5d23 100644
--- a/data/registers/sysctl_v62.yaml
+++ b/data/registers/sysctl_v62.yaml
@@ -335,6 +335,7 @@ fieldset/CLOCK_CPU:
       description: current mux in clock component 0:osc0_clk0 1:pll0_clk0 2:pll0_clk1 3:pll0_clk2 4:pll1_clk0 5:pll1_clk1 6:pll2_clk0 7:pll2_clk1.
       bit_offset: 8
       bit_size: 3
+      enum: CLOCK_MUX
     - name: SUB0_DIV
       description: "axi bus divider, the bus clock is generated by cpu_clock/div 0: divider by 1 1: divider by 2 …."
       bit_offset: 16
diff --git a/data/registers/sysctl_v63.yaml b/data/registers/sysctl_v63.yaml
index 320ed97..7780ade 100644
--- a/data/registers/sysctl_v63.yaml
+++ b/data/registers/sysctl_v63.yaml
@@ -316,6 +316,7 @@ fieldset/CLOCK_CPU:
       description: current mux in clock component 0:osc0_clk0 1:pll0_clk0 2:pll0_clk1 3:pll0_clk2 4:pll1_clk0 5:pll1_clk1 6:pll2_clk0 7:pll2_clk1.
       bit_offset: 8
       bit_size: 4
+      enum: CLOCK_MUX
     - name: SUB0_DIV
       description: "axi bus divider, the bus clock is generated by cpu_clock/div 0: divider by 1 1: divider by 2 …."
       bit_offset: 16