From 7b80c1ba4cf9bfec4212da941f851f833e33f6dd Mon Sep 17 00:00:00 2001 From: Andelf Date: Fri, 28 Jun 2024 00:26:52 +0800 Subject: [PATCH] enhance: gpiom enum --- data/registers/gpiom_v63.yaml | 11 +++++++++++ data/registers/gpiom_v67.yaml | 17 +++++++++++++++++ data/registers/gpiom_v68.yaml | 11 +++++++++++ 3 files changed, 39 insertions(+) diff --git a/data/registers/gpiom_v63.yaml b/data/registers/gpiom_v63.yaml index 9625b66..5158326 100644 --- a/data/registers/gpiom_v63.yaml +++ b/data/registers/gpiom_v63.yaml @@ -25,6 +25,7 @@ fieldset/PIN: description: "select which gpio controls chip pin, 0: soc gpio0; 1: cpu0 fastgpio." bit_offset: 0 bit_size: 1 + enum: PIN_SELECT - name: HIDE description: "pin value visibility to gpios, bit0: 1, invisible to soc gpio0; 0: visible to soc gpio0 bit1: 1, invisible to cpu0 fast gpio; 0: visible to cpu0 fast gpio." bit_offset: 8 @@ -33,3 +34,13 @@ fieldset/PIN: description: "lock fields in this register, lock can only be cleared by soc reset 0: fields can be changed 1: fields locked to current value, not changeable." bit_offset: 31 bit_size: 1 +enum/PIN_SELECT: + description: select which gpio controls chip pin + bit_size: 1 + variants: + - name: GPIO0 + description: soc gpio0 + value: 0 + - name: CPU0_FGPIO + description: cpu0 fastgpio + value: 1 diff --git a/data/registers/gpiom_v67.yaml b/data/registers/gpiom_v67.yaml index 4fcf83f..ff5caf2 100644 --- a/data/registers/gpiom_v67.yaml +++ b/data/registers/gpiom_v67.yaml @@ -25,6 +25,7 @@ fieldset/PIN: description: "select which gpio controls chip pin, 0: soc gpio0; 1: soc gpio1; 2: cpu0 fastgpio 3: cpu1 fast gpio." bit_offset: 0 bit_size: 2 + enum: PIN_SELECT - name: HIDE description: "pin value visibility to gpios, bit0: 1, invisible to soc gpio0; 0: visible to soc gpio0 bit1: 1, invisible to soc gpio1; 0: visible to soc gpio1 bit2: 1, invisible to cpu0 fast gpio; 0: visible to cpu0 fast gpio bit3: 1, invisible to cpu1 fast gpio; 0: visible to cpu1 fast gpio." bit_offset: 8 @@ -33,3 +34,19 @@ fieldset/PIN: description: "lock fields in this register, lock can only be cleared by soc reset 0: fields can be changed 1: fields locked to current value, not changeable." bit_offset: 31 bit_size: 1 +enum/PIN_SELECT: + description: select which gpio controls chip pin + bit_size: 2 + variants: + - name: GPIO0 + description: soc gpio0 + value: 0 + - name: GPIO1 + description: soc gpio1 + value: 1 + - name: CPU0_FGPIO + description: cpu0 fastgpio + value: 2 + - name: CPU1_FGPIO + description: cpu1 fast gpio + value: 3 diff --git a/data/registers/gpiom_v68.yaml b/data/registers/gpiom_v68.yaml index 47a6220..a700c3a 100644 --- a/data/registers/gpiom_v68.yaml +++ b/data/registers/gpiom_v68.yaml @@ -25,6 +25,7 @@ fieldset/PIN: description: "select which gpio controls chip pin, 0: soc gpio0; 2: cpu0 fastgpio." bit_offset: 0 bit_size: 2 + enum: PIN_SELECT - name: HIDE description: "pin value visibility to gpios, bit0: 1, invisible to soc gpio0; 0: visible to soc gpio0 bit1: 1, invisible to cpu0 fast gpio; 0: visible to cpu0 fast gpio." bit_offset: 8 @@ -33,3 +34,13 @@ fieldset/PIN: description: "lock fields in this register, lock can only be cleared by soc reset 0: fields can be changed 1: fields locked to current value, not changeable." bit_offset: 31 bit_size: 1 +enum/PIN_SELECT: + description: select which gpio controls chip pin + bit_size: 2 + variants: + - name: GPIO0 + description: soc gpio0 + value: 0 + - name: CPU0_FGPIO + description: cpu0 fastgpio + value: 2