From 259532ea69d740fc409322d2468620494775237c Mon Sep 17 00:00:00 2001 From: Svyatoslav Date: Sun, 24 Jan 2021 18:07:31 +0200 Subject: [PATCH 1/6] tf201-dts: squash with bringup --- arch/arm/boot/dts/tegra30-asus-tf201.dts | 79 ++++--- .../dts/tegra30-asus-transformer-common.dtsi | 195 ++++++++++-------- 2 files changed, 145 insertions(+), 129 deletions(-) diff --git a/arch/arm/boot/dts/tegra30-asus-tf201.dts b/arch/arm/boot/dts/tegra30-asus-tf201.dts index 632a4707a51d1..5665f3b00e662 100644 --- a/arch/arm/boot/dts/tegra30-asus-tf201.dts +++ b/arch/arm/boot/dts/tegra30-asus-tf201.dts @@ -23,17 +23,6 @@ }; }; }; - - hdmi: hdmi@54280000 { - status = "okay"; - - hdmi-supply = <&hdmi_5v0_sys>; - pll-supply = <&vdd_1v8>; - vdd-supply = <&vdd_3v3_sys>; - - nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>; - nvidia,ddc-i2c-bus = <&hdmi_ddc>; - }; }; pinmux@70000868 { @@ -67,6 +56,20 @@ nvidia,tristate = ; nvidia,enable-input = ; }; + gmi_cs4_n_pk2 { + nvidia,pins = "gmi_cs4_n_pk2"; + nvidia,function = "gmi"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + cam_mclk_pcc0 { + nvidia,pins = "cam_mclk_pcc0"; + nvidia,function = "vi_alt3"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; }; }; @@ -102,18 +105,19 @@ reset-gpios = <&gpio TEGRA_GPIO(BB, 0) GPIO_ACTIVE_LOW>; // cam_sensor_rst_lo, out, lo }; - front_camera: camera@48 { - compatible = "aptina,mi1040"; + /* Front camera Aptina MI1040 image processor */ + front_camera: camera-sensor@48 { + compatible = "ovti,ov2710"; reg = <0x48>; - clocks = <>; // <&tegra_car TEGRA30_CLK_PLL_A>; CAM_MCLK + clocks = <&tegra_car TEGRA30_CLK_PLL_A>; clock-names = "extclk"; - vddio-suppy = <&vdd_1v8>; - vdda-suppy = <&vdd_3v3_sys>; // 2.85V? - vddc-supply = <&cam_vddc>; // PWR_DN - reset-gpios = <&gpio TEGRA_GPIO(O, 0) GPIO_ACTIVE_LOW>; + + DOVDD-supply = <&vddio_1v8_cam>; + DVDD-supply = <&vdd_2v85_cam2>; + // AVDD-supply = <&cam_vddc>; /* Analog regulator line should be here */ }; gyroscope@68 { @@ -124,9 +128,9 @@ /* External I2C interface */ i2c-gate { accelerometer@f { - mount-matrix = "-1", "0", "0", - "0", "1", "0", - "0", "0", "-1"; + mount-matrix = "1", "0", "0", + "0", "-1", "0", + "0", "0", "1"; }; }; }; @@ -137,11 +141,19 @@ rt5631: audio-codec@1a { compatible = "realtek,rt5631"; reg = <0x1a>; - - realtek,times-of-bclk = <64>; }; }; + usb-phy@7d000000 { + /delete-property/ nvidia,xcvr-setup-use-fuses; + nvidia,xcvr-setup = <5>; /* Based on TF201 fuse value - 48 */ + }; + + usb-phy@7d008000 { + /delete-property/ nvidia,xcvr-setup-use-fuses; + nvidia,xcvr-setup = <5>; /* Based on TF201 fuse value - 48 */ + }; + /* HannStar HSD101PWW2 Rev0-A00/A01 LCD SuperIPS+ HD panel */ display-panel { compatible = "panel-lvds"; @@ -149,10 +161,6 @@ power-supply = <&vdd_pnl>; backlight = <&backlight_lvds>; - /* - * The hsd101pww2 panel has same properties as hsd070pww1, - * only difference is physical size. - */ width-mm = <217>; height-mm = <136>; @@ -179,7 +187,6 @@ }; /* Texas Instruments SN75LVDS83B LVDS Transmitter */ - /* NOTE: datasheet also mentions about THine TH133B LVDS Transmitter */ lvds-encoder { compatible = "ti,sn75lvds83", "lvds-encoder"; @@ -217,7 +224,7 @@ sound { compatible = "nvidia,tegra-audio-rt5631-tf201", "nvidia,tegra-audio-rt5631"; - nvidia,model = "ASUS TF201 RT5631"; + nvidia,model = "TF201 RT5631"; nvidia,audio-routing = "Headphone Jack", "HPOL", @@ -228,21 +235,7 @@ "MIC Bias1", "Mic Jack", "DMIC", "Int Mic"; - nvidia,i2s-controller = <&tegra_i2s1>; nvidia,audio-codec = <&rt5631>; - - nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>; - - clocks = <&tegra_car TEGRA30_CLK_PLL_A>, - <&tegra_car TEGRA30_CLK_PLL_A_OUT0>, - <&tegra_car TEGRA30_CLK_EXTERN1>; - clock-names = "pll_a", "pll_a_out0", "mclk"; - - assigned-clocks = <&tegra_car TEGRA30_CLK_EXTERN1>, - <&tegra_pmc TEGRA_PMC_CLK_OUT_1>; - - assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>, - <&tegra_car TEGRA30_CLK_EXTERN1>; }; memory-controller@7000f000 { diff --git a/arch/arm/boot/dts/tegra30-asus-transformer-common.dtsi b/arch/arm/boot/dts/tegra30-asus-transformer-common.dtsi index f822389d5878a..355f48d71fb78 100644 --- a/arch/arm/boot/dts/tegra30-asus-transformer-common.dtsi +++ b/arch/arm/boot/dts/tegra30-asus-transformer-common.dtsi @@ -46,7 +46,7 @@ linux,cma@80000000 { compatible = "shared-dma-pool"; alloc-ranges = <0x80000000 0x30000000>; - size = <0x10000000>; /* 256MiB */ + size = <0x10000000>; /* 256MiB */ linux,cma-default; reusable; }; @@ -66,7 +66,34 @@ }; }; + host1x@50000000 { + hdmi: hdmi@54280000 { + status = "okay"; + + hdmi-supply = <&hdmi_5v0_sys>; + pll-supply = <&vdd_1v8>; + vdd-supply = <&vdd_3v3_sys>; + + nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>; + nvidia,ddc-i2c-bus = <&hdmi_ddc>; + }; + }; + gpio@6000d000 { + init-lpm-in-hog { + gpio-hog; + gpios = , + ; + input; + }; + + init-lpm-out-hog { + gpio-hog; + gpios = , + ; + output-low; + }; + usb_charge_limit-hog { gpio-hog; gpios = ; // LIMIT_SET0, out, lo; @tegra_udc.LIMIT_PWR [0 = 0.5A, 1 = 1A] @@ -762,13 +789,6 @@ nvidia,enable-input = ; }; - gmi_cs4_n_pk2 { - nvidia,pins = "gmi_cs4_n_pk2"; - nvidia,function = "gmi"; - nvidia,pull = ; - nvidia,tristate = ; - nvidia,enable-input = ; - }; gmi_cs6_n_pi3 { nvidia,pins = "gmi_cs6_n_pi3"; nvidia,function = "gmi"; @@ -902,14 +922,6 @@ nvidia,enable-input = ; }; - cam_mclk_pcc0 { - nvidia,pins = "cam_mclk_pcc0"; - nvidia,function = "vi_alt3"; - nvidia,pull = ; - nvidia,tristate = ; - nvidia,enable-input = ; - }; - clk2_req_pcc5 { nvidia,pins = "clk2_req_pcc5", "clk1_req_pee2"; @@ -1260,7 +1272,7 @@ regulator-always-on; }; - ldo5 { + vdac_vdd_reg: ldo5 { regulator-name = "vddio_sdmmc,avdd_vdac"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <3300000>; @@ -1311,77 +1323,74 @@ }; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; + vdd_5v0_sys: regulator@0 { + compatible = "regulator-fixed"; + regulator-name = "vdd_5v0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + }; - vdd_5v0_sys: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "vdd_5v0"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - regulator-boot-on; - }; + vdd_3v3_sys: regulator@1 { + compatible = "regulator-fixed"; + regulator-name = "vdd_3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; - vdd_3v3_sys: regulator@1 { - compatible = "regulator-fixed"; - reg = <1>; - regulator-name = "vdd_3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vdd_5v0_sys>; - }; + vdd_pnl: regulator@2 { + compatible = "regulator-fixed"; + regulator-name = "vdd_panel"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <300000>; + gpio = <&gpio TEGRA_GPIO(W, 1) GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply = <&vdd_3v3_sys>; + }; - vdd_pnl: regulator@2 { - compatible = "regulator-fixed"; - reg = <2>; - regulator-name = "vdd_panel"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <300000>; - gpio = <&gpio TEGRA_GPIO(W, 1) GPIO_ACTIVE_HIGH>; - enable-active-high; - vin-supply = <&vdd_3v3_sys>; - }; + vdd_3v3_com: regulator@3 { + compatible = "regulator-fixed"; + regulator-name = "vdd_3v3_com"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + gpio = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply = <&vdd_3v3_sys>; + }; - cam_vddc: regulator@3 { - compatible = "regulator-fixed"; - reg = <3>; - regulator-name = "camera_vddc"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - gpio = <&gpio TEGRA_GPIO(BB, 7) GPIO_ACTIVE_HIGH>; - enable-active-high; - vin-supply = <&vdd2_reg>; - }; + hdmi_5v0_sys: regulator@4 { + compatible = "regulator-fixed"; + regulator-name = "hdmi_5v0_sys"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply = <&vdd_5v0_sys>; + }; - vdd_3v3_com: regulator@4 { - compatible = "regulator-fixed"; - reg = <4>; - regulator-name = "vdd_3v3_com"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - gpio = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>; - enable-active-high; - vin-supply = <&vdd_3v3_sys>; - }; + vdd_2v85_cam2: regulator@5 { + compatible = "regulator-fixed"; + regulator-name = "cam3_ldo_en"; + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + gpio = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply = <&vdd_3v3_sys>; + }; - hdmi_5v0_sys: regulator@5 { - compatible = "regulator-fixed"; - reg = <5>; - regulator-name = "hdmi_5v0_sys"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>; - enable-active-high; - vin-supply = <&vdd_5v0_sys>; - }; + vddio_1v8_cam: regulator@6 { + compatible = "regulator-fixed"; + regulator-name = "vddio_1v8_cam"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + gpio = <&gpio TEGRA_GPIO(BB, 4) GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply = <&vdd_1v8>; }; pmc@7000e400 { @@ -1485,8 +1494,6 @@ status = "okay"; dr_mode = "peripheral"; nvidia,hssync-start-delay = <0>; - /delete-property/ nvidia,xcvr-setup-use-fuses; - nvidia,xcvr-setup = <5>; /* Based on TF201 fuse value - 48 */ nvidia,xcvr-lsfslew = <2>; nvidia,xcvr-lsrslew = <2>; vbus-supply = <&vdd_5v0_sys>; @@ -1499,8 +1506,6 @@ usb-phy@7d008000 { status = "okay"; - /delete-property/ nvidia,xcvr-setup-use-fuses; - nvidia,xcvr-setup = <5>; /* Based on TF201 fuse value - 48 */ vbus-supply = <&vdd_5v0_sys>; }; @@ -1626,6 +1631,24 @@ status = "okay"; }; + sound { + nvidia,i2s-controller = <&tegra_i2s1>; + + nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>; + nvidia,hp-mute-gpios = <&gpio TEGRA_GPIO(X, 2) GPIO_ACTIVE_LOW>; + + clocks = <&tegra_car TEGRA30_CLK_PLL_A>, + <&tegra_car TEGRA30_CLK_PLL_A_OUT0>, + <&tegra_pmc TEGRA_PMC_CLK_OUT_1>; + clock-names = "pll_a", "pll_a_out0", "mclk"; + + assigned-clocks = <&tegra_car TEGRA30_CLK_EXTERN1>, + <&tegra_pmc TEGRA_PMC_CLK_OUT_1>; + + assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>, + <&tegra_car TEGRA30_CLK_EXTERN1>; + }; + thermal-zones { skin-thermal { polling-delay-passive = <1000>; /* milliseconds */ From 9f4a0267905336a25bb8ba99ceea33107f5331f6 Mon Sep 17 00:00:00 2001 From: Svyatoslav Date: Sun, 24 Jan 2021 18:20:33 +0200 Subject: [PATCH 2/6] tf300t-dts: squash with bringup --- arch/arm/boot/dts/tegra30-asus-tf300t.dts | 53 ++++++++++------------- 1 file changed, 24 insertions(+), 29 deletions(-) diff --git a/arch/arm/boot/dts/tegra30-asus-tf300t.dts b/arch/arm/boot/dts/tegra30-asus-tf300t.dts index c785c99b38f3c..1c50c21a7dcc7 100644 --- a/arch/arm/boot/dts/tegra30-asus-tf300t.dts +++ b/arch/arm/boot/dts/tegra30-asus-tf300t.dts @@ -23,17 +23,6 @@ }; }; }; - - hdmi: hdmi@54280000 { - status = "okay"; - - hdmi-supply = <&hdmi_5v0_sys>; - pll-supply = <&vdd_1v8>; - vdd-supply = <&vdd_3v3_sys>; - - nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>; - nvidia,ddc-i2c-bus = <&hdmi_ddc>; - }; }; pinmux@70000868 { @@ -67,6 +56,20 @@ nvidia,tristate = ; nvidia,enable-input = ; }; + gmi_cs4_n_pk2 { + nvidia,pins = "gmi_cs4_n_pk2"; + nvidia,function = "gmi"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + cam_mclk_pcc0 { + nvidia,pins = "cam_mclk_pcc0"; + nvidia,function = "vi_alt3"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; }; }; @@ -81,10 +84,11 @@ reset-gpios = <&gpio TEGRA_GPIO(H, 6) GPIO_ACTIVE_LOW>; wakeup-source; + vcc33-supply = <&vdd_3v3_sys>; + vccio-supply = <&vdd_3v3_sys>; + touchscreen-size-x = <2240>; touchscreen-size-y = <1408>; -// touchscreen-x-mm = <210>; -// touchscreen-y-mm = <132>; touchscreen-inverted-y; }; }; @@ -122,12 +126,18 @@ interrupt-parent = <&gpio>; interrupts = ; + gpio-controller; #gpio-cells = <2>; micdet-cfg = <0>; micdet-delay = <100>; gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>; + + AVDD-supply = <&vdd_3v3_sys>; + CPVDD-supply = <&vdd_3v3_sys>; + DBVDD-supply = <&vdd_3v3_sys>; + DCVDD-supply = <&vdd_3v3_sys>; }; }; @@ -164,7 +174,6 @@ }; /* Texas Instruments SN75LVDS83B LVDS Transmitter */ - /* NOTE: datasheet also mentions about THine TH133B LVDS Transmitter */ lvds-encoder { compatible = "ti,sn75lvds83", "lvds-encoder"; @@ -196,7 +205,7 @@ sound { compatible = "nvidia,tegra-audio-wm8903-tf300t", "nvidia,tegra-audio-wm8903"; - nvidia,model = "ASUS TF300T WM8903"; + nvidia,model = "TF300T WM8903"; nvidia,audio-routing = "Headphone Jack", "HPOUTR", @@ -208,22 +217,8 @@ "Mic Jack", "MICBIAS", "IN1L", "Mic Jack"; - nvidia,i2s-controller = <&tegra_i2s1>; nvidia,audio-codec = <&wm8903>; - nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>; - nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>; - - clocks = <&tegra_car TEGRA30_CLK_PLL_A>, - <&tegra_car TEGRA30_CLK_PLL_A_OUT0>, - <&tegra_car TEGRA30_CLK_EXTERN1>; - clock-names = "pll_a", "pll_a_out0", "mclk"; - - assigned-clocks = <&tegra_car TEGRA30_CLK_EXTERN1>, - <&tegra_pmc TEGRA_PMC_CLK_OUT_1>; - - assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>, - <&tegra_car TEGRA30_CLK_EXTERN1>; }; memory-controller@7000f000 { From f5b5eb9afe996f184e9541ba01e3d4041853e91a Mon Sep 17 00:00:00 2001 From: Ion Agorria Date: Sun, 24 Jan 2021 17:40:49 +0100 Subject: [PATCH 3/6] Revert "WIP: arm/tegra: add DT for Asus Transformer Infinity TF700t" This reverts commit 417214e4f2a4b7c8bdadcad68bcaeca737fb24ff. --- arch/arm/boot/dts/Makefile | 1 - arch/arm/boot/dts/tegra30-asus-tf700t.dts | 1450 --------------------- 2 files changed, 1451 deletions(-) delete mode 100644 arch/arm/boot/dts/tegra30-asus-tf700t.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 3534b9a599b88..db5aaaed040a0 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1261,7 +1261,6 @@ dtb-$(CONFIG_ARCH_TEGRA_3x_SOC) += \ tegra30-asus-nexus7-tilapia-E1565.dtb \ tegra30-asus-tf201.dtb \ tegra30-asus-tf300t.dtb \ - tegra30-asus-tf700t.dtb \ tegra30-beaver.dtb \ tegra30-cardhu-a02.dtb \ tegra30-cardhu-a04.dtb \ diff --git a/arch/arm/boot/dts/tegra30-asus-tf700t.dts b/arch/arm/boot/dts/tegra30-asus-tf700t.dts deleted file mode 100644 index c22ff8f73b853..0000000000000 --- a/arch/arm/boot/dts/tegra30-asus-tf700t.dts +++ /dev/null @@ -1,1450 +0,0 @@ -/dts-v1/; - -#include -#include -#include "tegra30.dtsi" -#include "tegra30-cpu-opp.dtsi" -#include "tegra30-cpu-opp-microvolt.dtsi" - -/ { - model = "Asus Transformer Infinity TF700T"; - compatible = "asus,tf700t", "nvidia,tegra30"; - - aliases { - rtc0 = &pmic; - rtc1 = "/rtc@7000e000"; - //display0 = &lcd; - display1 = &hdmi; - serial0 = &uartd; /* reserved: console */ - serial1 = &uartc; - serial2 = &uartb; - mmc0 = &sdmmc4; /* eMMC */ - mmc1 = &sdmmc1; /* uSD slot */ - mmc2 = &sdmmc3; /* WiFi */ - }; - - chosen { - #address-cells = <1>; - #size-cells = <1>; - ranges; - - bootargs = "tegra_wdt.heartbeat=30 androidboot.selinux=permissive androidboot.hardware=cardhu tegraid=30.1.3.0.0 commchip_id=0 androidboot.serialno=015d15b4da27f206 androidboot.commchip_id=0 no_console_suspend=1 usbcore.old_scheme_first=1 core_edp_mv=0 audio_codec=wm8903 board_info=245:0:1c:a7:29 tegraboot=sdmmc gpt gpt_sector=62078975 modem_id=0 android.kerneltype=normal androidboot.productid=0x02 androidboot.carrier=wifi-only"; - stdout-path = "display0"; - - /*framebuffer@abc01000 { - compatible = "simple-framebuffer"; - reg = <0xabc01000 0x3e8a00>; - width = <1920>; - height = <1200>; - stride = <2560>; - format = "r5g6b5"; - display = <&lcd>; - clocks = <&tegra_car TEGRA30_CLK_DISP1>, - <&tegra_car TEGRA30_CLK_PWM>; - panel-supply = <&vdd_pnl1_reg>; - backlight-supply = <&vdd_bl_reg>; - };*/ - }; - - memory@80000000 { - reg = <0x80000000 0x40000000>; - }; - - firmware { - trusted-foundations { - compatible = "tlm,trusted-foundations"; - tlm,version-major = <2>; - tlm,version-minor = <8>; - }; - }; - - reserved-memory { - #address-cells = <1>; - #size-cells = <1>; - ranges; - - firmware@bfe00000 { - // used by TF firmware - reg = <0xbfe00000 0x200000>; - no-map; - }; - - ramoops@beb00000 { - compatible = "ramoops"; - reg = <0xbeb00000 0x100000>; - record-size = <0x00020000>; - console-size = <0x00040000>; - ftrace-size = <0x00040000>; - ecc-size = <16>; - }; - - lp0_vec@bddf9000 { - reg = <0xbddf9000 0x2000>; // passed from bootloader (ATAGS/NVIDIA, cmdline) - }; -/* - reserved@bddf6000 { - reg = <0xbddf6000 0x2000>; // passed from bootloader (ATAGS/NVIDIA) - }; -*/ - framebuffer@abc01000 { - reg = <0xabc01000 0x3e9000>; - no-map; - }; - }; - - power-domain-core { - power-supply = <&vddcore_reg>; - }; - - cpus { - cpu0: cpu@0 { - cpu-supply = <&vddctrl_reg>; - operating-points-v2 = <&cpu0_opp_table>; - #cooling-cells = <2>; - }; - cpu1: cpu@1 { - cpu-supply = <&vddctrl_reg>; - operating-points-v2 = <&cpu0_opp_table>; - #cooling-cells = <2>; - }; - cpu2: cpu@2 { - cpu-supply = <&vddctrl_reg>; - operating-points-v2 = <&cpu0_opp_table>; - #cooling-cells = <2>; - }; - cpu3: cpu@3 { - cpu-supply = <&vddctrl_reg>; - operating-points-v2 = <&cpu0_opp_table>; - #cooling-cells = <2>; - }; - }; - - thermal-zones { - local { - polling-delay-passive = <1000>; /* milliseconds */ - polling-delay = <5000>; /* milliseconds */ - - thermal-sensors = <&temp 0>; - - trips { - trip0: cpu-alert0 { - /* start throttling at 57C */ - temperature = <57000>; - hysteresis = <200>; - type = "passive"; - }; - - trip1: cpu-crit { - /* shut down at 60C */ - temperature = <60000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - - cooling-maps { - map0 { - trip = <&trip0>; - cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; - }; - }; - - /*panel: panel { - compatible = "innolux,n101icg-l21", "innolux,g101ice-l01", "simple-panel"; - - power-supply = <&vdd_pnl1_reg>; - enable-gpios = <&gpio TEGRA_GPIO(N, 6) GPIO_ACTIVE_HIGH>; - - backlight = <&backlight>; - }; - - backlight: backlight { - compatible = "pwm-backlight"; - - enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>; - power-supply = <&vdd_bl_reg>; - pwms = <&pwm 0 5000000>; - - brightness-levels = <2 4 8 16 32 64 128 255>; - default-brightness-level = <6>; - }; - - sound { - compatible = "asus,tf300t-audio", - "nvidia,tegra-audio-wm8903"; - nvidia,model = "ASUS TF300T"; - - nvidia,audio-routing = - "Headphone Jack", "HPOUTR", - "Headphone Jack", "HPOUTL", - "Int Spk", "ROP", - "Int Spk", "RON", - "Int Spk", "LOP", - "Int Spk", "LON", - "Mic Jack", "MICBIAS", - "IN1L", "Mic Jack"; - - nvidia,i2s-controller = <&tegra_i2s1>; - nvidia,audio-codec = <&wm8903>; - - // speaker power: vdd_5v0_reg - nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>; - nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>; // h2w_detect, in, hi - - clocks = <&tegra_car TEGRA30_CLK_PLL_A>, - <&tegra_car TEGRA30_CLK_PLL_A_OUT0>, - <&tegra_car TEGRA30_CLK_EXTERN1>; - clock-names = "pll_a", "pll_a_out0", "mclk"; - };*/ - - pad-buttons { - compatible = "gpio-keys"; - interrupt-parent = <&gpio>; - - power { - label = "Power"; - gpios = <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>; // KEY_POWER, in, hi - interrupts = ; - linux,code = ; - debounce-interval = <10>; - wakeup-source; - }; - - volume-up { - label = "Volume Up"; - gpios = <&gpio TEGRA_GPIO(Q, 2) GPIO_ACTIVE_LOW>; // KEY_VOLUMEUP, in, hi - interrupts = ; - linux,code = ; - debounce-interval = <10>; - wakeup-source; - }; - - volume-down { - label = "Volume Down"; - gpios = <&gpio TEGRA_GPIO(Q, 3) GPIO_ACTIVE_LOW>; // KEY_VOLUMEDOWN, in, hi - interrupts = ; - linux,code = ; - debounce-interval = <10>; - wakeup-source; - }; - }; - - extcon-keys { - compatible = "gpio-keys"; - interrupt-parent = <&gpio>; - - dock-hall-sensor { - label = "Lid"; - gpios = <&gpio TEGRA_GPIO(S, 6) GPIO_ACTIVE_LOW>; // asusdec_hall_sensor, in, hi [open] - interrupts = ; - linux,input-type = ; - linux,code = ; - debounce-interval = <10>; - wakeup-source; - }; - - ac-15v { - label = "Power adapter 15V"; - gpios = <&gpio TEGRA_GPIO(H, 5) GPIO_ACTIVE_HIGH>; // LIMIT_SET1, in, lo [usb: pc] - interrupts = ; - linux,input-type = ; - linux,code = ; - debounce-interval = <10>; - wakeup-source; - }; - - lineout-detect { - label = "Audio dock line-out detect"; - gpios = <&gpio TEGRA_GPIO(X, 3) GPIO_ACTIVE_LOW>; // lineout_int, in, hi - interrupts = ; - linux,input-type = ; - linux,code = ; - debounce-interval = <10>; - wakeup-source; - }; - }; - - i2c_dock: dock-i2c { - compatible = "i2c-hotplug-gpio"; - #address-cells = <1>; - #size-cells = <0>; - interrupts-extended = <&gpio TEGRA_GPIO(U, 4) IRQ_TYPE_EDGE_BOTH>; - detect-gpios = <&gpio TEGRA_GPIO(U, 4) GPIO_ACTIVE_LOW>; // asusdec_dock_in, in, lo [in-dock] - i2c-parent = <&i2c2>; - }; - - cardhu-pcbid { - compatible = "nvidia,cardhu-pcbid"; - pcbid-gpios = - <&gpio TEGRA_GPIO(K, 3) GPIO_ACTIVE_HIGH>, - <&gpio TEGRA_GPIO(J, 2) GPIO_ACTIVE_HIGH>, - <&gpio TEGRA_GPIO(J, 0) GPIO_ACTIVE_HIGH>, - <&gpio TEGRA_GPIO(Q, 5) GPIO_ACTIVE_HIGH>, - <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_HIGH>, - <&gpio TEGRA_GPIO(Q, 7) GPIO_ACTIVE_HIGH>, - <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_HIGH>, - <&gpio TEGRA_GPIO(R, 5) GPIO_ACTIVE_HIGH>, - <&gpio TEGRA_GPIO(R, 4) GPIO_ACTIVE_HIGH>; - pcbid-ext-gpios = // used only if pcbid[5:3] == 6 - <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>, - <&gpio TEGRA_GPIO(B, 0) GPIO_ACTIVE_HIGH>, - <&gpio TEGRA_GPIO(J, 7) GPIO_ACTIVE_HIGH>, - <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_HIGH>; - ext-projectid-gpios = // used only if pcbid[5:3] == 6 - <&gpio TEGRA_GPIO(K, 4) GPIO_ACTIVE_HIGH>, - <&gpio TEGRA_GPIO(I, 7) GPIO_ACTIVE_HIGH>, - <&gpio TEGRA_GPIO(I, 3) GPIO_ACTIVE_HIGH>, - <&gpio TEGRA_GPIO(K, 2) GPIO_ACTIVE_HIGH>; - }; - - clocks { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - clk32k_in: clock@0 { - compatible = "fixed-clock"; - reg = <0>; - #clock-cells = <0>; - clock-frequency = <32768>; - }; - - // TODO: clk_out2 <- clk_m [26 MHz] - }; - - host1x@50000000 { - /*lcd: dc@54200000 { - rgb { - status = "okay"; - nvidia,panel = <&panel>; - }; - };*/ - - hdmi: dc@54240000 { - }; - - hdmi@54280000 { - status = "okay"; - hdmi-supply = <&hdmi_5v_con>; - pll-supply = <&avdd_hdmi_pll_1v8_reg>; - vdd-supply = <&avdd_hdmi_3v3_reg>; - - nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>; // hdmi_hpd, in, lo - nvidia,ddc-i2c-bus = <&hdmi_ddc>; - }; - }; - - pmc@7000e400 { - status = "okay"; - nvidia,invert-interrupt; - nvidia,suspend-mode = <0>; - nvidia,cpu-pwr-good-time = <2000>; - nvidia,cpu-pwr-off-time = <200>; - nvidia,core-pwr-good-time = <3845 3845>; - nvidia,core-pwr-off-time = <0>; - nvidia,core-power-req-active-high; - nvidia,sys-clock-req-active-high; - nvidia,lp0-vec = <0xbddf9000 0x2000>; // passed by bootloader - - i2c-thermtrip { - nvidia,i2c-controller-id = <4>; // i2c5 - nvidia,bus-addr = <0x2d>; // tps65911 - nvidia,reg-addr = <0x3f>; // DEVCTRL - nvidia,reg-data = <0x81>; // PWR_OFF_SET + DEV_OFF - }; - }; - - hdmi-cec@70015000 { - status = "okay"; - }; - - hda@70030000 { - status = "okay"; - }; - - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - cp_5v_reg: regulator@0 { // -> vdd_5v0_sby, vdd_hall, vterm_ddr, v2ref_ddr - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "cp_5v"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - regulator-boot-on; - enable-active-high; - gpio = <&pmic 0 GPIO_ACTIVE_HIGH>; - vin-supply = <&vdd_ac_bat_reg>; - }; - - vdd_5v0_reg: regulator@1 { // -> vdd_5v0_sys - compatible = "regulator-fixed"; - reg = <1>; - regulator-name = "5v0"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - regulator-boot-on; - enable-active-high; - gpio = <&pmic 8 GPIO_ACTIVE_HIGH>; // Cardhu-A04+; PM269 - vin-supply = <&vdd_ac_bat_reg>; - }; - - wifi_3v3_reg: regulator@21 { - compatible = "regulator-fixed"; - reg = <21>; - regulator-name = "wifi_3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - enable-active-high; - gpio = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>; // wlan_power, out, lo [wifi-off] - vin-supply = <&sys_3v3_reg>; - }; - - gps_en_reg: regulator@23 { - compatible = "regulator-fixed"; - reg = <23>; - regulator-name = "gps_en"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - enable-active-high; - gpio = <&gpio TEGRA_GPIO(U, 2) GPIO_ACTIVE_HIGH>; // gpsconfig.xml: gpioNStdby - vin-supply = <&sys_3v3_reg>; - }; - - vdd_cam1_ldo_reg: regulator@18 { - compatible = "regulator-fixed"; - reg = <18>; - regulator-name = "vdd_cam1_ldo"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - enable-active-high; - gpio = <&gpio TEGRA_GPIO(R, 6) GPIO_ACTIVE_HIGH>; // fixed_reg_cam1_ldo_e, out, lo - vin-supply = <&sys_3v3_reg>; - }; - - vdd_ddr_reg: regulator@2 { - compatible = "regulator-fixed"; - reg = <2>; - regulator-name = "vdd_ddr"; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - regulator-always-on; - regulator-boot-on; - enable-active-high; - gpio = <&pmic 7 GPIO_ACTIVE_HIGH>; // Cardhu-A04+, PM269 - // vin-supply = null? - }; - - sys_3v3_reg: regulator@3 { // -> mem_vddio_ddr, t30_vddio_ddr - compatible = "regulator-fixed"; - reg = <3>; - regulator-name = "sys_3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - enable-active-high; - gpio = <&pmic 6 GPIO_ACTIVE_HIGH>; // Cardhu-A04+, PM269 - }; - - vdd_bl_reg: regulator@4 { - compatible = "regulator-fixed"; - reg = <4>; - regulator-name = "vdd_bl"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-boot-on; - enable-active-high; - // OD? o=1 i=0 ? - gpio = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>; // fixed_reg_en_vdd_bl, PM269 -// vin-supply = <&vdd_5v0_reg>; // =null? - }; - - modem_3v3_reg: regulator@5 { - compatible = "regulator-fixed"; - reg = <5>; - regulator-name = "modem_3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - enable-active-high; - gpio = <&gpio TEGRA_GPIO(D, 6) GPIO_ACTIVE_HIGH>; -// vin-supply = <&sys_3v3_reg>; // = null? - }; - - vdd_pnl1_reg: regulator@6 { - compatible = "regulator-fixed"; - reg = <6>; - regulator-name = "vdd_pnl1"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - enable-active-high; - gpio = <&gpio TEGRA_GPIO(W, 1) GPIO_ACTIVE_HIGH>; // fixed_reg_en_vdd_pnl, out, hi; PM269 - vin-supply = <&sys_3v3_reg>; - }; - - vdd_cam3_ldo_reg: regulator@7 { - compatible = "regulator-fixed"; - reg = <7>; - regulator-name = "vdd_cam3_ldo"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - enable-active-high; - gpio = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_HIGH>; // fixed_reg_cam3_ldo_e, out, lo - vin-supply = <&sys_3v3_reg>; - }; - - vdd_com_reg: regulator@8 { - compatible = "regulator-fixed"; - reg = <8>; - regulator-name = "vdd_com"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - enable-active-high; - gpio = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>; - vin-supply = <&sys_3v3_reg>; - }; - - vdd_fuse_3v3_reg: regulator@9 { - compatible = "regulator-fixed"; - reg = <9>; - regulator-name = "vdd_fuse_3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - enable-active-high; - gpio = <&gpio TEGRA_GPIO(C, 1) GPIO_ACTIVE_HIGH>; // PM269 - vin-supply = <&sys_3v3_reg>; - }; - - cam_vddc: regulator@100 { - compatible = "regulator-fixed"; - reg = <100>; - regulator-name = "icatch7002a_vddc"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - enable-active-high; - gpio = <&gpio TEGRA_GPIO(BB, 7) GPIO_ACTIVE_HIGH>; // cam_vddc_ldo_en, out, lo - // vin-supply = vdd2? - }; - - hdmi_5v_con: regulator@101 { - compatible = "regulator-fixed"; - reg = <101>; - regulator-name = "hdmi_con_5v"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>; // hdmi_5v_en, out, hi - vin-supply = <&vdd_5v0_reg>; - }; - - avdd_hdmi_pll_1v8_reg: regulator@102 { - compatible = "regulator-fixed"; - reg = <102>; - regulator-name = "avdd_hdmi_pll"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - // gpio = ? - vin-supply = <&vio_reg>; - }; - - avdd_hdmi_3v3_reg: regulator@103 { - compatible = "regulator-fixed"; - reg = <103>; - regulator-name = "avdd_hdmi"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - enable-active-high; - gpio = <&gpio TEGRA_GPIO(T, 0) GPIO_ACTIVE_HIGH>; - vin-supply = <&sys_3v3_reg>; - }; - - cam_1v8_reg: regulator@104 { - compatible = "regulator-fixed"; - reg = <104>; - regulator-name = "cam_1v8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - enable-active-high; - gpio = <&gpio TEGRA_GPIO(BB, 4) GPIO_ACTIVE_HIGH>; // cam_vddio_ldo_en, out, lo - vin-supply = <&vio_reg>; - }; - - vdd_ac_bat_reg: regulator@107 { - compatible = "regulator-fixed"; - reg = <107>; - regulator-name = "vdd_ac_bat"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-boot-on; - regulator-always-on; - }; - - dsp_1v8_reg: regulator@108 { - compatible = "regulator-fixed"; - reg = <108>; - regulator-name = "dsp_1v8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - enable-active-high; - gpio = <&gpio TEGRA_GPIO(P, 3) GPIO_ACTIVE_HIGH>; // dsp_power_1v8_en, out, hi - vin-supply = <&vio_reg>; - }; - - cam_isp_reg: regulator@109 { - compatible = "regulator-fixed"; - reg = <109>; - regulator-name = "isp_power"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - enable-active-high; - gpio = <&gpio TEGRA_GPIO(BB, 5) GPIO_ACTIVE_HIGH>; // cam_power_dwn, out, lo - vin-supply = <&sys_3v3_reg>; - }; - - dsp_reg: regulator@110 { - compatible = "regulator-fixed"; - reg = <110>; - regulator-name = "dsp_power"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - enable-active-high; - gpio = <&gpio TEGRA_GPIO(BB, 6) GPIO_ACTIVE_HIGH>; // fm34_pwdn, out, lo - vin-supply = <&sys_3v3_reg>; - }; - }; -}; - -&pinmux { - pinctrl-names = "default"; - pinctrl-0 = <&pinmux_default_state>; - - pinmux_default_state: pinmux { - }; -}; - -&pwm { - status = "okay"; -}; - -&uartb { - compatible = "nvidia,tegra30-hsuart", "nvidia,tegra20-hsuart"; - status = "okay"; - - gnss { - compatible = "gps,nmea"; - vcc-supply = <&gps_en_reg>; - }; -}; - -&uartc { - compatible = "nvidia,tegra30-hsuart", "nvidia,tegra20-hsuart"; - status = "okay"; - - bluetooth { - compatible = "brcm,bcm4329-bt"; - interrupts-extended = <&gpio TEGRA_GPIO(U, 6) IRQ_TYPE_LEVEL_LOW>; // bt_host_wake, in, lo [UART_WAKE?] - device-wakeup-gpios = <&gpio TEGRA_GPIO(U, 1) GPIO_ACTIVE_HIGH>; // bt_ext_wake, out, lo [BT_WAKE?] - shutdown-gpios = <&gpio TEGRA_GPIO(U, 0) GPIO_ACTIVE_LOW>; // bcm4329_nshutdown_gp, out, lo [bt-off] -// reset-gpios = <&gpio TEGRA_GPIO(U, 0) GPIO_ACTIVE_HIGH>; // [BT_RST_N] - }; -}; - -&gpio { - // gpios = <&gpio TEGRA_GPIO(G, 4) GPIO_ACTIVE_HIGH>; // memory_bootstrap_ad4, in, hi - // gpios = <&gpio TEGRA_GPIO(G, 5) GPIO_ACTIVE_LOW>; // memory_bootstrap_ad5, in, lo - // 0 0 = TF300T_Elpida_1GB_667MHZ - // ** 1 0 = TF300T_Hynix_1GB_667MHZ - // 0 1 = TF300T_Micron_1GB_667MHZ - - usb_charge_limit { - gpio-hog; - gpios = ; // LIMIT_SET0, out, lo; @tegra_udc.LIMIT_PWR [0 = 0.5A, 1 = 1A] -// output-low; - output-high; - }; -}; - -&i2c1 { - status = "okay"; - clock-frequency = <100000>; - - dsp@60 { - compatible = "fortemedia,fm34"; - reg = <0x60>; - vddc-supply = <&dsp_1v8_reg>; - vdda-supply = <&dsp_reg>; // fm34_pwdn - reset-gpios = <&gpio TEGRA_GPIO(O, 3) GPIO_ACTIVE_LOW>; // fm34_reset, out, hi - }; -}; - -&i2c2 { - status = "okay"; - clock-frequency = <400000>; - - // resp@0, @8 - - /*touchscreen@10 { - compatible = "elan,ektf3624", "elan,ekth3500"; // HV: ekth1036 - reg = <0x10>; - interrupt-parent = <&gpio>; - interrupts = ; // touch_irq, in, hi - reset-gpios = <&gpio TEGRA_GPIO(H, 6) GPIO_ACTIVE_LOW>; // touch_reset, out, hi - wakeup-source; - touchscreen-size-x = <2240>; - touchscreen-size-y = <1408>; - touchscreen-x-mm = <210>; - touchscreen-y-mm = <132>; - touchscreen-inverted-y; - };*/ - - asusec@15 { - compatible = "asus,pad-ec", "asus,ec"; - reg = <0x15>; - interrupt-parent = <&gpio>; - interrupts = ; // asuspec_apwake, in, hi - request-gpio = <&gpio TEGRA_GPIO(Q, 1) GPIO_ACTIVE_LOW>; // asuspec_request, out, hi - asus,dockram = <&dockram_pec>; - - pad_battery: battery { -// power-supplies = <&dock_battery>; - charge-full-design = <2940>; /* mAh */ - non-removable; - }; - }; - - dockram_pec: dockram@17 { - compatible = "asus,dockram"; - reg = <0x17>; - }; -}; - -&i2c_dock { - asusec@19 { - compatible = "asus,dock-ec", "asus,ec"; - reg = <0x19>; - interrupt-parent = <&gpio>; - interrupts = ; // asusdec_input, in, hi - request-gpio = <&gpio TEGRA_GPIO(Q, 6) GPIO_ACTIVE_LOW>; // asusdec_request, out, hi - asus,dockram = <&dockram_dec>; - - dock_battery: battery { - charge-full-design = <2260>; /* mAh */ - }; - }; - - dockram_dec: dockram@1b { - compatible = "asus,dockram"; - reg = <0x1b>; - }; -}; - -&i2c3 { - status = "okay"; - clock-frequency = <400000>; - - al3010@1c { - compatible = "di,al3010"; - reg = <0x1c>; - }; - - back_camera: camera@1f { - compatible = "fujitsu,m6mo"; - reg = <0x1f>; - - reset-gpios = <&gpio TEGRA_GPIO(BB, 0) GPIO_ACTIVE_LOW>; // cam_sensor_rst_lo, out, lo - }; - - front_camera: camera@48 { - compatible = "aptina,mi1040", "onsemi,mt9d115"; - reg = <0x48>; - - clocks = <>; //<&tegra_car TEGRA30_CLK_PLL_A>; CAM_MCLK - clock-names = "extclk"; - - vddio-suppy = <&cam_1v8_reg>; - vdda-suppy = <&vdd_cam3_ldo_reg>; // 2.85V? - vddc-supply = <&cam_vddc>; // PWR_DN - - reset-gpios = <&gpio TEGRA_GPIO(O, 0) GPIO_ACTIVE_LOW>; - }; - - /*camera: isp@3c { - compatible = "icatch,spca7002a"; - reg = <0x3c>; - - // pinmux - CAM_MCLK - sensors = <&back_camera &front_camera>; - sensor-names = "back", "front"; - - vddio-supply = <&cam_1v8_reg>; - vddc-supply = <&cam_vddc>; - vdda-supply = <&vdd_cam1_ldo_reg>; - af-supply = <&vdd_cam3_ldo_reg>; // 2v85? [@ GPIO_PR7 -> modem_en (usb_hsic)?] - power-supply = <&cam_isp_reg>; // cam_power_dwn - - reset-gpios = <&gpio TEGRA_GPIO(BB, 0) GPIO_ACTIVE_LOW>; // == cam_rst? - };*/ - - gyro@68 { - compatible = "invensense,mpu3050"; - reg = <0x68>; - interrupt-parent = <&gpio>; - interrupts = ; // mpu3050, in, lo - mount-matrix = "-1", "0", "0", "0", "1", "0", "0", "0", "-1"; - accel-slave = <&accel>; - compass-slave = <&compass>; - - i2c-gate { - #address-cells = <1>; - #size-cells = <0>; - - compass: compass@e { - compatible = "asahi-kasei,ak8974"; - reg = <0x0e>; - mount-matrix = "0", "-1", "0", "-1", "0", "0", "0", "0", "-1"; - }; - - accel: accel@f { - compatible = "kionix,kxtf9"; - reg = <0x0f>; - interrupt-parent = <&gpio>; - interrupts = ; // kxtf9, in, lo - mount-matrix = "0", "1", "0", "1", "0", "0", "0", "0", "-1"; - }; - }; - }; -}; - -hdmi_ddc: &i2c4 { - status = "okay"; - clock-frequency = <93750>; - - nvhdcp@3a { - compatible = "nvidia,hdcp"; - reg = <0x3a>; - }; -}; - -/* - interrupt-parent = <&gpio>; - interrupts = , // dock_charging, in, lo - ; // low_battery_detect, in, lo - ; // battery_detect, in, lo - interrupt-names = "dock-charging", "low", "detect"; -*/ -&i2c5 { - status = "okay"; - clock-frequency = <400000>; - - /delete-property/ interrupts; - interrupts-extended = <&lic GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, - <&gpio TEGRA_GPIO(CC, 2) IRQ_TYPE_EDGE_FALLING>; // temp_alert, in, hi [LEVEL_LOW] - interrupt-names = "irq", "smbus_alert"; - - /*wm8903: wm8903@1a { - compatible = "wlf,wm8903"; - reg = <0x1a>; - interrupt-parent = <&gpio>; - interrupts = ; // wm8903, in, lo - - gpio-controller; - #gpio-cells = <2>; - - micdet-cfg = <0>; - micdet-delay = <100>; - gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>; - };*/ - - pmic: tps65911@2d { - compatible = "ti,tps65911"; - reg = <0x2d>; - - interrupts = ; - #interrupt-cells = <2>; - interrupt-controller; - - ti,system-power-controller; - ti,sleep-enable; - ti,sleep-keep-ck32k; - ti,en-gpio-sleep = <0 0 1 0 0 0 0 0 0>; - wakeup-source; - - #gpio-cells = <2>; - gpio-controller; - - vcc1-supply = <&vdd_ac_bat_reg>; // vdd1 - vcc2-supply = <&vdd_ac_bat_reg>; // vdd2 - vcc3-supply = <&vio_reg>; // ldo6, ldo7, ldo8 - vcc4-supply = <&vdd_5v0_reg>; // ldo5 - vcc5-supply = <&vdd_ac_bat_reg>; // ldo3, ldo4 - vcc6-supply = <&vdd2_reg>; // ldo1, ldo2 - vcc7-supply = <&vdd_ac_bat_reg>; // vrtc - vccio-supply = <&vdd_ac_bat_reg>; // vio - - sleep_out { - gpio-hog; - gpios = <2 GPIO_ACTIVE_HIGH>; - output-high; - }; - - regulators { - vdd1_reg: vdd1 { // -> en_vddio_ddr_1v2 -// regulator-name = "vddio_ddr"; - regulator-min-microvolt = <600000>; - regulator-max-microvolt = <600000>; - regulator-always-on; - ti,regulator-ext-sleep-control = <8>; // EXT_CTRL_SLEEP_OFF? - }; - - vdd2_reg: vdd2 { // -> vdd_gen1v5, vcore_lcd, track_ldo1, external_ldo_1v2, vcore_cam1, vcore_cam2 -// regulator-name = "vdd_1v2_gen"; // [0.6-1.5V] - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-always-on; - }; - - vddctrl_reg: vddctrl { // -> vdd_cpu_pmu, vdd_cpu, vdd_sys - regulator-name = "vdd_cpu"; // vdd_cpu [0.6-1.4V; =0.9 =0.8] - regulator-min-microvolt = <600000>; - regulator-max-microvolt = <1125000>; - regulator-coupled-with = <&vddcore_reg>; - regulator-coupled-max-spread = <300000>; - regulator-max-step-microvolt = <100000>; - ti,regulator-ext-sleep-control = <1>; // TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1 - regulator-always-on; // test - nvidia,tegra-cpu-regulator; - }; - - vio_reg: vio { // -> avdd, ... 1v8 -// regulator-name = "vdd_1v8_gen"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - // eMMC VDD - ldo1_reg: ldo1 { - regulator-name = "vdd_emmc"; - regulator-min-microvolt = <2700000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - // uSD slot VDD - ldo2_reg: ldo2 { - regulator-name = "vdd_usd"; - regulator-min-microvolt = <1050000>; - regulator-max-microvolt = <3300000>; - }; - - // uSD slot VDDIO - ldo3_reg: ldo3 { // -> +pwrdet_sdmmc1 - regulator-name = "vddio_usd"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <3300000>; - }; - - ldo4_reg: ldo4 { - regulator-name = "vdd_rtc"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-always-on; - }; - - ldo5_reg: ldo5 { // -> avdd_vdac -// regulator-name = "vddio_sdmmc,avdd_vdac"; // disabled? - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - }; - - ldo6_reg: ldo6 { // -> avdd_dsi_csi, pwrdet_mipi, vddio_hsic - regulator-name = "avdd_dsi_csi,pwrdet_mipi"; // TODO - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - }; - - ldo7_reg: ldo7 { // -> avdd_pll* -// regulator-name = "vdd_pllm,x,u,a_p_c_s"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-always-on; - ti,regulator-ext-sleep-control = <8>; // EXT_CTRL_SLEEP_OFF?, LDO_LOW_POWER_ON_SUSPEND - }; - - ldo8_reg: ldo8 { - regulator-name = "vdd_ddr_hs"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; // =3v3 - regulator-always-on; - ti,regulator-ext-sleep-control = <8>; // EXT_CTRL_SLEEP_OFF?, LDO_LOW_POWER_ON_SUSPEND - }; - }; - }; - - temp: temperature-sensor@4c { - compatible = "onnn,nct1008"; - reg = <0x4c>; - vcc-supply = <&sys_3v3_reg>; - #thermal-sensor-cells = <1>; - }; - - vddcore_reg: tps62361@60 { - compatible = "ti,tps62361"; - reg = <0x60>; - - regulator-name = "vdd_core"; - regulator-min-microvolt = <1000000>; // =0v5 - regulator-max-microvolt = <1350000>; // =1v77 - regulator-coupled-with = <&vddctrl_reg>; - regulator-coupled-max-spread = <300000>; - regulator-max-step-microvolt = <100000>; - regulator-always-on; - ti,enable-vout-discharge; - ti,vsel0-state-high; - ti,vsel1-state-high; - nvidia,tegra-core-regulator; - }; -}; - -/* WM8903 */ -/*&tegra_i2s1 { - status = "okay"; -};*/ - -/* BT SCO */ -&tegra_i2s3 { - status = "okay"; -}; - -/* uSD slot on left side */ -&sdmmc1 { - status = "okay"; - cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; // sdhci_cd, in, lo [card in] - bus-width = <4>; - vmmc-supply = <&ldo3_reg>; - vqmmc-supply = <&ldo2_reg>; -}; - -&pinmux_default_state { - sdmmc1_clk { - nvidia,pins = "sdmmc1_clk_pz0"; - nvidia,function = "sdmmc1"; - nvidia,pull = ; - nvidia,tristate = ; - nvidia,enable-input = ; - }; - sdmmc1_cmd { - nvidia,pins = "sdmmc1_cmd_pz1", - "sdmmc1_dat0_py7", - "sdmmc1_dat1_py6", - "sdmmc1_dat2_py5", - "sdmmc1_dat3_py4"; - nvidia,function = "sdmmc1"; - nvidia,pull = ; - nvidia,tristate = ; - nvidia,enable-input = ; - }; - sdmmc1_cd { - nvidia,pins = "gmi_iordy_pi5" /* usd-card-detect */, - "vi_d11_pt3" /* sd-wp-gpio */; - nvidia,pull = ; - nvidia,tristate = ; - nvidia,enable-input = ; - }; - sdmmc1_drive { - nvidia,pins = "drive_sdio1"; - nvidia,high-speed-mode = ; - nvidia,schmitt = ; - nvidia,pull-down-strength = <42>; - nvidia,pull-up-strength = <46>; - nvidia,slew-rate-rising = ; - nvidia,slew-rate-falling = ; - }; -}; - -/* internal SDIO WiFi */ -&sdmmc3 { - status = "okay"; - bus-width = <4>; - mmc-pwrseq = <&wifi_pwrseq>; - vmmc-supply = <&wifi_3v3_reg>; - vqmmc-supply = <&vio_reg>; - enable-sdio-wakeup; - non-removable; - no-sd; - no-mmc; - - #address-cells = <1>; - #size-cells = <0>; - - wifi: brcmf@1 { - reg = <1>; - compatible = "brcm,bcm4329-fmac"; - interrupt-parent = <&gpio>; - interrupts = ; // bcmsdh_sdmmc, in, lo - interrupt-names = "host-wake"; - }; -}; - -/ { - wifi_pwrseq: wifi-pwrseq { - compatible = "mmc-pwrseq-simple"; - reset-gpios = <&gpio TEGRA_GPIO(D, 3) GPIO_ACTIVE_LOW>; // wlan_rst, out, lo [wifi-off] - post-power-on-delay-ms = <100>; - }; -}; - -&pinmux_default_state { - /* WiFi */ - sdmmc3_clk_pa6 { - nvidia,pins = "sdmmc3_clk_pa6"; - nvidia,function = "sdmmc3"; - nvidia,pull = ; - nvidia,tristate = ; - }; - sdmmc3_cmd_pa7 { - nvidia,pins = "sdmmc3_cmd_pa7", - "sdmmc3_dat0_pb7", - "sdmmc3_dat1_pb6", - "sdmmc3_dat2_pb5", - "sdmmc3_dat3_pb4", - "sdmmc3_dat6_pd3", // nRST - "sdmmc3_dat7_pd4"; // nPWRDN - nvidia,function = "sdmmc3"; - nvidia,pull = ; - nvidia,tristate = ; - }; - sdmmc3_drive { - nvidia,pins = "drive_sdio3"; - nvidia,high-speed-mode = ; - nvidia,schmitt = ; - nvidia,pull-down-strength = <46>; - nvidia,pull-up-strength = <42>; - nvidia,slew-rate-rising = ; - nvidia,slew-rate-falling = ; - }; -}; - -/* internal eMMC */ -&sdmmc4 { - status = "okay"; - bus-width = <8>; -// mmc-pwrseq = <&emmc_pwrseq>; - vmmc-supply = <&ldo1_reg>; - vqmmc-supply = <&vio_reg>; - non-removable; - no-sd; - no-sdio; - max-frequency = <16000000>; - nvidia,default-tap = <0x0F>; -}; - -/ { - emmc_pwrseq: emmc-pwrseq { - compatible = "mmc-pwrseq-emmc"; - reset-gpios = <&gpio TEGRA_GPIO(CC, 0) GPIO_ACTIVE_LOW>; - status = "disabled"; - }; -}; - -&pinmux_default_state { - sdmmc4_clk { - nvidia,pins = "sdmmc4_clk_pcc4", - "sdmmc4_cmd_pt7"; - nvidia,function = "sdmmc4"; - nvidia,pull = ; - nvidia,tristate = ; - nvidia,enable-input = ; - }; - sdmmc4_cmd { - nvidia,pins = "sdmmc4_dat0_paa0", - "sdmmc4_dat1_paa1", - "sdmmc4_dat2_paa2", - "sdmmc4_dat3_paa3", - "sdmmc4_dat4_paa4", - "sdmmc4_dat5_paa5", - "sdmmc4_dat6_paa6", - "sdmmc4_dat7_paa7"; - nvidia,function = "sdmmc4"; - nvidia,pull = ; - nvidia,tristate = ; - nvidia,enable-input = ; - }; - sdmmc4_rst_n { - nvidia,pins = "sdmmc4_rst_n_pcc3"; - nvidia,function = "vgp6"; - nvidia,pull = ; - nvidia,tristate = ; - nvidia,enable-input = ; - }; - cam_mclk_pcc0 { - nvidia,pins = "cam_mclk_pcc0"; - nvidia,function = "vi_alt3"; - nvidia,pull = ; - nvidia,tristate = ; - nvidia,enable-input = ; - }; - sdmmc4_drive { - nvidia,pins = "drive_gma", "drive_gmb", "drive_gmc", "drive_gmd"; - nvidia,pull-down-strength = <9>; - nvidia,pull-up-strength = <9>; - nvidia,slew-rate-rising = ; - nvidia,slew-rate-falling = ; - }; -}; - -/* USB via ASUS connector */ -&usb1 { - compatible = "nvidia,tegra30-udc"; - status = "okay"; - dr_mode = "peripheral"; -}; - -&phy1 { - status = "okay"; - nvidia,hssync-start-delay = <0>; - nvidia,xcvr-lsfslew = <2>; - nvidia,xcvr-lsrslew = <2>; -}; - -/* Dock's USB port */ -&usb3 { - status = "okay"; -}; - -&phy3 { - status = "okay"; -}; - -&pinmux_default_state { - /* Pad buttons */ - pad_buttons { - nvidia,pins = "pv0" /* power */, - "kb_col2_pq2" /* volup */, - "kb_col3_pq3" /* voldn */, - "pu4" /* dock detect */, - "kb_row14_ps6" /* hall sensor */, - "spi2_cs1_n_pw2"/* hp-detect */, - "gmi_ad12_ph4" /* touch-irq */; - nvidia,pull = ; - nvidia,tristate = ; - nvidia,enable-input = ; - }; - - /* ECs' lines */ - ec_irqs { - nvidia,pins = "kb_row10_ps2" /* pad */, - "kb_row15_ps7" /* dock */; - nvidia,pull = ; - nvidia,tristate = ; - nvidia,enable-input = ; - }; - ec_reqs { - nvidia,pins = "kb_col1_pq1" /* pad req */, - "kb_col6_pq6" /* dock req */; - nvidia,pull = ; - nvidia,tristate = ; - nvidia,enable-input = ; - }; - - /* sound */ - codec_irq { - nvidia,pins = "spi2_cs2_n_pw3"; - nvidia,pull = ; - nvidia,tristate = ; - nvidia,enable-input = ; - }; - - /* misc */ - blink { - nvidia,pins = "clk_32k_out_pa0"; - nbidia,function = "blink"; - nvidia,pull = ; - nvidia,tristate = ; - }; - - /* USB charging control */ - usb_charge_limit_out { - nvidia,pins = "kb_row1_pr1"; - nvidia,pull = ; - nvidia,tristate = ; - nvidia,enable-input = ; - }; - - /* HDMI hot-plug-detect */ - hdmi_hpd { - nvidia,pins = "hdmi_int_pn7"; - nvidia,tristate = ; - nvidia,enable-input = ; - }; - - /* bootstraps */ - bootstraps { - // TODO?: set out,no-pull for non-mf and in,pull-down for mf id pins below - nvidia,pins = - /* Cardhu PCBID */ - "gmi_cs2_n_pk3", - "gmi_cs1_n_pj2", - "gmi_cs0_n_pj0", - "kb_col5_pq5", - "kb_row2_pr2", - "kb_col7_pq7", - "kb_col4_pq4", - "kb_row5_pr5", - "kb_row4_pr4", - /* panel-type: panasonic [for TF700T] */ - "gmi_cs7_n_pi6", //mf - /* panel-type ID [for ME301T] */ - "gmi_a19_pk7", - /* unused */ - "kb_row0_pr0", - "gmi_a18_pb1"; //mf - nvidia,tristate = ; - nvidia,input-enable = ; - }; - - ext_bootstraps { - nvidia,pins = - /* Cardhu PCBID extension */ - "kb_row7_pr7", - "gmi_a17_pb0", - "gmi_a16_pj7", - "gmi_wp_n_pc7", //mf - /* Cardhu ProjectID extension */ - "gmi_cs3_n_pk4", //mf - "gmi_wait_pi7", - "gmi_cs6_n_pi3", - "gmi_cs4_n_pk2"; - nvidia,tristate = ; - nvidia,input-enable = ; - }; - - /* Memory type bootstrap */ - mem_boostraps { - nvidia,pins = "gmi_ad4_pg4", "gmi_ad5_pg5"; - nvidia,tristate = ; - nvidia,pull = ; - nvidia,input-enable = ; - }; - - /* GPIO power/drive control */ - pin_drive { - nvidia,pins = "drive_at1" /* PH0-7, PI5-6 */, - "drive_at2" /* PG0-7, PK0-4, PI0-4, PI7 */, - "drive_at3" /* PJ0, PC7 */, - "drive_at4" /* PB0-1, PK7, PJ2, PJ7 */, - "drive_at5" /* i2c2 */, - "drive_ao1" /* i2c5, PR0-7, PZ6-7 */, - "drive_ao2" /* clk_32k_in, PA0, core_pwr_req, cpu_pwr_req, PQ0-7, PS0-7, pwr_int_n, PZ5 */, - "drive_dap1" , - "drive_dap2" , - "drive_dbg" /* i2c1 */, - "drive_ddc" /* i2c4 */, - "drive_gme" /* i2c3 */, - "drive_uart3" /* bluetooth */; - nvidia,high-speed-mode = ; - nvidia,schmitt = ; - nvidia,pull-down-strength = <31>; - nvidia,pull-up-strength = <31>; - nvidia,slew-rate-rising = ; - nvidia,slew-rate-falling = ; - nvidia,low-power-mode = ; - }; - - /* I2C pins */ - i2c_pin_drive { - nvidia,pins = "drive_at5" /* i2c2 */, - "drive_ao1" /* i2c5, PR0-7, PZ6-7 */, - "drive_dap1" , - "drive_dap2" , - "drive_dbg" /* i2c1 */, - "drive_ddc" /* i2c4 */, - "drive_gme" /* i2c3 */, - "drive_uart3" /* bluetooth */; - nvidia,schmitt = ; - }; - - i2c_pins { - nvidia,pins = "gen1_i2c_scl_pc4", /* i2c1 */ - "gen1_i2c_sda_pc5", - "gen2_i2c_scl_pt5", /* i2c2 */ - "gen2_i2c_sda_pt6", - "cam_i2c_scl_pbb1", /* i2c3 */ - "cam_i2c_sda_pbb2", - "ddc_scl_pv4", /* i2c4 */ - "ddc_sda_pv5", - "pwr_i2c_scl_pz6", /* i2c5 */ - "pwr_i2c_sda_pz7"; - nvidia,open-drain = ; - }; - - sound { - nvidia,pins = "dap2_fs_pa2", - "dap2_sclk_pa3", - "dap2_din_pa4", - "dap2_dout_pa5"; - nvidia,function = "i2s1"; - nvidia,pull = ; - nvidia,tristate = ; - }; - - cec_pins { - nvidia,pins = "hdmi_cec_pee3"; - nvdia,function = "cec"; - nvidia,open-drain = ; - }; - - reg_od_enables { - nvidia,pins = "sdmmc3_dat4_pd1" /* reg */, - "vi_d6_pl4" /* reg, out */; -// "kb_row8_ps0" /* reg */, -// "vi_pclk_pt0" /* reg */; - -// nvidia,open-drain = ; - nvidia,pull = ; - nvidia,enable-input = ; - }; - - battery { - nvidia,pins = "lcd_cs0_n_pn4", - "kb_row12_ps4", - "kb_row13_ps5"; - nvidia,tristate = ; - nvidia,enable-input = ; - }; - - /* unknown */ - - unknowns_float { - nvidia,pins = "spi2_sck_px2" /* reg, in; non-TF300T */; - nvidia,tristate = ; - nvidia,enable-input = ; - }; - - unknowns_up { - nvidia,pins = "kb_row3_pr3", - "kb_col0_pq0", - "kb_row0_pr0", - "gmi_rst_n_pi4"; - nvidia,pull = ; - nvidia,tristate = ; - nvidia,enable-input = ; - }; -#if 0 - unknowns_down { - nvidia,pins = "gmi_ad15_ph7"; // cardhu: vibra - nvidia,pull = ; - nvidia,tristate = ; - nvidia,enable-input = ; - }; -#endif -}; From f9c2d9e6d3b762dc43ebdebf9db459b62cbd7d9d Mon Sep 17 00:00:00 2001 From: Svyatoslav Date: Sun, 24 Jan 2021 17:48:59 +0100 Subject: [PATCH 4/6] WIP: ARM: tegra: Add device-tree for ASUS Transformer Infinity TF700T Add device-tree for ASUS Transformer Infinity TF700T, which is NVIDIA Tegra30-based tablet device. Signed-off-by: Svyatoslav Ryhel Signed-off-by: Ion Agorria Tested-by: Jasper Korten --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/tegra30-asus-tf700t.dts | 797 ++++++++++++++++++++++ 2 files changed, 798 insertions(+) create mode 100644 arch/arm/boot/dts/tegra30-asus-tf700t.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index db5aaaed040a0..3534b9a599b88 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1261,6 +1261,7 @@ dtb-$(CONFIG_ARCH_TEGRA_3x_SOC) += \ tegra30-asus-nexus7-tilapia-E1565.dtb \ tegra30-asus-tf201.dtb \ tegra30-asus-tf300t.dtb \ + tegra30-asus-tf700t.dtb \ tegra30-beaver.dtb \ tegra30-cardhu-a02.dtb \ tegra30-cardhu-a04.dtb \ diff --git a/arch/arm/boot/dts/tegra30-asus-tf700t.dts b/arch/arm/boot/dts/tegra30-asus-tf700t.dts new file mode 100644 index 0000000000000..0592c042f40a1 --- /dev/null +++ b/arch/arm/boot/dts/tegra30-asus-tf700t.dts @@ -0,0 +1,797 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +/* This dts file describes the Asus Transformer Infinity TF700T tablet */ +/* CPU Speedo ID 5, Soc Speedo ID 2, CPU Process: 4, Core Process: 0 */ + +#include "tegra30-asus-transformer-common.dtsi" + +/ { + model = "Asus Transformer Infinity TF700T"; + compatible = "asus,tf700t", "nvidia,tegra30"; + + host1x@50000000 { + lcd: dc@54200000 { + rgb { + status = "okay"; + + port@0 { + lcd_output: endpoint { + remote-endpoint = <&lvds_encoder_input>; + bus-width = <24>; + }; + }; + }; + }; + }; + + pinmux@70000868 { + state_default: pinmux { + lcd_pwr2_pc6 { + nvidia,pins = "lcd_pwr2_pc6", + "lcd_dc1_pd2"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + pbb3 { + nvidia,pins = "pbb3"; + nvidia,function = "vgp3"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + spi2_mosi_px0 { + nvidia,pins = "spi2_mosi_px0"; + nvidia,function = "spi2"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + pbb7 { + nvidia,pins = "pbb7"; + nvidia,function = "i2s4"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + kb_row7_pr7 { + nvidia,pins = "kb_row7_pr7"; + nvidia,function = "kbc"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + gmi_cs4_n_pk2 { + nvidia,pins = "gmi_cs4_n_pk2"; + nvidia,function = "gmi"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + cam_mclk_pcc0 { + nvidia,pins = "cam_mclk_pcc0"; + nvidia,function = "vi_alt3"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + }; + }; + + i2c@7000c400 { /*i2c2*/ + /* Elantech ELAN-3024-7053 or 5184N FPC-1 REV: 2/3 touchscreen */ + touchscreen@10 { + compatible = "elan,ektf3624"; + reg = <0x10>; + + interrupt-parent = <&gpio>; + interrupts = ; + reset-gpios = <&gpio TEGRA_GPIO(H, 6) GPIO_ACTIVE_LOW>; + wakeup-source; + + vcc33-supply = <&vdd_3v3_sys>; + vccio-supply = <&vdd_3v3_sys>; + + touchscreen-size-x = <2240>; + touchscreen-size-y = <1408>; + touchscreen-inverted-y; + }; + }; + + i2c@7000c500 { /*i2c3*/ + clock-frequency = <100000>; + + magnetometer@e { + mount-matrix = "1", "0", "0", + "0", "-1", "0", + "0", "0", "-1"; + }; + + gyroscope@68 { + mount-matrix = "0", "1", "0", + "1", "0", "0", + "0", "0", "-1"; + + /* External I2C interface */ + i2c-gate { + accelerometer@f { + mount-matrix = "0", "-1", "0", + "-1", "0", "0", + "0", "0", "1"; + }; + }; + }; + }; + + i2c@7000d000 { /*i2c5*/ + /* Realtek ALC5631 audio codec */ + rt5631: audio-codec@1a { + compatible = "realtek,rt5631"; + reg = <0x1a>; + }; + }; + + /* Panasonic VVX10F004B00 or HYDIS HV101WU1-1E1 LCD SuperIPS+ Full HD panel */ + display-panel { + compatible = "panel-lvds"; + + power-supply = <&vdd_pnl>; + backlight = <&backlight_lvds>; + + width-mm = <217>; + height-mm = <136>; + + data-mapping = "jeida-24"; + + panel-timing { + /* 1920x1200@60Hz */ + clock-frequency = <154000000>; + hactive = <1920>; + vactive = <1200>; + hfront-porch = <48>; + hback-porch = <80>; + hsync-len = <32>; + vsync-len = <6>; + vfront-porch = <3>; + vback-porch = <26>; + }; + + port { + panel_input: endpoint { + remote-endpoint = <&lvds_encoder_output>; + }; + }; + }; + + /* Texas Instruments SN75LVDS83B LVDS Transmitter */ + lvds-encoder { + compatible = "ti,sn75lvds83", "lvds-encoder"; + + powerdown-gpios = <&gpio TEGRA_GPIO(N, 6) GPIO_ACTIVE_LOW>; + power-supply = <&vdd_3v3_sys>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + lvds_encoder_input: endpoint { + remote-endpoint = <&lcd_output>; + }; + }; + + port@1 { + reg = <1>; + + lvds_encoder_output: endpoint { + remote-endpoint = <&panel_input>; + }; + }; + }; + }; + + vibrator { + compatible = "gpio-vibrator"; + enable-gpios = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_HIGH>; + vcc-supply = <&vdd_3v3_sys>; + }; + + sound { + compatible = "nvidia,tegra-audio-rt5631-tf700t", + "nvidia,tegra-audio-rt5631"; + nvidia,model = "TF700T RT5631"; + + nvidia,audio-routing = + "Headphone Jack", "HPOL", + "Headphone Jack", "HPOR", + "Int Spk", "SPOL", + "Int Spk", "SPOR", + "MIC1", "MIC Bias1", + "MIC Bias1", "Mic Jack", + "DMIC", "Int Mic"; + + nvidia,audio-codec = <&rt5631>; + }; + + memory-controller@7000f000 { + emc-timings-0 { + /* TF700T Micron 1GB 800MHZ */ + nvidia,ram-code = <0>; + + timing-25500000 { + clock-frequency = <25500000>; + + nvidia,emem-configuration = < 0x00020001 0xc0000020 + 0x00000001 0x00000001 0x00000002 0x00000000 + 0x00000001 0x00000001 0x00000003 0x00000008 + 0x00000002 0x00000001 0x00000002 0x00000006 + 0x06020102 0x000a0502 0x75830303 0x001f0000 >; + }; + + timing-51000000 { + clock-frequency = <51000000>; + + nvidia,emem-configuration = < 0x00010001 0xc0000020 + 0x00000001 0x00000001 0x00000002 0x00000000 + 0x00000001 0x00000001 0x00000003 0x00000008 + 0x00000002 0x00000001 0x00000002 0x00000006 + 0x06020102 0x000a0502 0x74630303 0x001f0000 >; + }; + + timing-102000000 { + clock-frequency = <102000000>; + + nvidia,emem-configuration = < 0x00000001 0xc0000030 + 0x00000001 0x00000001 0x00000003 0x00000000 + 0x00000002 0x00000001 0x00000003 0x00000008 + 0x00000002 0x00000001 0x00000002 0x00000006 + 0x06020102 0x000a0503 0x73c30504 0x001f0000 >; + }; + + timing-204000000 { + clock-frequency = <204000000>; + + nvidia,emem-configuration = < 0x00000003 0xc0000025 + 0x00000001 0x00000001 0x00000005 0x00000002 + 0x00000004 0x00000001 0x00000003 0x00000008 + 0x00000002 0x00000001 0x00000002 0x00000006 + 0x06020102 0x000a0505 0x73840a06 0x001f0000 >; + }; + + timing-400000000 { + clock-frequency = <400000000>; + + nvidia,emem-configuration = < 0x00000006 0xc0000048 + 0x00000001 0x00000002 0x00000009 0x00000005 + 0x00000007 0x00000001 0x00000002 0x00000008 + 0x00000002 0x00000002 0x00000003 0x00000006 + 0x06030202 0x000d0709 0x7086120a 0x001f0000 >; + }; + + timing-800000000 { + clock-frequency = <800000000>; + + nvidia,emem-configuration = < 0x0000000c 0xc0000090 + 0x00000004 0x00000005 0x00000013 0x0000000c + 0x0000000f 0x00000002 0x00000003 0x0000000c + 0x00000002 0x00000002 0x00000004 0x00000008 + 0x08040202 0x00160d13 0x712c2414 0x001f0000 >; + }; + }; + + emc-timings-1 { + /* TF700T Elpida 1GB 800MHZ */ + nvidia,ram-code = <1>; + + timing-25500000 { + clock-frequency = <25500000>; + + nvidia,emem-configuration = < 0x00020001 0xc0000020 + 0x00000001 0x00000001 0x00000002 0x00000000 + 0x00000001 0x00000001 0x00000003 0x00000008 + 0x00000002 0x00000001 0x00000002 0x00000006 + 0x06020102 0x000a0502 0x75830303 0x001f0000 >; + }; + + timing-51000000 { + clock-frequency = <51000000>; + + nvidia,emem-configuration = < 0x00010001 0xc0000020 + 0x00000001 0x00000001 0x00000002 0x00000000 + 0x00000001 0x00000001 0x00000003 0x00000008 + 0x00000002 0x00000001 0x00000002 0x00000006 + 0x06020102 0x000a0502 0x74630303 0x001f0000 >; + }; + + timing-102000000 { + clock-frequency = <102000000>; + + nvidia,emem-configuration = < 0x00000001 0xc0000030 + 0x00000001 0x00000001 0x00000003 0x00000000 + 0x00000002 0x00000001 0x00000003 0x00000008 + 0x00000002 0x00000001 0x00000002 0x00000006 + 0x06020102 0x000a0503 0x73c30504 0x001f0000 >; + }; + + timing-204000000 { + clock-frequency = <204000000>; + + nvidia,emem-configuration = < 0x00000003 0xc0000025 + 0x00000001 0x00000001 0x00000005 0x00000002 + 0x00000004 0x00000001 0x00000003 0x00000008 + 0x00000002 0x00000001 0x00000002 0x00000006 + 0x06020102 0x000a0505 0x73840a06 0x001f0000 >; + }; + + timing-400000000 { + clock-frequency = <400000000>; + + nvidia,emem-configuration = < 0x00000006 0xc0000048 + 0x00000001 0x00000002 0x00000009 0x00000005 + 0x00000007 0x00000001 0x00000002 0x00000008 + 0x00000002 0x00000002 0x00000003 0x00000006 + 0x06030202 0x000d0709 0x7086120a 0x001f0000 >; + }; + + timing-800000000 { + clock-frequency = <800000000>; + + nvidia,emem-configuration = < 0x0000000c 0xc0000090 + 0x00000004 0x00000005 0x00000013 0x0000000c + 0x0000000f 0x00000002 0x00000003 0x0000000c + 0x00000002 0x00000002 0x00000004 0x00000008 + 0x08040202 0x00160d13 0x712c2414 0x001f0000 >; + }; + }; + }; + + memory-controller@7000f400 { + emc-timings-0 { + /* TF700T Micron 1GB 800MHZ */ + nvidia,ram-code = <0>; + + timing-25500000 { + clock-frequency = <25500000>; + + nvidia,emc-auto-cal-interval = <0x001fffff>; + nvidia,emc-mode-1 = <0x80100003>; + nvidia,emc-mode-2 = <0x80200008>; + nvidia,emc-mode-reset = <0x80001221>; + nvidia,emc-zcal-cnt-long = <0x00000040>; + nvidia,emc-cfg-dyn-self-ref; + nvidia,emc-cfg-periodic-qrst; + + nvidia,emc-configuration = < 0x00000001 + 0x00000006 0x00000000 0x00000000 0x00000002 + 0x0000000a 0x00000005 0x0000000b 0x00000000 + 0x00000000 0x00000003 0x00000001 0x00000000 + 0x00000005 0x00000005 0x00000004 0x0000000a + 0x0000000b 0x000000c0 0x00000000 0x00000030 + 0x00000002 0x00000002 0x00000001 0x00000000 + 0x00000007 0x0000000f 0x00000007 0x00000007 + 0x00000004 0x00000002 0x00000000 0x00000004 + 0x00000005 0x000000c7 0x00000006 0x00000004 + 0x00000000 0x00000000 0x00004288 0x007800a4 + 0x00008000 0x000fc000 0x000fc000 0x000fc000 + 0x000fc000 0x000fc000 0x000fc000 0x000fc000 + 0x000fc000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x000fc000 0x000fc000 0x000fc000 + 0x000fc000 0x000002a0 0x0800211c 0x00000000 + 0x77fff884 0x01f1f108 0x05057404 0x54000007 + 0x08000168 0x08000000 0x00000802 0x00000000 + 0x00000040 0x000c000c 0xa0f10000 0x00000000 + 0x00000000 0x80000287 0xe8000000 0xff00ff00 >; + }; + + timing-51000000 { + clock-frequency = <51000000>; + + nvidia,emc-auto-cal-interval = <0x001fffff>; + nvidia,emc-mode-1 = <0x80100003>; + nvidia,emc-mode-2 = <0x80200008>; + nvidia,emc-mode-reset = <0x80001221>; + nvidia,emc-zcal-cnt-long = <0x00000040>; + nvidia,emc-cfg-dyn-self-ref; + nvidia,emc-cfg-periodic-qrst; + + nvidia,emc-configuration = < 0x00000002 + 0x0000000d 0x00000001 0x00000000 0x00000002 + 0x0000000a 0x00000005 0x0000000b 0x00000000 + 0x00000000 0x00000003 0x00000001 0x00000000 + 0x00000005 0x00000005 0x00000004 0x0000000a + 0x0000000b 0x00000181 0x00000000 0x00000060 + 0x00000002 0x00000002 0x00000001 0x00000000 + 0x00000007 0x0000000f 0x0000000e 0x0000000e + 0x00000004 0x00000003 0x00000000 0x00000004 + 0x00000005 0x0000018e 0x00000006 0x00000004 + 0x00000000 0x00000000 0x00004288 0x007800a4 + 0x00008000 0x000fc000 0x000fc000 0x000fc000 + 0x000fc000 0x000fc000 0x000fc000 0x000fc000 + 0x000fc000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x000fc000 0x000fc000 0x000fc000 + 0x000fc000 0x000002a0 0x0800211c 0x00000000 + 0x77fff884 0x01f1f108 0x05057404 0x54000007 + 0x08000168 0x08000000 0x00000802 0x00000000 + 0x00000040 0x000c000c 0xa0f10000 0x00000000 + 0x00000000 0x8000040b 0xe8000000 0xff00ff00 >; + }; + + timing-102000000 { + clock-frequency = <102000000>; + + nvidia,emc-auto-cal-interval = <0x001fffff>; + nvidia,emc-mode-1 = <0x80100003>; + nvidia,emc-mode-2 = <0x80200008>; + nvidia,emc-mode-reset = <0x80001221>; + nvidia,emc-zcal-cnt-long = <0x00000040>; + nvidia,emc-cfg-dyn-self-ref; + nvidia,emc-cfg-periodic-qrst; + + nvidia,emc-configuration = < 0x00000004 + 0x0000001a 0x00000003 0x00000001 0x00000002 + 0x0000000a 0x00000005 0x0000000b 0x00000001 + 0x00000001 0x00000003 0x00000001 0x00000000 + 0x00000005 0x00000005 0x00000004 0x0000000a + 0x0000000b 0x00000303 0x00000000 0x000000c0 + 0x00000002 0x00000002 0x00000001 0x00000000 + 0x00000007 0x0000000f 0x0000001c 0x0000001c + 0x00000004 0x00000005 0x00000000 0x00000004 + 0x00000005 0x0000031c 0x00000006 0x00000004 + 0x00000000 0x00000000 0x00004288 0x007800a4 + 0x00008000 0x000fc000 0x000fc000 0x000fc000 + 0x000fc000 0x000fc000 0x000fc000 0x000fc000 + 0x000fc000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x000fc000 0x000fc000 0x000fc000 + 0x000fc000 0x000002a0 0x0800211c 0x00000000 + 0x77fff884 0x01f1f108 0x05057404 0x54000007 + 0x08000168 0x08000000 0x00000802 0x00000000 + 0x00000040 0x000c000c 0xa0f10000 0x00000000 + 0x00000000 0x80000713 0xe8000000 0xff00ff00 >; + }; + + timing-204000000 { + clock-frequency = <204000000>; + + nvidia,emc-auto-cal-interval = <0x001fffff>; + nvidia,emc-mode-1 = <0x80100003>; + nvidia,emc-mode-2 = <0x80200008>; + nvidia,emc-mode-reset = <0x80001221>; + nvidia,emc-zcal-cnt-long = <0x00000040>; + nvidia,emc-cfg-dyn-self-ref; + nvidia,emc-cfg-periodic-qrst; + + nvidia,emc-configuration = < 0x00000009 + 0x00000035 0x00000007 0x00000002 0x00000002 + 0x0000000a 0x00000005 0x0000000b 0x00000002 + 0x00000002 0x00000003 0x00000001 0x00000000 + 0x00000005 0x00000006 0x00000004 0x0000000a + 0x0000000b 0x00000607 0x00000000 0x00000181 + 0x00000002 0x00000002 0x00000001 0x00000000 + 0x00000007 0x0000000f 0x00000038 0x00000038 + 0x00000004 0x00000009 0x00000000 0x00000004 + 0x00000005 0x00000638 0x00000007 0x00000004 + 0x00000000 0x00000000 0x00004288 0x004400a4 + 0x00008000 0x00080000 0x00080000 0x00080000 + 0x00080000 0x00080000 0x00080000 0x00080000 + 0x00080000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00080000 0x00080000 0x00080000 + 0x00080000 0x000002a0 0x0800211c 0x00000000 + 0x77fff884 0x01f1f108 0x05057404 0x54000007 + 0x08000168 0x08000000 0x00000802 0x00020000 + 0x00000100 0x000c000c 0xa0f10000 0x00000000 + 0x00000000 0x80000d22 0xe8000000 0xff00ff00 >; + }; + + timing-400000000 { + clock-frequency = <400000000>; + + nvidia,emc-auto-cal-interval = <0x001fffff>; + nvidia,emc-mode-1 = <0x80100002>; + nvidia,emc-mode-2 = <0x80200000>; + nvidia,emc-mode-reset = <0x80000521>; + nvidia,emc-zcal-cnt-long = <0x00000040>; + + nvidia,emc-configuration = < 0x00000012 + 0x00000066 0x0000000c 0x00000004 0x00000003 + 0x00000008 0x00000002 0x0000000a 0x00000004 + 0x00000004 0x00000002 0x00000001 0x00000000 + 0x00000004 0x00000006 0x00000004 0x0000000a + 0x0000000c 0x00000bf0 0x00000000 0x000002fc + 0x00000001 0x00000008 0x00000001 0x00000000 + 0x00000008 0x0000000f 0x0000006c 0x00000200 + 0x00000004 0x00000010 0x00000000 0x00000004 + 0x00000005 0x00000c30 0x00000000 0x00000004 + 0x00000000 0x00000000 0x00007088 0x001d0084 + 0x00008000 0x00044000 0x00044000 0x00044000 + 0x00044000 0x00014000 0x00014000 0x00014000 + 0x00014000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00048000 0x00048000 0x00048000 + 0x00048000 0x000002a0 0x0600013d 0x00000000 + 0x77fff884 0x01f1f508 0x05057404 0x54000007 + 0x080001e8 0x08000021 0x00000802 0x00020000 + 0x00000100 0x0158000c 0xa0f10000 0x00000000 + 0x00000000 0x800018c8 0xe8000000 0xff00ff89 >; + }; + + timing-800000000 { + clock-frequency = <800000000>; + + nvidia,emc-auto-cal-interval = <0x001fffff>; + nvidia,emc-mode-1 = <0x80100002>; + nvidia,emc-mode-2 = <0x80200018>; + nvidia,emc-mode-reset = <0x80000d71>; + nvidia,emc-zcal-cnt-long = <0x00000040>; + nvidia,emc-cfg-periodic-qrst; + + nvidia,emc-configuration = < 0x00000025 + 0x000000ce 0x0000001a 0x00000009 0x00000005 + 0x0000000d 0x00000004 0x00000013 0x00000009 + 0x00000009 0x00000004 0x00000001 0x00000000 + 0x00000007 0x0000000a 0x00000009 0x0000000a + 0x00000011 0x00001820 0x00000000 0x00000608 + 0x00000003 0x00000012 0x00000001 0x00000000 + 0x0000000f 0x00000018 0x000000d8 0x00000200 + 0x00000005 0x00000020 0x00000000 0x00000007 + 0x00000008 0x00001860 0x0000000b 0x00000006 + 0x00000000 0x00000000 0x00005088 0xf0070191 + 0x00008000 0x0000000a 0x0000000a 0x0000000a + 0x0000000a 0x0000000a 0x0000000a 0x0000000a + 0x0000000a 0x00018000 0x00018000 0x00018000 + 0x00018000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x0000000a 0x0000000a 0x0000000a + 0x0000000a 0x000002a0 0x0800013d 0x22220000 + 0x77fff884 0x01f1f501 0x07077404 0x54000000 + 0x080001e8 0x08000021 0x00000802 0x00020000 + 0x00000100 0x00f0000c 0xa0f10000 0x00000000 + 0x00000000 0x8000308c 0xe8000000 0xff00ff49 >; + }; + }; + + emc-timings-1 { + /* TF700T Elpida 1GB 800MHZ */ + nvidia,ram-code = <1>; + + timing-25500000 { + clock-frequency = <25500000>; + + nvidia,emc-auto-cal-interval = <0x001fffff>; + nvidia,emc-mode-1 = <0x80100003>; + nvidia,emc-mode-2 = <0x80200008>; + nvidia,emc-mode-reset = <0x80001221>; + nvidia,emc-zcal-cnt-long = <0x00000040>; + nvidia,emc-cfg-dyn-self-ref; + nvidia,emc-cfg-periodic-qrst; + + nvidia,emc-configuration = < 0x00000001 + 0x00000006 0x00000000 0x00000000 0x00000002 + 0x0000000a 0x00000005 0x0000000b 0x00000000 + 0x00000000 0x00000003 0x00000001 0x00000000 + 0x00000005 0x00000005 0x00000004 0x0000000a + 0x0000000b 0x000000c0 0x00000000 0x00000030 + 0x00000002 0x00000002 0x00000001 0x00000000 + 0x00000007 0x0000000f 0x00000007 0x00000007 + 0x00000004 0x00000002 0x00000000 0x00000004 + 0x00000005 0x000000c7 0x00000006 0x00000004 + 0x00000000 0x00000000 0x00004288 0x007800a4 + 0x00008000 0x000fc000 0x000fc000 0x000fc000 + 0x000fc000 0x000fc000 0x000fc000 0x000fc000 + 0x000fc000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x000fc000 0x000fc000 0x000fc000 + 0x000fc000 0x000002a0 0x0800211c 0x00000000 + 0x77fff884 0x01f1f108 0x05057404 0x54000007 + 0x08000168 0x08000000 0x00000802 0x00000000 + 0x00000040 0x000c000c 0xa0f10000 0x00000000 + 0x00000000 0x80000287 0xe8000000 0xff00ff00 >; + }; + + timing-51000000 { + clock-frequency = <51000000>; + + nvidia,emc-auto-cal-interval = <0x001fffff>; + nvidia,emc-mode-1 = <0x80100003>; + nvidia,emc-mode-2 = <0x80200008>; + nvidia,emc-mode-reset = <0x80001221>; + nvidia,emc-zcal-cnt-long = <0x00000040>; + nvidia,emc-cfg-dyn-self-ref; + nvidia,emc-cfg-periodic-qrst; + + nvidia,emc-configuration = < 0x00000002 + 0x0000000d 0x00000001 0x00000000 0x00000002 + 0x0000000a 0x00000005 0x0000000b 0x00000000 + 0x00000000 0x00000003 0x00000001 0x00000000 + 0x00000005 0x00000005 0x00000004 0x0000000a + 0x0000000b 0x00000181 0x00000000 0x00000060 + 0x00000002 0x00000002 0x00000001 0x00000000 + 0x00000007 0x0000000f 0x0000000e 0x0000000e + 0x00000004 0x00000003 0x00000000 0x00000004 + 0x00000005 0x0000018e 0x00000006 0x00000004 + 0x00000000 0x00000000 0x00004288 0x007800a4 + 0x00008000 0x000fc000 0x000fc000 0x000fc000 + 0x000fc000 0x000fc000 0x000fc000 0x000fc000 + 0x000fc000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x000fc000 0x000fc000 0x000fc000 + 0x000fc000 0x000002a0 0x0800211c 0x00000000 + 0x77fff884 0x01f1f108 0x05057404 0x54000007 + 0x08000168 0x08000000 0x00000802 0x00000000 + 0x00000040 0x000c000c 0xa0f10000 0x00000000 + 0x00000000 0x8000040b 0xe8000000 0xff00ff00 >; + }; + + timing-102000000 { + clock-frequency = <102000000>; + + nvidia,emc-auto-cal-interval = <0x001fffff>; + nvidia,emc-mode-1 = <0x80100003>; + nvidia,emc-mode-2 = <0x80200008>; + nvidia,emc-mode-reset = <0x80001221>; + nvidia,emc-zcal-cnt-long = <0x00000040>; + nvidia,emc-cfg-dyn-self-ref; + nvidia,emc-cfg-periodic-qrst; + + nvidia,emc-configuration = < 0x00000004 + 0x0000001a 0x00000003 0x00000001 0x00000002 + 0x0000000a 0x00000005 0x0000000b 0x00000001 + 0x00000001 0x00000003 0x00000001 0x00000000 + 0x00000005 0x00000005 0x00000004 0x0000000a + 0x0000000b 0x00000303 0x00000000 0x000000c0 + 0x00000002 0x00000002 0x00000001 0x00000000 + 0x00000007 0x0000000f 0x0000001c 0x0000001c + 0x00000004 0x00000005 0x00000000 0x00000004 + 0x00000005 0x0000031c 0x00000006 0x00000004 + 0x00000000 0x00000000 0x00004288 0x007800a4 + 0x00008000 0x000fc000 0x000fc000 0x000fc000 + 0x000fc000 0x000fc000 0x000fc000 0x000fc000 + 0x000fc000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x000fc000 0x000fc000 0x000fc000 + 0x000fc000 0x000002a0 0x0800211c 0x00000000 + 0x77fff884 0x01f1f108 0x05057404 0x54000007 + 0x08000168 0x08000000 0x00000802 0x00000000 + 0x00000040 0x000c000c 0xa0f10000 0x00000000 + 0x00000000 0x80000713 0xe8000000 0xff00ff00 >; + }; + + timing-204000000 { + clock-frequency = <204000000>; + + nvidia,emc-auto-cal-interval = <0x001fffff>; + nvidia,emc-mode-1 = <0x80100003>; + nvidia,emc-mode-2 = <0x80200008>; + nvidia,emc-mode-reset = <0x80001221>; + nvidia,emc-zcal-cnt-long = <0x00000040>; + nvidia,emc-cfg-dyn-self-ref; + nvidia,emc-cfg-periodic-qrst; + + nvidia,emc-configuration = < 0x00000009 + 0x00000035 0x00000007 0x00000002 0x00000002 + 0x0000000a 0x00000005 0x0000000b 0x00000002 + 0x00000002 0x00000003 0x00000001 0x00000000 + 0x00000005 0x00000006 0x00000004 0x0000000a + 0x0000000b 0x00000607 0x00000000 0x00000181 + 0x00000002 0x00000002 0x00000001 0x00000000 + 0x00000007 0x0000000f 0x00000038 0x00000038 + 0x00000004 0x00000009 0x00000000 0x00000004 + 0x00000005 0x00000638 0x00000007 0x00000004 + 0x00000000 0x00000000 0x00004288 0x004400a4 + 0x00008000 0x00080000 0x00080000 0x00080000 + 0x00080000 0x00080000 0x00080000 0x00080000 + 0x00080000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00080000 0x00080000 0x00080000 + 0x00080000 0x000002a0 0x0800211c 0x00000000 + 0x77fff884 0x01f1f108 0x05057404 0x54000007 + 0x08000168 0x08000000 0x00000802 0x00020000 + 0x00000100 0x000c000c 0xa0f10000 0x00000000 + 0x00000000 0x80000d22 0xe8000000 0xff00ff00 >; + }; + + timing-400000000 { + clock-frequency = <400000000>; + + nvidia,emc-auto-cal-interval = <0x001fffff>; + nvidia,emc-mode-1 = <0x80100002>; + nvidia,emc-mode-2 = <0x80200000>; + nvidia,emc-mode-reset = <0x80000521>; + nvidia,emc-zcal-cnt-long = <0x00000040>; + + nvidia,emc-configuration = < 0x00000012 + 0x00000066 0x0000000c 0x00000004 0x00000003 + 0x00000008 0x00000002 0x0000000a 0x00000004 + 0x00000004 0x00000002 0x00000001 0x00000000 + 0x00000004 0x00000006 0x00000004 0x0000000a + 0x0000000c 0x00000bf0 0x00000000 0x000002fc + 0x00000001 0x00000008 0x00000001 0x00000000 + 0x00000008 0x0000000f 0x0000006c 0x00000200 + 0x00000004 0x00000010 0x00000000 0x00000004 + 0x00000005 0x00000c30 0x00000000 0x00000004 + 0x00000000 0x00000000 0x00007088 0x001d0084 + 0x00008000 0x00044000 0x00044000 0x00044000 + 0x00044000 0x00014000 0x00014000 0x00014000 + 0x00014000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00048000 0x00048000 0x00048000 + 0x00048000 0x000002a0 0x0600013d 0x00000000 + 0x77fff884 0x01f1f508 0x05057404 0x54000007 + 0x080001e8 0x08000021 0x00000802 0x00020000 + 0x00000100 0x0158000c 0xa0f10000 0x00000000 + 0x00000000 0x800018c8 0xe8000000 0xff00ff89 >; + }; + + timing-800000000 { + clock-frequency = <800000000>; + + nvidia,emc-auto-cal-interval = <0x001fffff>; + nvidia,emc-mode-1 = <0x80100002>; + nvidia,emc-mode-2 = <0x80200018>; + nvidia,emc-mode-reset = <0x80000d71>; + nvidia,emc-zcal-cnt-long = <0x00000040>; + nvidia,emc-cfg-periodic-qrst; + + nvidia,emc-configuration = < 0x00000025 + 0x000000ce 0x0000001a 0x00000009 0x00000005 + 0x0000000d 0x00000004 0x00000013 0x00000009 + 0x00000009 0x00000004 0x00000001 0x00000000 + 0x00000007 0x0000000a 0x00000009 0x0000000a + 0x00000011 0x00001820 0x00000000 0x00000608 + 0x00000003 0x00000012 0x00000001 0x00000000 + 0x0000000f 0x00000018 0x000000d8 0x00000200 + 0x00000005 0x00000020 0x00000000 0x00000007 + 0x00000008 0x00001860 0x0000000b 0x00000006 + 0x00000000 0x00000000 0x00005088 0xf0070191 + 0x00008000 0x0000000a 0x0000000a 0x0000000a + 0x0000000a 0x0000000a 0x0000000a 0x0000000a + 0x0000000a 0x00018000 0x00018000 0x00018000 + 0x00018000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x0000000a 0x0000000a 0x0000000a + 0x0000000a 0x000002a0 0x0a00013d 0x22220000 + 0x77fff884 0x01f1f501 0x07077404 0x54000000 + 0x080001e8 0x08000021 0x00000802 0x00020000 + 0x00000100 0x00f0000c 0xa0f10000 0x00000000 + 0x00000000 0x8000308c 0xe8000000 0xff00ff49 >; + }; + }; + }; +}; + +&emc_icc_dvfs_opp_table { + /delete-node/ opp@900000000,1350; +}; + +&emc_bw_dfs_opp_table { + /delete-node/ opp@900000000; +}; From b14c7fa16d72341d5b4dcfc0d60835fa0f026d9c Mon Sep 17 00:00:00 2001 From: Svyatoslav Date: Mon, 25 Jan 2021 08:01:32 +0200 Subject: [PATCH 5/6] ASoC: tegra: add tegra RT5631 machine driver Driver for Realtek ALC5631/RT5631 codec. RT5631 is used on ASUS TF201 and TF700T. Base code was taken from 3.1 Android kernel, heavily cleaned and aligned with tegra_rt5640. Signed-off-by: Svyatoslav Ryhel Signed-off-by: Ion Agorria --- .../sound/nvidia,tegra-audio-rt5631.yaml | 129 +++++++++ sound/soc/tegra/Kconfig | 8 + sound/soc/tegra/Makefile | 2 + sound/soc/tegra/tegra_rt5631.c | 261 ++++++++++++++++++ 4 files changed, 400 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/nvidia,tegra-audio-rt5631.yaml create mode 100644 sound/soc/tegra/tegra_rt5631.c diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-rt5631.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-rt5631.yaml new file mode 100644 index 0000000000000..82c50750da86a --- /dev/null +++ b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-rt5631.yaml @@ -0,0 +1,129 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- + +$id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-rt5631.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Tegra with RT5683 ASoC sound card driver + +description: | + This is binding describes the Realtek ALC5631/RT5631 sound codec card. + +maintainers: + - Stephen Warren + +properties: + compatible: + enum: + - nvidia,tegra-audio-rt5631 + + clocks: + minItems: 3 + items: + - description: PLL A clock + - description: PLL A OUT0 clock + - description: The Tegra cdev1/extern1 clock, which feeds the card's mclk + + clock-names: + minItems: 3 + items: + - const: pll_a + - const: pll_a_out0 + - const: mclk + + assigned-clocks: + minItems: 1 + maxItems: 3 + + assigned-clock-parents: + minItems: 1 + maxItems: 3 + + assigned-clock-rates: + minItems: 1 + maxItems: 3 + + nvidia,model: + $ref: /schemas/types.yaml#/definitions/string + description: The user-visible name of this sound complex. + + nvidia,audio-routing: + $ref: /schemas/types.yaml#/definitions/non-unique-string-array + description: | + A list of the connections between audio components. + Each entry is a pair of strings, the first being the connection's sink, + the second being the connection's source. Valid names for sources and + sinks are the RT5631's pins (as documented in its binding), and the jacks + on the board: + + * Int Spk + * Headphone Jack + * Mic Jack + * Int Mic + + nvidia,i2s-controller: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: The phandle of the Tegra I2S1 controller + + nvidia,audio-codec: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: The phandle of the RT5631 audio codec + + nvidia,hp-mute-gpios: + description: The GPIO that mutes the headphones (button event) + + nvidia,hp-det-gpios: + description: The GPIO that detect headphones are plugged in + +additionalProperties: false + +required: + - compatible + - clocks + - clock-names + - assigned-clocks + - assigned-clock-parents + - nvidia,model + - nvidia,audio-routing + - nvidia,i2s-controller + - nvidia,audio-codec + +examples: + - | + #include + #include + #include + + sound { + compatible = "nvidia,tegra-audio-rt5631"; + nvidia,model = "NVIDIA Tegra Transformer"; + + nvidia,audio-routing = + "Headphone Jack", "HPOL", + "Headphone Jack", "HPOR", + "Int Spk", "SPOL", + "Int Spk", "SPOR", + "MIC1", "MIC Bias1", + "MIC Bias1", "Mic Jack", + "DMIC", "Int Mic"; + + nvidia,i2s-controller = <&tegra_i2s1>; + nvidia,audio-codec = <&rt5631>; + + nvidia,hp-det-gpios = <&gpio 178 GPIO_ACTIVE_LOW>; + nvidia,hp-mute-gpios = <&gpio 186 GPIO_ACTIVE_LOW>; + + clocks = <&tegra_car TEGRA30_CLK_PLL_A>, + <&tegra_car TEGRA30_CLK_PLL_A_OUT0>, + <&tegra_pmc TEGRA_PMC_CLK_OUT_1>; + clock-names = "pll_a", "pll_a_out0", "mclk"; + + assigned-clocks = <&tegra_car TEGRA30_CLK_EXTERN1>, + <&tegra_pmc TEGRA_PMC_CLK_OUT_1>; + + assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>, + <&tegra_car TEGRA30_CLK_EXTERN1>; + }; + +... diff --git a/sound/soc/tegra/Kconfig b/sound/soc/tegra/Kconfig index acaf7339168df..449a858f155df 100644 --- a/sound/soc/tegra/Kconfig +++ b/sound/soc/tegra/Kconfig @@ -126,6 +126,14 @@ config SND_SOC_TEGRA_AUDIO_GRAPH_CARD few things for Tegra audio. Most of the code is re-used from audio graph driver and the same DT bindings are used. +config SND_SOC_TEGRA_RT5631 + tristate "SoC Audio support for Tegra boards using an RT5631 codec" + depends on SND_SOC_TEGRA && I2C && GPIOLIB + select SND_SOC_RT5631 + help + Say Y or M here if you want to add support for SoC audio on Tegra + boards using the RT5631 codec, such as Transformer. + config SND_SOC_TEGRA_RT5640 tristate "SoC Audio support for Tegra boards using an RT5640 codec" depends on SND_SOC_TEGRA && I2C && GPIOLIB diff --git a/sound/soc/tegra/Makefile b/sound/soc/tegra/Makefile index af0b9889306c2..11debfc03bc41 100644 --- a/sound/soc/tegra/Makefile +++ b/sound/soc/tegra/Makefile @@ -29,6 +29,7 @@ obj-$(CONFIG_SND_SOC_TEGRA186_DSPK) += snd-soc-tegra186-dspk.o obj-$(CONFIG_SND_SOC_TEGRA210_ADMAIF) += snd-soc-tegra210-admaif.o # Tegra machine Support +snd-soc-tegra-rt5631-objs := tegra_rt5631.o snd-soc-tegra-rt5640-objs := tegra_rt5640.o snd-soc-tegra-rt5677-objs := tegra_rt5677.o snd-soc-tegra-wm8753-objs := tegra_wm8753.o @@ -41,6 +42,7 @@ snd-soc-tegra-max98090-objs := tegra_max98090.o snd-soc-tegra-sgtl5000-objs := tegra_sgtl5000.o snd-soc-tegra-audio-graph-card-objs := tegra_audio_graph_card.o +obj-$(CONFIG_SND_SOC_TEGRA_RT5631) += snd-soc-tegra-rt5631.o obj-$(CONFIG_SND_SOC_TEGRA_RT5640) += snd-soc-tegra-rt5640.o obj-$(CONFIG_SND_SOC_TEGRA_RT5677) += snd-soc-tegra-rt5677.o obj-$(CONFIG_SND_SOC_TEGRA_WM8753) += snd-soc-tegra-wm8753.o diff --git a/sound/soc/tegra/tegra_rt5631.c b/sound/soc/tegra/tegra_rt5631.c new file mode 100644 index 0000000000000..6eb5982ce8b81 --- /dev/null +++ b/sound/soc/tegra/tegra_rt5631.c @@ -0,0 +1,261 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * tegra_rt5631.c - Tegra machine ASoC driver for boards using RT5631 codec. + * + * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020, Svyatoslav Ryhel + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "tegra_asoc_utils.h" + +#include "../codecs/rt5631.h" + +struct tegra_rt5631 { + struct tegra_asoc_utils_data util_data; + struct gpio_desc *gpiod_hp_mute; + struct gpio_desc *gpiod_hp_det; +}; + +static int tegra_rt5631_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(rtd, 0); + struct snd_soc_card *card = rtd->card; + struct tegra_rt5631 *machine = snd_soc_card_get_drvdata(card); + int srate, mclk; + int err; + + srate = params_rate(params); + switch (srate) { + case 64000: + case 88200: + case 96000: + mclk = 128 * srate; + break; + default: + mclk = 256 * srate; + break; + } + /* FIXME: Codec only requires >= 3MHz if OSR==0 */ + while (mclk < 6000000) + mclk *= 2; + + err = tegra_asoc_utils_set_rate(&machine->util_data, srate, mclk); + if (err < 0) { + dev_err(card->dev, "Can't configure clocks\n"); + return err; + } + + err = snd_soc_dai_set_sysclk(codec_dai, 0, mclk, SND_SOC_CLOCK_IN); + if (err < 0) { + dev_err(card->dev, "codec_dai clock not set\n"); + return err; + } + + return 0; +} + +static struct snd_soc_ops tegra_rt5631_ops = { + .hw_params = tegra_rt5631_hw_params, +}; + +static struct snd_soc_jack tegra_rt5631_hp_jack; + +static struct snd_soc_jack_pin tegra_rt5631_hp_jack_pins[] = { + { + .pin = "Headphone Jack", + .mask = SND_JACK_HEADPHONE, + }, +}; + +static struct snd_soc_jack_gpio tegra_rt5631_hp_jack_gpio = { + .name = "Headphone detection", + .report = SND_JACK_HEADPHONE, + .debounce_time = 150, +}; + +static int tegra_rt5631_event_hp(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *k, int event) +{ + struct snd_soc_dapm_context *dapm = w->dapm; + struct snd_soc_card *card = dapm->card; + struct tegra_rt5631 *machine = snd_soc_card_get_drvdata(card); + + gpiod_set_value_cansleep(machine->gpiod_hp_mute, + !SND_SOC_DAPM_EVENT_ON(event)); + + return 0; +} + +static const struct snd_soc_dapm_widget tegra_rt5631_dapm_widgets[] = { + SND_SOC_DAPM_SPK("Int Spk", NULL), + SND_SOC_DAPM_HP("Headphone Jack", tegra_rt5631_event_hp), + SND_SOC_DAPM_MIC("Mic Jack", NULL), + SND_SOC_DAPM_MIC("Int Mic", NULL), +}; + +static const struct snd_kcontrol_new tegra_rt5631_controls[] = { + SOC_DAPM_PIN_SWITCH("Int Spk"), + SOC_DAPM_PIN_SWITCH("Int Mic"), +}; + +static int tegra_rt5631_init(struct snd_soc_pcm_runtime *rtd) +{ + struct tegra_rt5631 *machine = snd_soc_card_get_drvdata(rtd->card); + int ret; + + ret = snd_soc_card_jack_new(rtd->card, "Headphone Jack", SND_JACK_HEADPHONE, + &tegra_rt5631_hp_jack, tegra_rt5631_hp_jack_pins, + ARRAY_SIZE(tegra_rt5631_hp_jack_pins)); + if (ret) { + dev_err(rtd->dev, "Headset Jack creation failed %d\n", ret); + return ret; + } + + if (machine->gpiod_hp_det) { + tegra_rt5631_hp_jack_gpio.desc = machine->gpiod_hp_det; + snd_soc_jack_add_gpios(&tegra_rt5631_hp_jack, 1, &tegra_rt5631_hp_jack_gpio); + if (ret) { + dev_err(rtd->dev, "jack detection gpios not added, error %d\n", ret); + } + } + + return 0; +} + +SND_SOC_DAILINK_DEFS(hifi, + DAILINK_COMP_ARRAY(COMP_EMPTY()), + DAILINK_COMP_ARRAY(COMP_CODEC(NULL, "rt5631-hifi")), + DAILINK_COMP_ARRAY(COMP_EMPTY())); + +static struct snd_soc_dai_link tegra_rt5631_dai = { + .name = "RT5631", + .stream_name = "RT5631 PCM", + .init = tegra_rt5631_init, + .ops = &tegra_rt5631_ops, + .dai_fmt = SND_SOC_DAIFMT_I2S | + SND_SOC_DAIFMT_NB_NF | + SND_SOC_DAIFMT_CBS_CFS, + SND_SOC_DAILINK_REG(hifi), +}; + +static struct snd_soc_card snd_soc_tegra_rt5631 = { + .name = "tegra-rt5631", + .owner = THIS_MODULE, + .dai_link = &tegra_rt5631_dai, + .num_links = 1, + .controls = tegra_rt5631_controls, + .num_controls = ARRAY_SIZE(tegra_rt5631_controls), + .dapm_widgets = tegra_rt5631_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(tegra_rt5631_dapm_widgets), + .fully_routed = true, +}; + +static int tegra_rt5631_probe(struct platform_device *pdev) +{ + struct snd_soc_card *card = &snd_soc_tegra_rt5631; + struct device_node *np_codec, *np_i2s; + struct tegra_rt5631 *machine; + struct gpio_desc *gpiod; + int ret; + + machine = devm_kzalloc(&pdev->dev, sizeof(*machine), GFP_KERNEL); + if (!machine) + return -ENOMEM; + + card->dev = &pdev->dev; + snd_soc_card_set_drvdata(card, machine); + + gpiod = devm_gpiod_get_optional(&pdev->dev, "nvidia,hp-mute", + GPIOD_OUT_HIGH); + if (IS_ERR(gpiod)) + return PTR_ERR(gpiod); + + machine->gpiod_hp_mute = gpiod; + + gpiod = devm_gpiod_get_optional(&pdev->dev, "nvidia,hp-det", + GPIOD_IN); + if (IS_ERR(gpiod)) + return PTR_ERR(gpiod); + + machine->gpiod_hp_det = gpiod; + + ret = snd_soc_of_parse_card_name(card, "nvidia,model"); + if (ret) + return ret; + + ret = snd_soc_of_parse_audio_routing(card, "nvidia,audio-routing"); + if (ret) + return ret; + + np_codec = of_parse_phandle(pdev->dev.of_node, "nvidia,audio-codec", 0); + if (!np_codec) { + dev_err(&pdev->dev, + "Property 'nvidia,audio-codec' missing or invalid\n"); + return -EINVAL; + } + + np_i2s = of_parse_phandle(pdev->dev.of_node, "nvidia,i2s-controller", 0); + if (!np_i2s) { + dev_err(&pdev->dev, + "Property 'nvidia,i2s-controller' missing or invalid\n"); + return -EINVAL; + } + + tegra_rt5631_dai.cpus->of_node = np_i2s; + tegra_rt5631_dai.codecs->of_node = np_codec; + tegra_rt5631_dai.platforms->of_node = np_i2s; + + ret = tegra_asoc_utils_init(&machine->util_data, &pdev->dev); + if (ret) + return ret; + + ret = devm_snd_soc_register_card(&pdev->dev, card); + if (ret) + return ret; + + return 0; +} + +static const struct of_device_id tegra_rt5631_of_match[] = { + { .compatible = "nvidia,tegra-audio-rt5631", }, + {}, +}; +MODULE_DEVICE_TABLE(of, tegra_rt5631_of_match); + +static struct platform_driver tegra_rt5631_driver = { + .driver = { + .name = "tegra-snd-rt5631", + .pm = &snd_soc_pm_ops, + .of_match_table = tegra_rt5631_of_match, + }, + .probe = tegra_rt5631_probe, +}; +module_platform_driver(tegra_rt5631_driver); + +MODULE_AUTHOR("Stephen Warren "); +MODULE_DESCRIPTION("Tegra+RT5631 machine ASoC driver"); +MODULE_LICENSE("GPL"); From f9a4db91eb222b7fd2b347f86bf50d1e0b2522e9 Mon Sep 17 00:00:00 2001 From: Svyatoslav Date: Tue, 26 Jan 2021 21:07:39 +0200 Subject: [PATCH 6/6] Update tegra_rt5631.c --- sound/soc/tegra/tegra_rt5631.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/sound/soc/tegra/tegra_rt5631.c b/sound/soc/tegra/tegra_rt5631.c index 6eb5982ce8b81..b15f5196ff9a6 100644 --- a/sound/soc/tegra/tegra_rt5631.c +++ b/sound/soc/tegra/tegra_rt5631.c @@ -137,10 +137,9 @@ static int tegra_rt5631_init(struct snd_soc_pcm_runtime *rtd) if (machine->gpiod_hp_det) { tegra_rt5631_hp_jack_gpio.desc = machine->gpiod_hp_det; - snd_soc_jack_add_gpios(&tegra_rt5631_hp_jack, 1, &tegra_rt5631_hp_jack_gpio); - if (ret) { + ret = snd_soc_jack_add_gpios(&tegra_rt5631_hp_jack, 1, &tegra_rt5631_hp_jack_gpio); + if (ret) dev_err(rtd->dev, "jack detection gpios not added, error %d\n", ret); - } } return 0;