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Fixing and merging of STM32L0 and STM32L1 loaders #1

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6 changes: 3 additions & 3 deletions flashloaders/stm32lx.s
Original file line number Diff line number Diff line change
Expand Up @@ -25,7 +25,7 @@
***************************************************************************/


// Build : arm-eabi-gcc -c stm32lx.S
// Build : arm-eabi-gcc -c stm32lx.s
.text
.syntax unified
.cpu cortex-m3
Expand All @@ -36,7 +36,7 @@
/*
r0 - source address
r1 - destination address
r2 - count
r2 - output, remaining word count
*/

// Go to compare
Expand All @@ -54,7 +54,7 @@ test_done:
// Test r2
cmp r2, #0
// Loop if not zero
bcc.n write_word
bhi write_word

// Set breakpoint to exit
bkpt #0x00
59 changes: 16 additions & 43 deletions src/common.c
Original file line number Diff line number Diff line change
Expand Up @@ -1509,45 +1509,20 @@ int write_loader_to_sram(stlink_t *sl, stm32_addr_t* addr, size_t* size) {
};

static const uint8_t loader_code_stm32l[] = {

/* openocd.git/contrib/loaders/flash/stm32lx.S
r0, input, source addr
r1, input, dest addr
r2, input, word count
r2, output, remaining word count
*/

0x04, 0xe0,

0x50, 0xf8, 0x04, 0xcb,
0x41, 0xf8, 0x04, 0xcb,
0x01, 0x3a,

0x00, 0x2a,
0xf8, 0xd3,
0x00, 0xbe
};

static const uint8_t loader_code_stm32l0[] = {

/*
r0, input, source addr
r1, input, dest addr
r2, input, word count
r2, output, remaining word count
*/

0x04, 0xe0,

0x04, 0x68,
0x0c, 0x60,
0x01, 0x3a,
0x04, 0x31,
0x04, 0x30,

0x00, 0x2a,
0xf8, 0xd3,
0x00, 0xbe
// flashloaders/stm32lx.s

0x04, 0xe0, // b test_done ; Go to compare
// write_word:
0x04, 0x68, // ldr r4, [r0] ; Load one word from address in r0
0x0c, 0x60, // str r4, [r1] ; Store the word to address in r1
0x04, 0x30, // adds r0, #4 ; Increment r0
0x04, 0x31, // adds r1, #4 ; Increment r1
0x01, 0x3a, // subs r2, #1 ; Decrement r2
// test_done:
0x00, 0x2a, // cmp r2, #0 ; Compare r2 to 0
0xf8, 0xd8, // bhi write_word ; Loop if above 0
0x00, 0xbe, // bkpt #0x00 ; Set breakpoint to exit
0x00, 0x00
};

static const uint8_t loader_code_stm32f4[] = {
Expand Down Expand Up @@ -1636,7 +1611,8 @@ int write_loader_to_sram(stlink_t *sl, stm32_addr_t* addr, size_t* size) {

if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_CAT2
|| sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS || sl->chip_id == STM32_CHIPID_L1_HIGH
|| sl->chip_id == STM32_CHIPID_L152_RE) { /* stm32l */
|| sl->chip_id == STM32_CHIPID_L152_RE
|| sl->chip_id == STM32_CHIPID_L0 || sl->chip_id == STM32_CHIPID_L0_CAT5) { /* stm32l */
loader_code = loader_code_stm32l;
loader_size = sizeof(loader_code_stm32l);
} else if (sl->core_id == STM32VL_CORE_ID
Expand Down Expand Up @@ -1667,9 +1643,6 @@ int write_loader_to_sram(stlink_t *sl, stm32_addr_t* addr, size_t* size) {
} else if (sl->chip_id == STM32_CHIPID_F0 || sl->chip_id == STM32_CHIPID_F04 || sl->chip_id == STM32_CHIPID_F0_CAN || sl->chip_id == STM32_CHIPID_F0_SMALL || sl->chip_id == STM32_CHIPID_F09X) {
loader_code = loader_code_stm32f0;
loader_size = sizeof(loader_code_stm32f0);
} else if (sl->chip_id == STM32_CHIPID_L0 || sl->chip_id == STM32_CHIPID_L0_CAT5) {
loader_code = loader_code_stm32l0;
loader_size = sizeof(loader_code_stm32l0);
} else if (sl->chip_id == STM32_CHIPID_L4) {
loader_code = loader_code_stm32l4;
loader_size = sizeof(loader_code_stm32l4);
Expand Down