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elf: add Solana Binary Format (#491)
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dmakarov authored Dec 11, 2022
1 parent ed03e05 commit 0941701
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Showing 7 changed files with 32 additions and 0 deletions.
3 changes: 3 additions & 0 deletions crates/examples/src/readobj/elf.rs
Original file line number Diff line number Diff line change
Expand Up @@ -473,6 +473,7 @@ fn rel_flag_type<Elf: FileHeader>(endian: Elf::Endian, elf: &Elf) -> &'static [F
EM_TILEGX => FLAGS_R_TILEGX,
EM_RISCV => FLAGS_R_RISCV,
EM_BPF => FLAGS_R_BPF,
EM_SBF => FLAGS_R_SBF,
EM_LOONGARCH => FLAGS_R_LOONGARCH,
EM_METAG => FLAGS_R_METAG,
EM_NDS32 => FLAGS_R_NDS32,
Expand Down Expand Up @@ -999,6 +1000,7 @@ static FLAGS_EM: &[Flag<u16>] = &flags!(
EM_AMDGPU,
EM_RISCV,
EM_BPF,
EM_SBF,
EM_CSKY,
EM_ALPHA,
EM_LOONGARCH,
Expand Down Expand Up @@ -2911,6 +2913,7 @@ static FLAGS_R_RISCV: &[Flag<u32>] = &flags!(
R_RISCV_32_PCREL,
);
static FLAGS_R_BPF: &[Flag<u32>] = &flags!(R_BPF_NONE, R_BPF_64_64, R_BPF_64_32);
static FLAGS_R_SBF: &[Flag<u32>] = &flags!(R_SBF_NONE, R_SBF_64_64, R_SBF_64_32);
static FLAGS_R_METAG: &[Flag<u32>] = &flags!(
R_METAG_HIADDR16,
R_METAG_LOADDR16,
Expand Down
2 changes: 2 additions & 0 deletions src/common.rs
Original file line number Diff line number Diff line change
Expand Up @@ -22,6 +22,7 @@ pub enum Architecture {
Riscv32,
Riscv64,
S390x,
Sbf,
Sparc64,
Wasm32,
Xtensa,
Expand Down Expand Up @@ -51,6 +52,7 @@ impl Architecture {
Architecture::Riscv32 => Some(AddressSize::U32),
Architecture::Riscv64 => Some(AddressSize::U64),
Architecture::S390x => Some(AddressSize::U64),
Architecture::Sbf => Some(AddressSize::U64),
Architecture::Sparc64 => Some(AddressSize::U64),
Architecture::Wasm32 => Some(AddressSize::U32),
Architecture::Xtensa => Some(AddressSize::U32),
Expand Down
10 changes: 10 additions & 0 deletions src/elf.rs
Original file line number Diff line number Diff line change
Expand Up @@ -576,6 +576,8 @@ pub const EM_BPF: u16 = 247;
pub const EM_CSKY: u16 = 252;
/// Loongson LoongArch
pub const EM_LOONGARCH: u16 = 258;
/// Solana Binary Format
pub const EM_SBF: u16 = 263;
/// Digital Alpha
pub const EM_ALPHA: u16 = 0x9026;

Expand Down Expand Up @@ -6122,6 +6124,14 @@ pub const R_BPF_64_64: u32 = 1;
#[allow(missing_docs)]
pub const R_BPF_64_32: u32 = 10;

// SBF values `Rel*::r_type`.
/// No reloc
pub const R_SBF_NONE: u32 = 0;
#[allow(missing_docs)]
pub const R_SBF_64_64: u32 = 1;
#[allow(missing_docs)]
pub const R_SBF_64_32: u32 = 10;

// Imagination Meta values `Rel*::r_type`.

#[allow(missing_docs)]
Expand Down
1 change: 1 addition & 0 deletions src/read/elf/file.rs
Original file line number Diff line number Diff line change
Expand Up @@ -175,6 +175,7 @@ where
// This is either s390 or s390x, depending on the ELF class.
// We only support the 64-bit variant s390x here.
(elf::EM_S390, true) => Architecture::S390x,
(elf::EM_SBF, _) => Architecture::Sbf,
(elf::EM_SPARCV9, true) => Architecture::Sparc64,
(elf::EM_XTENSA, false) => Architecture::Xtensa,
_ => Architecture::Unknown,
Expand Down
5 changes: 5 additions & 0 deletions src/read/elf/relocation.rs
Original file line number Diff line number Diff line change
Expand Up @@ -385,6 +385,11 @@ fn parse_relocation<Elf: FileHeader>(
}
r_type => (RelocationKind::Elf(r_type), 0),
},
elf::EM_SBF => match reloc.r_type(endian, false) {
elf::R_SBF_64_64 => (RelocationKind::Absolute, 64),
elf::R_SBF_64_32 => (RelocationKind::Absolute, 32),
r_type => (RelocationKind::Elf(r_type), 0),
},
elf::EM_SPARC | elf::EM_SPARC32PLUS | elf::EM_SPARCV9 => {
match reloc.r_type(endian, false) {
elf::R_SPARC_32 | elf::R_SPARC_UA32 => (RelocationKind::Absolute, 32),
Expand Down
10 changes: 10 additions & 0 deletions src/write/elf/object.rs
Original file line number Diff line number Diff line change
Expand Up @@ -83,6 +83,7 @@ impl<'a> Object<'a> {
Architecture::Riscv64 => true,
Architecture::Riscv32 => true,
Architecture::S390x => true,
Architecture::Sbf => false,
Architecture::Sparc64 => true,
Architecture::Xtensa => true,
_ => {
Expand Down Expand Up @@ -281,6 +282,7 @@ impl<'a> Object<'a> {
Architecture::Riscv32 => elf::EM_RISCV,
Architecture::Riscv64 => elf::EM_RISCV,
Architecture::S390x => elf::EM_S390,
Architecture::Sbf => elf::EM_SBF,
Architecture::Sparc64 => elf::EM_SPARCV9,
Architecture::Xtensa => elf::EM_XTENSA,
_ => {
Expand Down Expand Up @@ -673,6 +675,14 @@ impl<'a> Object<'a> {
return Err(Error(format!("unimplemented relocation {:?}", reloc)));
}
},
Architecture::Sbf => match (reloc.kind, reloc.encoding, reloc.size) {
(RelocationKind::Absolute, _, 64) => elf::R_SBF_64_64,
(RelocationKind::Absolute, _, 32) => elf::R_SBF_64_32,
(RelocationKind::Elf(x), _, _) => x,
_ => {
return Err(Error(format!("unimplemented relocation {:?}", reloc)));
}
},
Architecture::Sparc64 => match (reloc.kind, reloc.encoding, reloc.size) {
// TODO: use R_SPARC_32/R_SPARC_64 if aligned.
(RelocationKind::Absolute, _, 32) => elf::R_SPARC_UA32,
Expand Down
1 change: 1 addition & 0 deletions tests/round_trip/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -247,6 +247,7 @@ fn elf_any() {
(Architecture::Riscv32, Endianness::Little),
(Architecture::Riscv64, Endianness::Little),
(Architecture::S390x, Endianness::Big),
(Architecture::Sbf, Endianness::Little),
(Architecture::Sparc64, Endianness::Big),
(Architecture::Xtensa, Endianness::Little),
]
Expand Down

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