Missing module lpm_add_sub

[jotego]

Hello,

Thanks for sharing your work. I am trying to set it up but I've found that at least one module is missing:

Module j68_addsub_32 instantiates missing module lpm_add_sub

j68_cpu/rtl/j68_addsub_32.v

Line 43 in 538badf

lpm_add_sub

Could you please add the missing module?

Thank you

[jotego]

There are indeed several missing modules that are used conditionally for synthesis. I have removed their references and just synthesize the same code as used for the verilator sim. It seems to work fine so far. These are the implementation results:

Logic cells, Registers, Memory bits, M9Ks, Compilation time
fx68k 5174 | 1388 | 39584 | 6 | 3m00s
j68 9020 | 1870 | 7344 | 2 | 5m00s