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Fixed issue related to Zephyr. QEMU issue #66.
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This patches makes counter only appear to reset after the timer
interrupt gets to be served.
Also removed the condition that would make timers less reactive.
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Cupertino Miranda committed Mar 14, 2022
1 parent 1a8c062 commit 2625a6f
Showing 1 changed file with 4 additions and 11 deletions.
15 changes: 4 additions & 11 deletions target/arc/timer.c
Original file line number Diff line number Diff line change
Expand Up @@ -67,17 +67,6 @@ static void cpu_arc_timer_update(CPUARCState *env, uint32_t timer)

delta = env->timer[timer].T_Limit - t_count;

/*
* Artificially limit timeout rate to something achievable under
* QEMU. Otherwise, QEMU spends all its time generating timer
* interrupts, and there is no forward progress. About ten
* microseconds is the fastest that really works on the current
* generation of host machines.
*/
if (delta < TIMEOUT_LIMIT) {
delta = TIMEOUT_LIMIT;
}

#ifndef CONFIG_USER_ONLY
timer_mod_ns(env->cpu_timer[timer], now + CYCLES_TO_NS((uint64_t)delta));
#endif
Expand Down Expand Up @@ -235,6 +224,9 @@ static void cpu_arc_count_reset(CPUARCState *env, uint32_t timer)
static uint32_t cpu_arc_count_get(CPUARCState *env, uint32_t timer)
{
uint32_t count = T_COUNT(timer);
if((env->timer[timer].T_Cntrl & TMR_IP) != 0) {
count = env->timer[timer].T_Limit;
}
qemu_log_mask(LOG_UNIMP, "[TMR%d] Timer count %d.\n", timer, count);
return count;
}
Expand Down Expand Up @@ -273,6 +265,7 @@ static void cpu_arc_store_limit(CPUARCState *env,
break;
}
env->timer[timer].T_Limit = value;
qemu_log_mask(LOG_UNIMP, "[TMR%d] Set Timer limit "TARGET_FMT_ld".\n", timer, env->timer[timer].T_Limit);
cpu_arc_timer_update(env, timer);
}

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