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EVM opcodes: bitwise shifting #145
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I remain in strong support of these, for the reasons you give. (Though I'm tempted to special-case exponentiation for powers of two.) I think 0x10 is taken by LT. I suggest the range 0x1b through 0x1f. |
Also, Is the semantics value << index for shifts? And for rotations 0 seems like the wrong answer for rotating more than 256 bits - shouldn't it keep spinning modulo 256? |
True.
That seems to be more fitting too (bit ops).
Yes.
I was considering this too and I have no preference. Not entirely convinced we need rotation as an opcode. It is very useful for hashing functions, but we have them implemented as precompiles already. |
Rotates can be done with shifts and masks, but it's ugly, error prone, costs more gas, and can be done more efficiently inside the VM. And not all uses of rotate are precompiles. if you consider rotating by N bits as equivalent to rotating by one bit N number of times you don't end up with 0 unless you started out with 0. |
I guess you mean 2^256 there. I would suggest to specify the amount of shift/rotate to be |
I'm too tired to think, even in circles. But doesn't one (N mod 256)-bit rotation give the same result as N 1-bit rotations of a 256-bit register? |
If there are EVM opcodes, does it mean the VM can use less time on the hardware processor? |
@gcolvin, your are exactly right. But that's not the case for shifts. |
This would be extremely useful. I find an inordinate amount of my time is spent implementing bit shifting in inefficient and inelegant ways. Please do include this in the next hard fork. |
@chfast Thanks. And yes, for excess shifts all the bits go flying off one end or the other. |
@axic There are good arguments for not doing SAR at all. It's not really a bitwise operation, and it's a failure as an arithmetic operation. It's not the same as dividing by powers of two, different hardware does it different ways, and the implementation for negative numbers at the C/C++ level remains implementation defined. E.g. the C++14 standard, section 5.8, page 126: |
I don't really like SAR myself and happy to remove it if we can't find a use case where it is really needed. |
So it's
And one code left in this column for future use. |
Do we all agree:
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You mean |
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Thanks for the heads up @gcolvin, I'm in the process of writing proper draft of many of my submissions. |
Available here in Solidity: https://github.com/ethereum/solidity/tree/asm-bitshift The following example code should work:
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Thanks @axic ! |
Replaced by #215. |
This looks very good. Thanks! Seems most every cipher and hash I want to use for testing involves lots of shifts or rotates. |
Bit rotation has some uses in cryptography when the word it is either 32-bit or 64-bit. |
That is being considered as part of this proposal: |
@SergioDemianLerner where are you seeing rotations in #215? |
Just learnt of this EIP (had been wondering why EVM doesn't have bitwise shifting). The issue seems to have gone quiet and missed the Byzantium fork. I'd like to express interest in it being included for Constantinople. |
Is it present on the Constantinople release? |
This replaces #105.
Motivation
To provide native bitwise shifting with cost on par with other arithmetic operations.
Specification
The following new EVM opcodes are introduced:
0x1b
:SHL
(logical left shift)0x1c
:SHR
(logical right shift)0x1d
:SAR
(arithmetic right shift)0x1e
:ROL
(rotate left)0x1f
:ROR
(rotate right)The gast cost is set at
verylow
(3 gas)All shift / rotate instructions take two stack elements (i.e.
value << index
), with the top element being theindex
to shift with and the next stack element is thevalue
. Bothindex
andvalue
is considered as unsigned, with the exception ofSAR
, wherevalue
is signed.All results must be mod
2^256
.For
index
≥ 256, the result is0
.Effect
This effectively reduces the gas cost and number of instructions for the above. A
SHL
andSHR
can be implemented asa * (2 ** b)
( anda / (2 ** b)
respectively. The upper gas bound for these is 35 gas.SAR
and the rotation opcodes cost more than 35.The text was updated successfully, but these errors were encountered: