From 59c5b5fe6bb71da30a8266279dc3f830e43561f4 Mon Sep 17 00:00:00 2001 From: "nilesh.kale" Date: Fri, 6 Oct 2023 17:17:05 +0530 Subject: [PATCH] fix(bootloader): Fix compilation issue in bootloader build during verbose+sb+fe --- .../subproject/main/ld/esp32p4/bootloader.ld | 4 ++-- .../subproject/main/ld/esp32s2/bootloader.ld | 8 +++---- .../subproject/main/ld/esp32s3/bootloader.ld | 4 ++-- .../esp_hw_support/port/esp32c2/rtc_time.c | 9 +++++++- .../esp_hw_support/port/esp32c3/rtc_time.c | 9 +++++++- .../esp_hw_support/port/esp32c5/rtc_time.c | 7 ++++++ .../esp_hw_support/port/esp32c6/rtc_time.c | 9 +++++++- .../esp_hw_support/port/esp32h2/rtc_time.c | 9 +++++++- .../esp_hw_support/port/esp32p4/rtc_time.c | 9 +++++++- .../esp_hw_support/port/esp32s2/rtc_time.c | 9 +++++++- components/esp_system/ld/esp32p4/memory.ld.in | 2 +- components/esp_system/ld/esp32s2/memory.ld.in | 2 +- components/esp_system/ld/esp32s3/memory.ld.in | 2 +- tools/test_apps/.build-test-rules.yml | 5 ++++ .../build_system/bootloader/CMakeLists.txt | 8 +++++++ .../build_system/bootloader/README.md | 2 ++ .../bootloader/anti_rollback_partition.csv | 8 +++++++ .../bootloader/main/CMakeLists.txt | 2 ++ .../main/build_system_bootloader_main.c | 14 +++++++++++ .../bootloader/sdkconfig.ci.anti_roll_back | 12 ++++++++++ .../bootloader/sdkconfig.ci.factory_reset | 7 ++++++ .../sdkconfig.ci.secure_boot.ecdsa.esp32h2 | 6 +++++ .../bootloader/sdkconfig.ci.verbose_logging | 4 ++++ .../bootloader/sdkconfig.defaults | 23 +++++++++++++++++++ .../bootloader/sdkconfig.defaults.esp32 | 3 +++ 25 files changed, 160 insertions(+), 17 deletions(-) create mode 100644 tools/test_apps/build_system/bootloader/CMakeLists.txt create mode 100644 tools/test_apps/build_system/bootloader/README.md create mode 100644 tools/test_apps/build_system/bootloader/anti_rollback_partition.csv create mode 100644 tools/test_apps/build_system/bootloader/main/CMakeLists.txt create mode 100644 tools/test_apps/build_system/bootloader/main/build_system_bootloader_main.c create mode 100644 tools/test_apps/build_system/bootloader/sdkconfig.ci.anti_roll_back create mode 100644 tools/test_apps/build_system/bootloader/sdkconfig.ci.factory_reset create mode 100644 tools/test_apps/build_system/bootloader/sdkconfig.ci.secure_boot.ecdsa.esp32h2 create mode 100644 tools/test_apps/build_system/bootloader/sdkconfig.ci.verbose_logging create mode 100644 tools/test_apps/build_system/bootloader/sdkconfig.defaults create mode 100644 tools/test_apps/build_system/bootloader/sdkconfig.defaults.esp32 diff --git a/components/bootloader/subproject/main/ld/esp32p4/bootloader.ld b/components/bootloader/subproject/main/ld/esp32p4/bootloader.ld index e430d04575c9..7f1d85078207 100644 --- a/components/bootloader/subproject/main/ld/esp32p4/bootloader.ld +++ b/components/bootloader/subproject/main/ld/esp32p4/bootloader.ld @@ -24,7 +24,7 @@ /* These lengths can be adjusted, if necessary: */ bootloader_usable_dram_end = 0x4ff3abd0; bootloader_stack_overhead = 0x2000; /* For safety margin between bootloader data section and startup stacks */ -bootloader_dram_seg_len = 0x4000; +bootloader_dram_seg_len = 0x5000; bootloader_iram_loader_seg_len = 0x7000; bootloader_iram_seg_len = 0x2000; @@ -47,7 +47,7 @@ MEMORY * 2. Update the value in this assert. * 3. Update SRAM_DRAM_END in components/esp_system/ld/esp32p4/memory.ld.in to the same value. */ -ASSERT(bootloader_iram_loader_seg_start == 0x4FF2DBD0, "bootloader_iram_loader_seg_start inconsistent with SRAM_DRAM_END"); +ASSERT(bootloader_iram_loader_seg_start == 0x4FF2CBD0, "bootloader_iram_loader_seg_start inconsistent with SRAM_DRAM_END"); /* Default entry point: */ ENTRY(call_start_cpu0); diff --git a/components/bootloader/subproject/main/ld/esp32s2/bootloader.ld b/components/bootloader/subproject/main/ld/esp32s2/bootloader.ld index 188096f529ac..394f1a3e51bd 100644 --- a/components/bootloader/subproject/main/ld/esp32s2/bootloader.ld +++ b/components/bootloader/subproject/main/ld/esp32s2/bootloader.ld @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -10,9 +10,9 @@ MEMORY { - iram_seg (RWX) : org = 0x4004B000, len = 0x4000 /* SRAM part of block 12 and 13 */ - iram_loader_seg (RWX) : org = 0x4004F000, len = 0x7000 /* SRAM part of block 13, Block 14 & part of 15 */ - dram_seg (RW) : org = 0x3FFE6000, len = 0x4B00 /* Part SRAM Blocks 15 & 16, ROM static buffer starts at end of this region (reclaimed after app runs) */ + iram_seg (RWX) : org = 0x4004A000, len = 0x4000 /* SRAM part of block 12 and 13 */ + iram_loader_seg (RWX) : org = 0x4004E000, len = 0x7000 /* SRAM part of block 13, Block 14 & part of 15 */ + dram_seg (RW) : org = 0x3FFE5000, len = 0x5B00 /* Part SRAM Blocks 15 & 16, ROM static buffer starts at end of this region (reclaimed after app runs) */ } /* Default entry point: */ diff --git a/components/bootloader/subproject/main/ld/esp32s3/bootloader.ld b/components/bootloader/subproject/main/ld/esp32s3/bootloader.ld index ceea91732187..bdebbaf98195 100644 --- a/components/bootloader/subproject/main/ld/esp32s3/bootloader.ld +++ b/components/bootloader/subproject/main/ld/esp32s3/bootloader.ld @@ -26,7 +26,7 @@ iram_dram_offset = 0x6f0000; /* These lengths can be adjusted, if necessary: */ bootloader_usable_dram_end = 0x3fce9700; bootloader_stack_overhead = 0x2000; /* For safety margin between bootloader data section and startup stacks */ -bootloader_dram_seg_len = 0x4000; +bootloader_dram_seg_len = 0x5000; bootloader_iram_loader_seg_len = 0x7000; bootloader_iram_seg_len = 0x3000; @@ -49,7 +49,7 @@ MEMORY * 2. Update the value in this assert. * 3. Update SRAM_IRAM_END in components/esp_system/ld/esp32s3/memory.ld.in to the same value. */ -ASSERT(bootloader_iram_loader_seg_start == 0x403cc700, "bootloader_iram_loader_seg_start inconsistent with SRAM_IRAM_END"); +ASSERT(bootloader_iram_loader_seg_start == 0x403CB700, "bootloader_iram_loader_seg_start inconsistent with SRAM_IRAM_END"); /* Default entry point: */ ENTRY(call_start_cpu0); diff --git a/components/esp_hw_support/port/esp32c2/rtc_time.c b/components/esp_hw_support/port/esp32c2/rtc_time.c index 26332a12c22f..f1c370de2ffe 100644 --- a/components/esp_hw_support/port/esp32c2/rtc_time.c +++ b/components/esp_hw_support/port/esp32c2/rtc_time.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -195,10 +195,17 @@ uint32_t rtc_clk_freq_cal(uint32_t cal_val) __attribute__((constructor)) static void enable_timer_group0_for_calibration(void) { +#ifndef BOOTLOADER_BUILD PERIPH_RCC_ACQUIRE_ATOMIC(PERIPH_TIMG0_MODULE, ref_count) { if (ref_count == 0) { timer_ll_enable_bus_clock(0, true); timer_ll_reset_register(0); } } +#else + // no critical section is needed for bootloader + int __DECLARE_RCC_RC_ATOMIC_ENV; + timer_ll_enable_bus_clock(0, true); + timer_ll_reset_register(0); +#endif } diff --git a/components/esp_hw_support/port/esp32c3/rtc_time.c b/components/esp_hw_support/port/esp32c3/rtc_time.c index b002ea1a7dc2..27aa3ada9468 100644 --- a/components/esp_hw_support/port/esp32c3/rtc_time.c +++ b/components/esp_hw_support/port/esp32c3/rtc_time.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -198,10 +198,17 @@ uint32_t rtc_clk_freq_cal(uint32_t cal_val) __attribute__((constructor)) static void enable_timer_group0_for_calibration(void) { +#ifndef BOOTLOADER_BUILD PERIPH_RCC_ACQUIRE_ATOMIC(PERIPH_TIMG0_MODULE, ref_count) { if (ref_count == 0) { timer_ll_enable_bus_clock(0, true); timer_ll_reset_register(0); } } +#else + // no critical section is needed for bootloader + int __DECLARE_RCC_RC_ATOMIC_ENV; + timer_ll_enable_bus_clock(0, true); + timer_ll_reset_register(0); +#endif } diff --git a/components/esp_hw_support/port/esp32c5/rtc_time.c b/components/esp_hw_support/port/esp32c5/rtc_time.c index 0f6bd4d00b80..8e3d2bc04c0a 100644 --- a/components/esp_hw_support/port/esp32c5/rtc_time.c +++ b/components/esp_hw_support/port/esp32c5/rtc_time.c @@ -274,10 +274,17 @@ uint32_t rtc_clk_freq_cal(uint32_t cal_val) __attribute__((constructor)) static void enable_timer_group0_for_calibration(void) { +#ifndef BOOTLOADER_BUILD PERIPH_RCC_ACQUIRE_ATOMIC(PERIPH_TIMG0_MODULE, ref_count) { if (ref_count == 0) { timer_ll_enable_bus_clock(0, true); timer_ll_reset_register(0); } } +#else + // no critical section is needed for bootloader + int __DECLARE_RCC_RC_ATOMIC_ENV; + timer_ll_enable_bus_clock(0, true); + timer_ll_reset_register(0); +#endif } diff --git a/components/esp_hw_support/port/esp32c6/rtc_time.c b/components/esp_hw_support/port/esp32c6/rtc_time.c index 08d5c572cf07..c2f2f7f31464 100644 --- a/components/esp_hw_support/port/esp32c6/rtc_time.c +++ b/components/esp_hw_support/port/esp32c6/rtc_time.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -270,10 +270,17 @@ uint32_t rtc_clk_freq_cal(uint32_t cal_val) __attribute__((constructor)) static void enable_timer_group0_for_calibration(void) { +#ifndef BOOTLOADER_BUILD PERIPH_RCC_ACQUIRE_ATOMIC(PERIPH_TIMG0_MODULE, ref_count) { if (ref_count == 0) { timer_ll_enable_bus_clock(0, true); timer_ll_reset_register(0); } } +#else + // no critical section is needed for bootloader + int __DECLARE_RCC_RC_ATOMIC_ENV; + timer_ll_enable_bus_clock(0, true); + timer_ll_reset_register(0); +#endif } diff --git a/components/esp_hw_support/port/esp32h2/rtc_time.c b/components/esp_hw_support/port/esp32h2/rtc_time.c index de72113a47ec..4ce39d8d897c 100644 --- a/components/esp_hw_support/port/esp32h2/rtc_time.c +++ b/components/esp_hw_support/port/esp32h2/rtc_time.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -270,10 +270,17 @@ uint32_t rtc_clk_freq_cal(uint32_t cal_val) __attribute__((constructor)) static void enable_timer_group0_for_calibration(void) { +#ifndef BOOTLOADER_BUILD PERIPH_RCC_ACQUIRE_ATOMIC(PERIPH_TIMG0_MODULE, ref_count) { if (ref_count == 0) { timer_ll_enable_bus_clock(0, true); timer_ll_reset_register(0); } } +#else + // no critical section is needed for bootloader + int __DECLARE_RCC_RC_ATOMIC_ENV; + timer_ll_enable_bus_clock(0, true); + timer_ll_reset_register(0); +#endif } diff --git a/components/esp_hw_support/port/esp32p4/rtc_time.c b/components/esp_hw_support/port/esp32p4/rtc_time.c index d7af8c728b5d..9e79719b1264 100644 --- a/components/esp_hw_support/port/esp32p4/rtc_time.c +++ b/components/esp_hw_support/port/esp32p4/rtc_time.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -229,10 +229,17 @@ uint32_t rtc_clk_freq_cal(uint32_t cal_val) __attribute__((constructor)) static void enable_timer_group0_for_calibration(void) { +#ifndef BOOTLOADER_BUILD PERIPH_RCC_ACQUIRE_ATOMIC(PERIPH_TIMG0_MODULE, ref_count) { if (ref_count == 0) { timer_ll_enable_bus_clock(0, true); timer_ll_reset_register(0); } } +#else + // no critical section is needed for bootloader + int __DECLARE_RCC_RC_ATOMIC_ENV; + timer_ll_enable_bus_clock(0, true); + timer_ll_reset_register(0); +#endif } diff --git a/components/esp_hw_support/port/esp32s2/rtc_time.c b/components/esp_hw_support/port/esp32s2/rtc_time.c index 9222d784a4b5..189de3a6e19d 100644 --- a/components/esp_hw_support/port/esp32s2/rtc_time.c +++ b/components/esp_hw_support/port/esp32s2/rtc_time.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -263,10 +263,17 @@ uint32_t rtc_clk_freq_cal(uint32_t cal_val) __attribute__((constructor)) static void enable_timer_group0_for_calibration(void) { +#ifndef BOOTLOADER_BUILD PERIPH_RCC_ACQUIRE_ATOMIC(PERIPH_TIMG0_MODULE, ref_count) { if (ref_count == 0) { timer_ll_enable_bus_clock(0, true); timer_ll_reset_register(0); } } +#else + // no critical section is needed for bootloader + int __DECLARE_RCC_RC_ATOMIC_ENV; + timer_ll_enable_bus_clock(0, true); + timer_ll_reset_register(0); +#endif } diff --git a/components/esp_system/ld/esp32p4/memory.ld.in b/components/esp_system/ld/esp32p4/memory.ld.in index a4e1c17c62ff..47a2bb34c3e7 100644 --- a/components/esp_system/ld/esp32p4/memory.ld.in +++ b/components/esp_system/ld/esp32p4/memory.ld.in @@ -23,7 +23,7 @@ #define SRAM_DRAM_START 0x4ff00000 #define I_D_SRAM_OFFSET (SRAM_IRAM_START - SRAM_DRAM_START) -#define SRAM_DRAM_END 0x4FF2DBD0 - I_D_SRAM_OFFSET /* 2nd stage bootloader iram_loader_seg start address */ +#define SRAM_DRAM_END 0x4FF2CBD0 - I_D_SRAM_OFFSET /* 2nd stage bootloader iram_loader_seg start address */ #define SRAM_IRAM_ORG (SRAM_IRAM_START) #define SRAM_DRAM_ORG (SRAM_DRAM_START) diff --git a/components/esp_system/ld/esp32s2/memory.ld.in b/components/esp_system/ld/esp32s2/memory.ld.in index 86ef48f6003f..8a732b2b094e 100644 --- a/components/esp_system/ld/esp32s2/memory.ld.in +++ b/components/esp_system/ld/esp32s2/memory.ld.in @@ -32,7 +32,7 @@ #define RAM_IRAM_START 0x40020000 #define RAM_DRAM_START 0x3FFB0000 -#define DATA_RAM_END 0x3FFDF000 /* 2nd stage bootloader iram_loader_seg starts at end of block 13 (reclaimed after app boots) */ +#define DATA_RAM_END 0x3FFDE000 /* 2nd stage bootloader iram_loader_seg starts at end of block 13 (reclaimed after app boots) */ #define IRAM_ORG (RAM_IRAM_START + CONFIG_ESP32S2_INSTRUCTION_CACHE_SIZE \ + CONFIG_ESP32S2_DATA_CACHE_SIZE) diff --git a/components/esp_system/ld/esp32s3/memory.ld.in b/components/esp_system/ld/esp32s3/memory.ld.in index 64d6c465f0fc..855affba746d 100644 --- a/components/esp_system/ld/esp32s3/memory.ld.in +++ b/components/esp_system/ld/esp32s3/memory.ld.in @@ -28,7 +28,7 @@ #define SRAM_IRAM_START 0x40370000 #define SRAM_DIRAM_I_START 0x40378000 -#define SRAM_IRAM_END 0x403CC700 /* Please refer to ESP32-S3 bootloader.ld for more information on this */ +#define SRAM_IRAM_END 0x403CB700 /* Please refer to ESP32-S3 bootloader.ld for more information on this */ #define I_D_SRAM_OFFSET (SRAM_DIRAM_I_START - SRAM_DRAM_START) #define SRAM_DRAM_START 0x3FC88000 diff --git a/tools/test_apps/.build-test-rules.yml b/tools/test_apps/.build-test-rules.yml index 22f992ed6654..34413b5a2b40 100644 --- a/tools/test_apps/.build-test-rules.yml +++ b/tools/test_apps/.build-test-rules.yml @@ -1,5 +1,10 @@ # Documentation: .gitlab/ci/README.md#manifest-file-to-control-the-buildtest-apps +tools/test_apps/build_system/bootloader: + disable: + - if: IDF_TARGET == "linux" + reason: the test should run on all targets except linux + tools/test_apps/build_system/custom_partition_subtypes: enable: - if: IDF_TARGET in ["esp32", "linux"] diff --git a/tools/test_apps/build_system/bootloader/CMakeLists.txt b/tools/test_apps/build_system/bootloader/CMakeLists.txt new file mode 100644 index 000000000000..77df77913bd8 --- /dev/null +++ b/tools/test_apps/build_system/bootloader/CMakeLists.txt @@ -0,0 +1,8 @@ +# For more information about build system see +# https://docs.espressif.com/projects/esp-idf/en/latest/api-guides/build-system.html +# The following five lines of boilerplate have to be in your project's +# CMakeLists in this exact order for cmake to work correctly +cmake_minimum_required(VERSION 3.16) + +include($ENV{IDF_PATH}/tools/cmake/project.cmake) +project(build_system_bootloader) diff --git a/tools/test_apps/build_system/bootloader/README.md b/tools/test_apps/build_system/bootloader/README.md new file mode 100644 index 000000000000..bf47d80ec649 --- /dev/null +++ b/tools/test_apps/build_system/bootloader/README.md @@ -0,0 +1,2 @@ +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | diff --git a/tools/test_apps/build_system/bootloader/anti_rollback_partition.csv b/tools/test_apps/build_system/bootloader/anti_rollback_partition.csv new file mode 100644 index 000000000000..a53ed857def4 --- /dev/null +++ b/tools/test_apps/build_system/bootloader/anti_rollback_partition.csv @@ -0,0 +1,8 @@ +# Name, Type, SubType, Offset, Size, Flags +# Note: if you have increased the bootloader size, make sure to update the offsets to avoid overlap +nvs, data, nvs, , 0x4000, +otadata, data, ota, , 0x2000, +phy_init, data, phy, , 0x1000, +emul_efuse,data,efuse, , 0x2000, +ota_0, app, ota_0, , 3584K, +ota_1, app, ota_1, , 3584K, diff --git a/tools/test_apps/build_system/bootloader/main/CMakeLists.txt b/tools/test_apps/build_system/bootloader/main/CMakeLists.txt new file mode 100644 index 000000000000..004c911d441a --- /dev/null +++ b/tools/test_apps/build_system/bootloader/main/CMakeLists.txt @@ -0,0 +1,2 @@ +idf_component_register(SRCS "build_system_bootloader_main.c" + INCLUDE_DIRS ".") diff --git a/tools/test_apps/build_system/bootloader/main/build_system_bootloader_main.c b/tools/test_apps/build_system/bootloader/main/build_system_bootloader_main.c new file mode 100644 index 000000000000..717c5d6625f6 --- /dev/null +++ b/tools/test_apps/build_system/bootloader/main/build_system_bootloader_main.c @@ -0,0 +1,14 @@ +/* + * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Unlicense OR CC0-1.0 + */ +#include +#include "esp_log.h" + +static const char *TAG = "build_bootloader_test"; + +void app_main(void) +{ + ESP_LOGI(TAG, "Hello world"); +} diff --git a/tools/test_apps/build_system/bootloader/sdkconfig.ci.anti_roll_back b/tools/test_apps/build_system/bootloader/sdkconfig.ci.anti_roll_back new file mode 100644 index 000000000000..8b158cc23e6c --- /dev/null +++ b/tools/test_apps/build_system/bootloader/sdkconfig.ci.anti_roll_back @@ -0,0 +1,12 @@ +# +# Enable Rollback and Anti rollback +# +CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE=y +CONFIG_BOOTLOADER_APP_ANTI_ROLLBACK=y + +# +# Update partition table file +# +CONFIG_PARTITION_TABLE_CUSTOM=y +CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="anti_rollback_partition.csv" +CONFIG_PARTITION_TABLE_FILENAME="anti_rollback_partition.csv" diff --git a/tools/test_apps/build_system/bootloader/sdkconfig.ci.factory_reset b/tools/test_apps/build_system/bootloader/sdkconfig.ci.factory_reset new file mode 100644 index 000000000000..e933e34281ec --- /dev/null +++ b/tools/test_apps/build_system/bootloader/sdkconfig.ci.factory_reset @@ -0,0 +1,7 @@ +# +# Factory reset setting +# +CONFIG_BOOTLOADER_FACTORY_RESET=y +CONFIG_BOOTLOADER_NUM_PIN_FACTORY_RESET=4 +CONFIG_BOOTLOADER_FACTORY_RESET_PIN_LOW=y +CONFIG_BOOTLOADER_DATA_FACTORY_RESET="nvs" diff --git a/tools/test_apps/build_system/bootloader/sdkconfig.ci.secure_boot.ecdsa.esp32h2 b/tools/test_apps/build_system/bootloader/sdkconfig.ci.secure_boot.ecdsa.esp32h2 new file mode 100644 index 000000000000..d1e1ff2a7ab6 --- /dev/null +++ b/tools/test_apps/build_system/bootloader/sdkconfig.ci.secure_boot.ecdsa.esp32h2 @@ -0,0 +1,6 @@ +CONFIG_IDF_TARGET="esp32h2" +CONFIG_IDF_TARGET_ESP32H2=y + +CONFIG_SECURE_BOOT_V2_ECDSA_ENABLED=y +CONFIG_SECURE_SIGNED_APPS_ECDSA_V2_SCHEME=y +CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_256_BITS=y diff --git a/tools/test_apps/build_system/bootloader/sdkconfig.ci.verbose_logging b/tools/test_apps/build_system/bootloader/sdkconfig.ci.verbose_logging new file mode 100644 index 000000000000..2ce67a363ce7 --- /dev/null +++ b/tools/test_apps/build_system/bootloader/sdkconfig.ci.verbose_logging @@ -0,0 +1,4 @@ +# +# Turn verbose log on for bootloader +# +CONFIG_BOOTLOADER_LOG_LEVEL_VERBOSE=y diff --git a/tools/test_apps/build_system/bootloader/sdkconfig.defaults b/tools/test_apps/build_system/bootloader/sdkconfig.defaults new file mode 100644 index 000000000000..f3453ccf9920 --- /dev/null +++ b/tools/test_apps/build_system/bootloader/sdkconfig.defaults @@ -0,0 +1,23 @@ +# +# Security feature +# +# Start secure boot +# +CONFIG_SECURE_SIGNED_ON_BOOT=y +CONFIG_SECURE_SIGNED_ON_UPDATE=y +CONFIG_SECURE_SIGNED_APPS=y +CONFIG_SECURE_BOOT=y +CONFIG_SECURE_BOOT_V2_ENABLED=y +CONFIG_SECURE_BOOT_BUILD_SIGNED_BINARIES=n + +# +# Start flash incryption +# +CONFIG_SECURE_FLASH_ENC_ENABLED=y +CONFIG_SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT=y + +# +# Increase partition table offset +# +CONFIG_PARTITION_TABLE_OFFSET=0xe000 +CONFIG_ESPTOOLPY_FLASHSIZE_8MB=y diff --git a/tools/test_apps/build_system/bootloader/sdkconfig.defaults.esp32 b/tools/test_apps/build_system/bootloader/sdkconfig.defaults.esp32 new file mode 100644 index 000000000000..9456259f600f --- /dev/null +++ b/tools/test_apps/build_system/bootloader/sdkconfig.defaults.esp32 @@ -0,0 +1,3 @@ +# Change revision to use secure boot version 2 +CONFIG_ESP32_REV_MIN_3=y +CONFIG_ESP32_REV_MIN=3