diff --git a/components/esp_hw_support/sleep_modes.c b/components/esp_hw_support/sleep_modes.c index 4cc0c6fb6b52..fc68477d7bef 100644 --- a/components/esp_hw_support/sleep_modes.c +++ b/components/esp_hw_support/sleep_modes.c @@ -150,7 +150,7 @@ static esp_deep_sleep_cb_t s_dslp_cb[MAX_DSLP_HOOKS]={0}; /** - * Internal structure which holds all requested deep sleep parameters + * Internal structure which holds all requested sleep parameters */ typedef struct { struct { @@ -180,6 +180,8 @@ typedef struct { } sleep_config_t; +static uint32_t s_lightsleep_cnt = 0; + _Static_assert(22 >= SOC_RTCIO_PIN_COUNT, "Chip has more RTCIOs than 22, should increase ext1_rtc_gpio_mask field size"); static sleep_config_t s_config = { @@ -703,7 +705,7 @@ static uint32_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags, esp_sleep_mode_t mo // re-enable UART output resume_uarts(); - + s_lightsleep_cnt++; return result; } @@ -903,8 +905,13 @@ esp_err_t esp_light_sleep_start(void) s_config.rtc_clk_cal_period = rtc_clk_cal_cycling(RTC_CAL_RTC_MUX, RTC_CLK_SRC_CAL_CYCLES); esp_clk_slowclk_cal_set(s_config.rtc_clk_cal_period); #else - s_config.rtc_clk_cal_period = rtc_clk_cal(RTC_CAL_RTC_MUX, RTC_CLK_SRC_CAL_CYCLES); - esp_clk_slowclk_cal_set(s_config.rtc_clk_cal_period); +#if CONFIG_PM_ENABLE + if (s_lightsleep_cnt % CONFIG_PM_LIGHTSLEEP_RTC_OSC_CAL_INTERVAL == 0) +#endif + { + s_config.rtc_clk_cal_period = rtc_clk_cal(RTC_CAL_RTC_MUX, RTC_CLK_SRC_CAL_CYCLES); + esp_clk_slowclk_cal_set(s_config.rtc_clk_cal_period); + } #endif /* @@ -916,7 +923,12 @@ esp_err_t esp_light_sleep_start(void) */ #if SOC_PMU_SUPPORTED - s_config.fast_clk_cal_period = rtc_clk_cal(RTC_CAL_RC_FAST, FAST_CLK_SRC_CAL_CYCLES); +#if CONFIG_PM_ENABLE + if (s_lightsleep_cnt % CONFIG_PM_LIGHTSLEEP_RTC_OSC_CAL_INTERVAL == 0) +#endif + { + s_config.fast_clk_cal_period = rtc_clk_cal(RTC_CAL_RC_FAST, FAST_CLK_SRC_CAL_CYCLES); + } int sleep_time_sw_adjustment = LIGHT_SLEEP_TIME_OVERHEAD_US + sleep_time_overhead_in + s_config.sleep_time_overhead_out; int sleep_time_hw_adjustment = pmu_sleep_calculate_hw_wait_time(pd_flags, s_config.rtc_clk_cal_period, s_config.fast_clk_cal_period); s_config.sleep_time_adjustment = sleep_time_sw_adjustment + sleep_time_hw_adjustment; diff --git a/components/esp_pm/Kconfig b/components/esp_pm/Kconfig index dbb21c28f01e..246c4053959b 100644 --- a/components/esp_pm/Kconfig +++ b/components/esp_pm/Kconfig @@ -93,6 +93,20 @@ menu "Power Management" This option is invisible to users, and it is only used for ci testing, enabling it in the application will increase the sleep and wake-up time overhead + config PM_LIGHTSLEEP_RTC_OSC_CAL_INTERVAL + int "Calibrate the RTC_FAST/SLOW clock every N times of light sleep" + default 1 + depends on PM_ENABLE + range 1 128 + help + The value of this option determines the calibration interval of the RTC_FAST/SLOW clock during sleep when + power management is enabled. When it is configured as N, the RTC_FAST/SLOW clock will be calibrated + every N times of lightsleep. + Decreasing this value will increase the time the chip is in the active state, thereby increasing the + average power consumption of the chip. + Increasing this value can reduce the average power consumption, but when the external environment changes + drastically and the chip RTC_FAST/SLOW oscillator frequency drifts, it may cause system instability. + config PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP bool "Power down CPU in light sleep" depends on IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3 || IDF_TARGET_ESP32C6