From a2d8225c9d08906715b2c8f6caac4c92b5b51f72 Mon Sep 17 00:00:00 2001 From: zhangyanjiao Date: Thu, 6 Jul 2023 14:35:56 +0800 Subject: [PATCH 01/11] feat(wifi): Add API to get RSSI info after station connects to AP - Add esp_wifi_sta_get_rssi() function to retrieve RSSI info after station connects to AP --- components/esp_wifi/include/esp_wifi.h | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/components/esp_wifi/include/esp_wifi.h b/components/esp_wifi/include/esp_wifi.h index 4cdc1fb7d464..e62469fc726e 100644 --- a/components/esp_wifi/include/esp_wifi.h +++ b/components/esp_wifi/include/esp_wifi.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -1364,6 +1364,20 @@ esp_err_t esp_wifi_sta_get_negotiated_phymode(wifi_phy_mode_t *phymode); */ esp_err_t esp_wifi_set_dynamic_cs(bool enabled); +/** + * @brief Get the rssi info after station connected to AP + * + * @attention This API should be called after station connected to AP. + * + * @param rssi store the rssi info received from last beacon. + * + * @return + * - ESP_OK: succeed + * - ESP_ERR_INVALID_ARG: invalid argument + * - ESP_FAIL: failed + */ +esp_err_t esp_wifi_sta_get_rssi(int *rssi); + #ifdef __cplusplus } #endif From dc46fe5343cfe337f8f3a44ae859ad3928b83ce1 Mon Sep 17 00:00:00 2001 From: Nachiket Kukade Date: Wed, 5 Jul 2023 16:04:03 +0530 Subject: [PATCH 02/11] fix(esp_wifi): Enable FTM for ESP32C2, fix other FTM issues Enable FTM for ESP32C2 and update wifi libs with below fixes - 1. Bugfixes in Initiator and Responder mode 2. Fix wrong RTT value in first FTM procedure without connection 3. Update FTM calibration values for ESP32S2, S3, C3 and C2 4. Update distance estimation logic 5. Add some useful command parameters in FTM example 6. Fix bug when number of FTM measurement frames received is more than (number_of_brusts * FTMs per brust). Co-authored-by: Sarvesh Bodakhe --- .../esp32c2/include/soc/Kconfig.soc_caps.in | 4 + components/soc/esp32c2/include/soc/soc_caps.h | 1 + .../esp32c6/include/soc/Kconfig.soc_caps.in | 2 +- components/soc/esp32c6/include/soc/soc_caps.h | 2 +- examples/wifi/.build-test-rules.yml | 7 +- examples/wifi/ftm/README.md | 5 +- examples/wifi/ftm/main/ftm_main.c | 107 +++++++++++++----- 7 files changed, 91 insertions(+), 37 deletions(-) diff --git a/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in index 099095f90177..a260e80e7d78 100644 --- a/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in @@ -635,6 +635,10 @@ config SOC_WIFI_HW_TSF bool default y +config SOC_WIFI_FTM_SUPPORT + bool + default y + config SOC_WIFI_SUPPORT_VARIABLE_BEACON_WINDOW bool default y diff --git a/components/soc/esp32c2/include/soc/soc_caps.h b/components/soc/esp32c2/include/soc/soc_caps.h index b65323d25183..845817b5adc8 100644 --- a/components/soc/esp32c2/include/soc/soc_caps.h +++ b/components/soc/esp32c2/include/soc/soc_caps.h @@ -299,6 +299,7 @@ /*------------------------------------ WI-FI CAPS ------------------------------------*/ #define SOC_WIFI_HW_TSF (1) /*!< Support hardware TSF */ +#define SOC_WIFI_FTM_SUPPORT (1) /*!< Support FTM */ #define SOC_WIFI_SUPPORT_VARIABLE_BEACON_WINDOW (1) /*!< Support delta early time for rf phy on/off */ /*---------------------------------- Bluetooth CAPS ----------------------------------*/ diff --git a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in index 3f53bccceb14..1a49fd77f758 100644 --- a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in @@ -1213,7 +1213,7 @@ config SOC_WIFI_HW_TSF config SOC_WIFI_FTM_SUPPORT bool - default y + default n config SOC_WIFI_GCMP_SUPPORT bool diff --git a/components/soc/esp32c6/include/soc/soc_caps.h b/components/soc/esp32c6/include/soc/soc_caps.h index f47b9cdf4816..c5ba77fa76f6 100644 --- a/components/soc/esp32c6/include/soc/soc_caps.h +++ b/components/soc/esp32c6/include/soc/soc_caps.h @@ -501,7 +501,7 @@ /*------------------------------------ WI-FI CAPS ------------------------------------*/ #define SOC_WIFI_HW_TSF (1) /*!< Support hardware TSF */ -#define SOC_WIFI_FTM_SUPPORT (1) /*!< Support FTM */ +#define SOC_WIFI_FTM_SUPPORT (0) /*!< Support FTM */ #define SOC_WIFI_GCMP_SUPPORT (1) /*!< Support GCMP(GCMP128 and GCMP256) */ #define SOC_WIFI_WAPI_SUPPORT (1) /*!< Support WAPI */ #define SOC_WIFI_CSI_SUPPORT (1) /*!< Support CSI */ diff --git a/examples/wifi/.build-test-rules.yml b/examples/wifi/.build-test-rules.yml index 1678d58eedfb..0dc1197282cd 100644 --- a/examples/wifi/.build-test-rules.yml +++ b/examples/wifi/.build-test-rules.yml @@ -5,10 +5,9 @@ examples/wifi: - if: SOC_WIFI_SUPPORTED != 1 examples/wifi/ftm: - enable: - - if: IDF_TARGET in ["esp32c3", "esp32s2", "esp32s3"] - temporary: true - reason: the other targets are not tested yet + disable: + - if: SOC_WIFI_FTM_SUPPORT != 1 + reason: requires hardware support examples/wifi/getting_started: disable: diff --git a/examples/wifi/ftm/README.md b/examples/wifi/ftm/README.md index a39ae9a329b2..d585ee76a159 100644 --- a/examples/wifi/ftm/README.md +++ b/examples/wifi/ftm/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32-C3 | ESP32-S2 | ESP32-S3 | -| ----------------- | -------- | -------- | -------- | +| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-S2 | ESP32-S3 | +| ----------------- | -------- | -------- | -------- | -------- | # FTM Example @@ -43,6 +43,7 @@ ftm> ``` Use `help` to get a list of available commands and options. Use `scan` command to scan for AP's that support FTM Responder mode. Before initiating FTM with an external AP, make sure that `FTM Responder` tag is visible in the respective scan result entry. Alternatively, start SoftAP on another device using `ap` command, it supports FTM Responder by default. If external FTM Initiators get a large error in distance readings with the SoftAP, note down the reading at zero distance in centimeters, say `cm0`. This distance can be offset using command `ftm -R -o ` to give accurate readings with the Initiator. +It is recommended to keep SoftAP bandwidth at 20MHz as it gives more accurate results. ```bash ftm> scan diff --git a/examples/wifi/ftm/main/ftm_main.c b/examples/wifi/ftm/main/ftm_main.c index e666c345b286..89fcfb544f44 100644 --- a/examples/wifi/ftm/main/ftm_main.c +++ b/examples/wifi/ftm/main/ftm_main.c @@ -26,8 +26,17 @@ typedef struct { struct arg_str *ssid; struct arg_str *password; + struct arg_lit *disconnect; struct arg_end *end; -} wifi_args_t; +} wifi_sta_args_t; + +typedef struct { + struct arg_str *ssid; + struct arg_str *password; + struct arg_int *channel; + struct arg_int *bandwidth; + struct arg_end *end; +} wifi_ap_args_t; typedef struct { struct arg_str *ssid; @@ -48,8 +57,8 @@ typedef struct { struct arg_end *end; } wifi_ftm_args_t; -static wifi_args_t sta_args; -static wifi_args_t ap_args; +static wifi_sta_args_t sta_args; +static wifi_ap_args_t ap_args; static wifi_scan_arg_t scan_args; static wifi_ftm_args_t ftm_args; @@ -61,6 +70,8 @@ wifi_config_t g_ap_config = { #define ETH_ALEN 6 #define MAX_CONNECT_RETRY_ATTEMPTS 5 +#define DEFAULT_AP_CHANNEL 1 +#define DEFAULT_AP_BANDWIDTH 20 static bool s_reconnect = true; static int s_retry_num = 0; @@ -124,11 +135,11 @@ static void event_handler(void *arg, esp_event_base_t event_base, } else if (event_id == WIFI_EVENT_FTM_REPORT) { wifi_event_ftm_report_t *event = (wifi_event_ftm_report_t *) event_data; + s_rtt_est = event->rtt_est; + s_dist_est = event->dist_est; + s_ftm_report = event->ftm_report_data; + s_ftm_report_num_entries = event->ftm_report_num_entries; if (event->status == FTM_STATUS_SUCCESS) { - s_rtt_est = event->rtt_est; - s_dist_est = event->dist_est; - s_ftm_report = event->ftm_report_data; - s_ftm_report_num_entries = event->ftm_report_num_entries; xEventGroupSetBits(s_ftm_event_group, FTM_REPORT_BIT); } else { ESP_LOGI(TAG_STA, "FTM procedure with Peer("MACSTR") failed! (Status - %d)", @@ -147,6 +158,9 @@ static void ftm_process_report(void) int i; char *log = NULL; + if (s_ftm_report_num_entries == 0) + return; + if (!g_report_lvl) return; @@ -170,7 +184,10 @@ static void ftm_process_report(void) log_ptr += sprintf(log_ptr, "%6d|", s_ftm_report[i].dlog_token); } if (g_report_lvl & BIT1) { - log_ptr += sprintf(log_ptr, "%7" PRIu32 " |", s_ftm_report[i].rtt); + if (s_ftm_report[i].rtt != UINT32_MAX) + log_ptr += sprintf(log_ptr, "%7" PRIi32 " |", s_ftm_report[i].rtt); + else + log_ptr += sprintf(log_ptr, " INVALID |"); } if (g_report_lvl & BIT2) { log_ptr += sprintf(log_ptr, "%14llu |%14llu |%14llu |%14llu |", s_ftm_report[i].t1, @@ -250,6 +267,13 @@ static int wifi_cmd_sta(int argc, char **argv) arg_print_errors(stderr, sta_args.end, argv[0]); return 1; } + if (sta_args.disconnect->count) { + s_reconnect = false; + xEventGroupClearBits(s_wifi_event_group, CONNECTED_BIT); + esp_wifi_disconnect(); + xEventGroupWaitBits(s_wifi_event_group, DISCONNECTED_BIT, 0, 1, portTICK_PERIOD_MS); + return 0; + } ESP_LOGI(TAG_STA, "sta connecting to '%s'", sta_args.ssid->sval[0]); wifi_cmd_sta_join(sta_args.ssid->sval[0], sta_args.password->sval[0]); @@ -315,7 +339,7 @@ static int wifi_cmd_scan(int argc, char **argv) return 0; } -static bool wifi_cmd_ap_set(const char* ssid, const char* pass) +static bool wifi_cmd_ap_set(const char* ssid, const char* pass, uint8_t channel, uint8_t bw) { s_reconnect = false; strlcpy((char*) g_ap_config.ap.ssid, ssid, MAX_SSID_LEN); @@ -327,13 +351,29 @@ static bool wifi_cmd_ap_set(const char* ssid, const char* pass) } strlcpy((char*) g_ap_config.ap.password, pass, MAX_PASSPHRASE_LEN); } + if (!(channel >=1 && channel <= 14)) { + ESP_LOGE(TAG_AP, "Channel cannot be %d!", channel); + return false; + } + if (bw != 20 && bw != 40) { + ESP_LOGE(TAG_AP, "Cannot set %d MHz bandwidth!", bw); + return false; + } if (strlen(pass) == 0) { g_ap_config.ap.authmode = WIFI_AUTH_OPEN; } - + g_ap_config.ap.channel = channel; ESP_ERROR_CHECK(esp_wifi_set_mode(WIFI_MODE_AP)); ESP_ERROR_CHECK(esp_wifi_set_config(ESP_IF_WIFI_AP, &g_ap_config)); + if (bw == 40) { + esp_wifi_set_bandwidth(ESP_IF_WIFI_AP, WIFI_BW_HT40); + } else { + esp_wifi_set_bandwidth(ESP_IF_WIFI_AP, WIFI_BW_HT20); + } + ESP_LOGI(TAG_AP, "Starting SoftAP with FTM Responder support, SSID - %s, Password - %s, Primary Channel - %d, Bandwidth - %dMHz", + ap_args.ssid->sval[0], ap_args.password->sval[0], channel, bw); + return true; } @@ -346,10 +386,12 @@ static int wifi_cmd_ap(int argc, char** argv) return 1; } - if (true == wifi_cmd_ap_set(ap_args.ssid->sval[0], ap_args.password->sval[0])) - ESP_LOGI(TAG_AP, "Starting SoftAP with FTM Responder support, SSID - %s, Password - %s", ap_args.ssid->sval[0], ap_args.password->sval[0]); - else + if (!wifi_cmd_ap_set(ap_args.ssid->sval[0], ap_args.password->sval[0], + ap_args.channel->count != 0 ? ap_args.channel->ival[0] : DEFAULT_AP_CHANNEL, + ap_args.bandwidth->count != 0 ? ap_args.bandwidth->ival[0] : DEFAULT_AP_BANDWIDTH)) { ESP_LOGE(TAG_AP, "Failed to start SoftAP!"); + return 1; + } return 0; } @@ -486,11 +528,11 @@ static int wifi_cmd_ftm(int argc, char **argv) bits = xEventGroupWaitBits(s_ftm_event_group, FTM_REPORT_BIT | FTM_FAILURE_BIT, pdTRUE, pdFALSE, portMAX_DELAY); /* Processing data from FTM session */ + ftm_process_report(); + free(s_ftm_report); + s_ftm_report = NULL; + s_ftm_report_num_entries = 0; if (bits & FTM_REPORT_BIT) { - ftm_process_report(); - free(s_ftm_report); - s_ftm_report = NULL; - s_ftm_report_num_entries = 0; ESP_LOGI(TAG_STA, "Estimated RTT - %" PRId32 " nSec, Estimated Distance - %" PRId32 ".%02" PRId32 " meters", s_rtt_est, s_dist_est / 100, s_dist_est % 100); } else { @@ -533,8 +575,9 @@ static int wifi_cmd_ftm(int argc, char **argv) void register_wifi(void) { - sta_args.ssid = arg_str1(NULL, NULL, "", "SSID of AP"); + sta_args.ssid = arg_str0(NULL, NULL, "", "SSID of AP"); sta_args.password = arg_str0(NULL, NULL, "", "password of AP"); + sta_args.disconnect = arg_lit0("d", "disconnect", "Disconnect from the connected AP"); sta_args.end = arg_end(2); const esp_console_cmd_t sta_cmd = { @@ -547,8 +590,10 @@ void register_wifi(void) ESP_ERROR_CHECK( esp_console_cmd_register(&sta_cmd) ); - ap_args.ssid = arg_str1(NULL, NULL, "", "SSID of AP"); + ap_args.ssid = arg_str0(NULL, NULL, "", "SSID of AP"); ap_args.password = arg_str0(NULL, NULL, "", "password of AP"); + ap_args.channel = arg_int0("c", "channel", "<1-11>", "Primary channel of AP"); + ap_args.bandwidth = arg_int0("b", "bandwidth", "<20/40>", "Channel bandwidth"); ap_args.end = arg_end(2); const esp_console_cmd_t ap_cmd = { @@ -640,16 +685,20 @@ void app_main(void) register_system(); register_wifi(); - printf("\n ==========================================================\n"); - printf(" | Steps to test FTM |\n"); - printf(" | |\n"); - printf(" | 1. Use 'help' for detailed information on parameters |\n"); - printf(" | 2. Start SoftAP with command 'ap ' |\n"); - printf(" | OR |\n"); - printf(" | 2. Use 'scan' command to search for external AP's |\n"); - printf(" | 3. On second device initiate FTM with an AP using |\n"); - printf(" | command 'ftm -I -s ' |\n"); - printf(" ==========================================================\n\n"); + printf("\n ===============================================================\n"); + printf(" | Steps to test FTM Initiator |\n"); + printf(" | |\n"); + printf(" | 1. Use 'scan' command to scan AP's. In results, check AP's |\n"); + printf(" | with tag '[FTM Responder]' for supported AP's |\n"); + printf(" | 2. Optionally connect to the AP with 'sta '|\n"); + printf(" | 3. Initiate FTM with 'ftm -I -s ' |\n"); + printf(" |______________________________________________________________|\n"); + printf(" | Steps to test FTM Responder |\n"); + printf(" | |\n"); + printf(" | 1. Start SoftAP with command 'ap ' |\n"); + printf(" | 2. Optionally add '-c ' to set channel, '-b 40' for 40M |\n"); + printf(" | 3. Use 'help' for detailed information for all parameters |\n"); + printf(" ================================================================\n\n"); // start console REPL ESP_ERROR_CHECK(esp_console_start_repl(repl)); From 1f0982c0fcaf51cc68065013f12d05773cbfd055 Mon Sep 17 00:00:00 2001 From: david zuhn Date: Mon, 5 Sep 2022 16:08:14 -0500 Subject: [PATCH 03/11] spelling correction in documentation Signed-off-by: zhangyanjiao Closes https://github.com/espressif/esp-idf/pull/9721 --- components/esp_wifi/include/esp_wifi.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/components/esp_wifi/include/esp_wifi.h b/components/esp_wifi/include/esp_wifi.h index e62469fc726e..fc68fc1f39b7 100644 --- a/components/esp_wifi/include/esp_wifi.h +++ b/components/esp_wifi/include/esp_wifi.h @@ -625,7 +625,7 @@ esp_err_t esp_wifi_get_channel(uint8_t *primary, wifi_second_chan_t *second); * it's up to the user to fill in all fields according to local regulations. * Please use esp_wifi_set_country_code instead. * @attention 2. The default country is "01" (world safe mode) {.cc="01", .schan=1, .nchan=11, .policy=WIFI_COUNTRY_POLICY_AUTO}. - * @attention 3. The third octect of country code string is one of the following: ' ', 'O', 'I', 'X', otherwise it is considered as ' '. + * @attention 3. The third octet of country code string is one of the following: ' ', 'O', 'I', 'X', otherwise it is considered as ' '. * @attention 4. When the country policy is WIFI_COUNTRY_POLICY_AUTO, the country info of the AP to which * the station is connected is used. E.g. if the configured country info is {.cc="US", .schan=1, .nchan=11} * and the country info of the AP to which the station is connected is {.cc="JP", .schan=1, .nchan=14} @@ -1276,7 +1276,7 @@ esp_err_t esp_wifi_connectionless_module_set_wake_interval(uint16_t wake_interva * * @attention 7. When country code "01" (world safe mode) is set, SoftAP mode won't contain country IE. * @attention 8. The default country is "01" (world safe mode) and ieee80211d_enabled is TRUE. - * @attention 9. The third octect of country code string is one of the following: ' ', 'O', 'I', 'X', otherwise it is considered as ' '. + * @attention 9. The third octet of country code string is one of the following: ' ', 'O', 'I', 'X', otherwise it is considered as ' '. * * @param country the configured country ISO code * @param ieee80211d_enabled 802.11d is enabled or not From 8f7829d94ead1b53b3a705a8b1ddada8765ce1bf Mon Sep 17 00:00:00 2001 From: Rotzbua Date: Thu, 20 Oct 2022 00:44:45 +0200 Subject: [PATCH 04/11] doc: remove WEP as security mode Signed-off-by: zhangyanjiao Closes https://github.com/espressif/esp-idf/pull/10015 --- docs/en/api-reference/network/esp_wifi.rst | 2 +- docs/zh_CN/api-reference/network/esp_wifi.rst | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/docs/en/api-reference/network/esp_wifi.rst b/docs/en/api-reference/network/esp_wifi.rst index 87e2c59c1fd9..55071671ad78 100644 --- a/docs/en/api-reference/network/esp_wifi.rst +++ b/docs/en/api-reference/network/esp_wifi.rst @@ -12,7 +12,7 @@ The Wi-Fi libraries provide support for configuring and monitoring the {IDF_TARG - AP mode (aka Soft-AP mode or Access Point mode). Stations connect to the {IDF_TARGET_NAME}. - Station/AP-coexistence mode ({IDF_TARGET_NAME} is concurrently an access point and a station connected to another access point). -- Various security modes for the above (WPA, WPA2, WEP, etc.) +- Various security modes for the above (WPA2, WPA3, etc.) - Scanning for access points (active & passive scanning). - Promiscuous mode for monitoring of IEEE802.11 Wi-Fi packets. diff --git a/docs/zh_CN/api-reference/network/esp_wifi.rst b/docs/zh_CN/api-reference/network/esp_wifi.rst index 6baee6755a38..1640ff2048aa 100644 --- a/docs/zh_CN/api-reference/network/esp_wifi.rst +++ b/docs/zh_CN/api-reference/network/esp_wifi.rst @@ -12,7 +12,7 @@ Wi-Fi 库支持配置及监控 {IDF_TARGET_NAME} Wi-Fi 连网功能。支持配 - AP 模式（即 Soft-AP 模式或接入点模式），此时基站连接到 {IDF_TARGET_NAME}。 - station/AP 共存模式（{IDF_TARGET_NAME} 既是接入点，同时又作为基站连接到另外一个接入点）。 -- 上述模式的各种安全模式（WPA、WPA2 及 WEP 等）。 +- 上述模式的各种安全模式（WPA2、WPA3 等）。 - 扫描接入点（包括主动扫描及被动扫描）。 - 使用混杂模式监控 IEEE802.11 Wi-Fi 数据包。 From 19d8bdbd10cbb84653b41e31997c57d842e2d499 Mon Sep 17 00:00:00 2001 From: zhangyanjiao Date: Fri, 26 May 2023 17:24:18 +0800 Subject: [PATCH 05/11] fix(wifi): Add bugfixes and improvements 1. Update wifi security mode 2. Add check for memory allocation in tx buffers 3. Fix association refused temporarily comeback time set to zero issue --- docs/en/api-reference/network/esp_wifi.rst | 2 +- docs/zh_CN/api-reference/network/esp_wifi.rst | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/docs/en/api-reference/network/esp_wifi.rst b/docs/en/api-reference/network/esp_wifi.rst index 55071671ad78..647f515118db 100644 --- a/docs/en/api-reference/network/esp_wifi.rst +++ b/docs/en/api-reference/network/esp_wifi.rst @@ -12,7 +12,7 @@ The Wi-Fi libraries provide support for configuring and monitoring the {IDF_TARG - AP mode (aka Soft-AP mode or Access Point mode). Stations connect to the {IDF_TARGET_NAME}. - Station/AP-coexistence mode ({IDF_TARGET_NAME} is concurrently an access point and a station connected to another access point). -- Various security modes for the above (WPA2, WPA3, etc.) +- Various security modes for the above (WPA, WPA2, WPA3, etc.) - Scanning for access points (active & passive scanning). - Promiscuous mode for monitoring of IEEE802.11 Wi-Fi packets. diff --git a/docs/zh_CN/api-reference/network/esp_wifi.rst b/docs/zh_CN/api-reference/network/esp_wifi.rst index 1640ff2048aa..e285a8f1ee4b 100644 --- a/docs/zh_CN/api-reference/network/esp_wifi.rst +++ b/docs/zh_CN/api-reference/network/esp_wifi.rst @@ -12,7 +12,7 @@ Wi-Fi 库支持配置及监控 {IDF_TARGET_NAME} Wi-Fi 连网功能。支持配 - AP 模式（即 Soft-AP 模式或接入点模式），此时基站连接到 {IDF_TARGET_NAME}。 - station/AP 共存模式（{IDF_TARGET_NAME} 既是接入点，同时又作为基站连接到另外一个接入点）。 -- 上述模式的各种安全模式（WPA2、WPA3 等）。 +- 上述模式的各种安全模式（WPA、WPA2、WPA3 等）。 - 扫描接入点（包括主动扫描及被动扫描）。 - 使用混杂模式监控 IEEE802.11 Wi-Fi 数据包。 From 00ef8391af610cd791eac286433a80505dd93041 Mon Sep 17 00:00:00 2001 From: liuning Date: Thu, 2 Feb 2023 21:06:10 +0800 Subject: [PATCH 06/11] external coex: add txline, apply coex schm and half tx, apply lowest pti --- components/esp_coex/include/esp_coexist.h | 4 +++ components/esp_coex/src/coexist.c | 42 +++++++++++++++++++++++ 2 files changed, 46 insertions(+) diff --git a/components/esp_coex/include/esp_coexist.h b/components/esp_coex/include/esp_coexist.h index 9ed897c28a77..6fd3d8b2f1d0 100644 --- a/components/esp_coex/include/esp_coexist.h +++ b/components/esp_coex/include/esp_coexist.h @@ -198,6 +198,10 @@ esp_err_t esp_external_coex_set_grant_delay(uint8_t delay_us); * @return : ESP_OK - success, other - failed */ esp_err_t esp_external_coex_set_validate_high(bool is_high_valid); +#else +esp_err_t esp_extern_coex_register_txline(uint32_t pin); + +esp_err_t esp_extern_coex_unregister_txline(void); #endif #endif diff --git a/components/esp_coex/src/coexist.c b/components/esp_coex/src/coexist.c index f90aaf710824..bb7b08d29e60 100644 --- a/components/esp_coex/src/coexist.c +++ b/components/esp_coex/src/coexist.c @@ -15,7 +15,13 @@ #include "hal/gpio_types.h" #include "soc/gpio_periph.h" #include "soc/gpio_struct.h" +#include "esp_attr.h" +#ifdef CONFIG_IDF_TARGET_ESP32S3 +#include "esp32s3/rom/gpio.h" #endif +#endif + +static const char* TAG = "coexist"; const char *esp_coex_version_get(void) { @@ -394,6 +400,42 @@ esp_err_t esp_disable_extern_coex_gpio_pin() return ESP_OK; } + +#ifndef SOC_EXTERNAL_COEX_ADVANCE +#define ESP_EXTERN_COEX_OUTPIN_UNDEF 0xFFFF +DRAM_ATTR static uint32_t esp_extern_coex_outpin = ESP_EXTERN_COEX_OUTPIN_UNDEF; + +esp_err_t esp_extern_coex_register_txline(uint32_t pin) +{ + esp_extern_coex_outpin = pin; + gpio_config_t io_conf = { + //disable interrupt + .intr_type = GPIO_INTR_DISABLE, + //set as output mode + .mode = GPIO_MODE_OUTPUT, + //bit mask of the pins that you want to set,e.g.GPIO18/19 + .pin_bit_mask = (1ULL << esp_extern_coex_outpin), + //disable pull-down mode + .pull_down_en = GPIO_PULLDOWN_DISABLE, + //enable pull-up mode + .pull_up_en = GPIO_PULLUP_ENABLE, + }; + gpio_config(&io_conf); + + ESP_LOGI(TAG, "external coex select output io %d as txline", esp_extern_coex_outpin); + + gpio_matrix_out(esp_extern_coex_outpin, BB_DIAG9_IDX, false, false); + + return ESP_OK; +} + +esp_err_t esp_extern_coex_unregister_txline(void) +{ + /* Do nothing here */ + + return ESP_OK; +} +#endif #endif/*External Coex*/ #if CONFIG_ESP_COEX_SW_COEXIST_ENABLE && CONFIG_SOC_IEEE802154_SUPPORTED From ef805e64a28ae59323849c270a1fdffad32828c9 Mon Sep 17 00:00:00 2001 From: liuning Date: Thu, 2 Feb 2023 17:48:32 +0800 Subject: [PATCH 07/11] iperf: apply txline --- examples/wifi/iperf/main/cmd_wifi.c | 1 + 1 file changed, 1 insertion(+) diff --git a/examples/wifi/iperf/main/cmd_wifi.c b/examples/wifi/iperf/main/cmd_wifi.c index 27f4e114e6ce..33ddace1f3b0 100644 --- a/examples/wifi/iperf/main/cmd_wifi.c +++ b/examples/wifi/iperf/main/cmd_wifi.c @@ -183,6 +183,7 @@ void initialise_wifi(void) gpio_pin.in_pin1 = 2; gpio_pin.out_pin0 = 3; ESP_ERROR_CHECK( esp_enable_extern_coex_gpio_pin(EXTERN_COEX_WIRE_3, gpio_pin) ); + ESP_ERROR_CHECK( esp_extern_coex_register_txline(4) ); #endif #endif From 2c70cda9b63bdb2ffd2d58bc13759d5e553579b0 Mon Sep 17 00:00:00 2001 From: muhaidong Date: Tue, 11 Apr 2023 21:45:46 +0800 Subject: [PATCH 08/11] external_coex: add extern coex wire 4 --- components/esp_coex/Kconfig | 2 +- components/esp_coex/include/esp_coexist.h | 1 + components/esp_coex/src/coexist.c | 43 ++++++++++++++++++++--- examples/wifi/iperf/main/cmd_wifi.c | 4 +-- 4 files changed, 43 insertions(+), 7 deletions(-) diff --git a/components/esp_coex/Kconfig b/components/esp_coex/Kconfig index e526c2705c67..c8fdf5889ca6 100644 --- a/components/esp_coex/Kconfig +++ b/components/esp_coex/Kconfig @@ -17,7 +17,7 @@ menu "Wireless Coexistence" config ESP_COEX_EXTERNAL_COEXIST_ENABLE bool "External Coexistence" default n - depends on (!(BT_ENABLED||NIMBLE_ENABLED)&&(!IDF_TARGET_ESP32)) + depends on (!(BT_ENABLED||NIMBLE_ENABLED)&&(!IDF_TARGET_ESP32)&&(!IDF_TARGET_ESP32C6)) #JIRA FCC52 help If enabled, HW External coexistence arbitration is managed by GPIO pins. It can support three types of wired combinations so far which are 1-wired/2-wired/3-wired. diff --git a/components/esp_coex/include/esp_coexist.h b/components/esp_coex/include/esp_coexist.h index 6fd3d8b2f1d0..e01fcee7fd76 100644 --- a/components/esp_coex/include/esp_coexist.h +++ b/components/esp_coex/include/esp_coexist.h @@ -28,6 +28,7 @@ typedef enum { EXTERN_COEX_WIRE_1 = 0, EXTERN_COEX_WIRE_2, EXTERN_COEX_WIRE_3, + EXTERN_COEX_WIRE_4, EXTERN_COEX_WIRE_NUM, } external_coex_wire_t; diff --git a/components/esp_coex/src/coexist.c b/components/esp_coex/src/coexist.c index bb7b08d29e60..02d479df1bff 100644 --- a/components/esp_coex/src/coexist.c +++ b/components/esp_coex/src/coexist.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2018-2023 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -17,11 +17,11 @@ #include "soc/gpio_struct.h" #include "esp_attr.h" #ifdef CONFIG_IDF_TARGET_ESP32S3 -#include "esp32s3/rom/gpio.h" +#include "esp_rom/include/esp32s3/rom/gpio.h" #endif #endif -static const char* TAG = "coexist"; +//static const char* TAG = "coexist"; const char *esp_coex_version_get(void) { @@ -246,6 +246,41 @@ esp_err_t esp_enable_extern_coex_gpio_pin(external_coex_wire_t wire_type, esp_ex switch (wire_type) { +#ifndef SOC_EXTERNAL_COEX_ADVANCE + case EXTERN_COEX_WIRE_4: + { + /*Input gpio pin setup --> GPIO_BT_PRIORITY_IDX：GPIO_BT_ACTIVE_IDX*/ + gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.in_pin0], PIN_FUNC_GPIO); + gpio_set_direction(gpio_pin.in_pin0, GPIO_MODE_INPUT); + + esp_rom_gpio_connect_in_signal(gpio_pin.in_pin0, GPIO_BT_ACTIVE_IDX, false); + + gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.in_pin1], PIN_FUNC_GPIO); + gpio_set_direction(gpio_pin.in_pin1, GPIO_MODE_INPUT); + + esp_rom_gpio_connect_in_signal(gpio_pin.in_pin1, GPIO_BT_PRIORITY_IDX, false); + + /*Output gpio pin setup --> GPIO_WLAN_ACTIVE_IDX: 1 BT, 0 WiFi*/ + gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.out_pin0], PIN_FUNC_GPIO); + gpio_set_direction(gpio_pin.out_pin0, GPIO_MODE_OUTPUT); + REG_WRITE(GPIO_ENABLE_W1TC_REG, BIT(gpio_pin.out_pin0)); + + esp_rom_gpio_connect_out_signal(gpio_pin.out_pin0, GPIO_WLAN_ACTIVE_IDX, false, false); + + + REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin0), GPIO_PIN1_SYNC1_BYPASS, 2); + REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin0), GPIO_PIN1_SYNC2_BYPASS, 2); + REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin1), GPIO_PIN1_SYNC1_BYPASS, 2); + REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin1), GPIO_PIN1_SYNC2_BYPASS, 2); + + esp_extern_coex_register_txline(gpio_pin.out_pin1); + int ret = esp_coex_external_set(EXTERN_COEX_PTI_MID, EXTERN_COEX_PTI_MID, EXTERN_COEX_PTI_HIGH); + if (ESP_OK != ret) { + return ESP_FAIL; + } + break; + } +#endif case EXTERN_COEX_WIRE_3: { #if SOC_EXTERNAL_COEX_ADVANCE @@ -424,7 +459,7 @@ esp_err_t esp_extern_coex_register_txline(uint32_t pin) ESP_LOGI(TAG, "external coex select output io %d as txline", esp_extern_coex_outpin); - gpio_matrix_out(esp_extern_coex_outpin, BB_DIAG9_IDX, false, false); + esp_rom_gpio_matrix_out(esp_extern_coex_outpin, BB_DIAG9_IDX, false, false); return ESP_OK; } diff --git a/examples/wifi/iperf/main/cmd_wifi.c b/examples/wifi/iperf/main/cmd_wifi.c index 33ddace1f3b0..18f80e803953 100644 --- a/examples/wifi/iperf/main/cmd_wifi.c +++ b/examples/wifi/iperf/main/cmd_wifi.c @@ -182,8 +182,8 @@ void initialise_wifi(void) gpio_pin.in_pin0 = 1; gpio_pin.in_pin1 = 2; gpio_pin.out_pin0 = 3; - ESP_ERROR_CHECK( esp_enable_extern_coex_gpio_pin(EXTERN_COEX_WIRE_3, gpio_pin) ); - ESP_ERROR_CHECK( esp_extern_coex_register_txline(4) ); + gpio_pin.out_pin1 = 4; + ESP_ERROR_CHECK( esp_enable_extern_coex_gpio_pin(EXTERN_COEX_WIRE_4, gpio_pin) ); #endif #endif From 5cd0b6216a9d07a045bf4a5c25268c73bc230ada Mon Sep 17 00:00:00 2001 From: xiaqilin Date: Thu, 4 May 2023 19:59:37 +0800 Subject: [PATCH 09/11] external coex: add slave mode support --- components/esp_coex/include/esp_coexist.h | 4 +- components/esp_coex/src/coexist.c | 74 ++++++++++++++++++++--- 2 files changed, 66 insertions(+), 12 deletions(-) diff --git a/components/esp_coex/include/esp_coexist.h b/components/esp_coex/include/esp_coexist.h index e01fcee7fd76..ecf1ed888af5 100644 --- a/components/esp_coex/include/esp_coexist.h +++ b/components/esp_coex/include/esp_coexist.h @@ -170,7 +170,7 @@ esp_err_t esp_disable_extern_coex_gpio_pin(); * @return : ESP_OK - success, other - failed */ esp_err_t esp_external_coex_leader_role_set_gpio_pin(external_coex_wire_t wire_type, uint32_t in_pin0, - uint32_t in_pin1, uint32_t out_pin0); + uint32_t in_pin1, uint32_t out_pin0, uint32_t out_pin1); /** * @brief Configure follower work mode, gpio pin correspondly and finally enable external coex, @@ -179,7 +179,7 @@ esp_err_t esp_external_coex_leader_role_set_gpio_pin(external_coex_wire_t wire_t * @param gpio_pin : gpio pin number to select. * @return : ESP_OK - success, other - failed */ -esp_err_t esp_external_coex_follower_role_set_gpio_pin(external_coex_wire_t wire_type, uint32_t in_pin0, +esp_err_t esp_external_coex_follower_role_set_gpio_pin(external_coex_wire_t wire_type, uint32_t in_pin0, uint32_t in_pin1, uint32_t out_pin0, uint32_t out_pin1); /** diff --git a/components/esp_coex/src/coexist.c b/components/esp_coex/src/coexist.c index 02d479df1bff..0fc08d03d20a 100644 --- a/components/esp_coex/src/coexist.c +++ b/components/esp_coex/src/coexist.c @@ -54,7 +54,7 @@ esp_err_t esp_external_coex_set_work_mode(esp_extern_coex_work_mode_t work_mode) if(EXTERNAL_COEX_FOLLOWER_ROLE == work_mode) { g_external_coex_follower_pti_val.pti_val1 = 8; - g_external_coex_follower_pti_val.pti_val2 = 13; + g_external_coex_follower_pti_val.pti_val2 = 12; } return ESP_OK; @@ -157,12 +157,20 @@ bool is_legal_external_coex_gpio(external_coex_wire_t wire_type, esp_external_co } } -esp_err_t esp_external_coex_leader_role_set_gpio_pin(external_coex_wire_t wire_type, uint32_t in_pin0, uint32_t in_pin1, uint32_t out_pin0) +esp_err_t esp_external_coex_leader_role_set_gpio_pin(external_coex_wire_t wire_type, uint32_t in_pin0, uint32_t in_pin1, uint32_t out_pin0, uint32_t out_pin1) { esp_external_coex_set_work_mode(EXTERNAL_COEX_LEADER_ROLE); esp_external_coex_gpio_set_t gpio_pin; switch (wire_type) { + case EXTERN_COEX_WIRE_4: + { + gpio_pin.in_pin0 = in_pin0; + gpio_pin.in_pin1 = in_pin1; + gpio_pin.out_pin0 = out_pin0; + gpio_pin.out_pin1 = out_pin1; + break; + } case EXTERN_COEX_WIRE_3: { gpio_pin.in_pin0 = in_pin0; @@ -193,12 +201,20 @@ esp_err_t esp_external_coex_leader_role_set_gpio_pin(external_coex_wire_t wire_t return esp_enable_extern_coex_gpio_pin(wire_type, gpio_pin); } -esp_err_t esp_external_coex_follower_role_set_gpio_pin(external_coex_wire_t wire_type, uint32_t in_pin0, uint32_t out_pin0, uint32_t out_pin1) +esp_err_t esp_external_coex_follower_role_set_gpio_pin(external_coex_wire_t wire_type, uint32_t in_pin0, uint32_t in_pin1, uint32_t out_pin0, uint32_t out_pin1) { esp_external_coex_set_work_mode(EXTERNAL_COEX_FOLLOWER_ROLE); esp_external_coex_gpio_set_t gpio_pin; switch (wire_type) { + case EXTERN_COEX_WIRE_4: + { + gpio_pin.in_pin0 = in_pin0; + gpio_pin.in_pin1 = in_pin1; + gpio_pin.out_pin0 = out_pin0; + gpio_pin.out_pin1 = out_pin1; + break; + } case EXTERN_COEX_WIRE_3: { gpio_pin.in_pin0 = in_pin0; @@ -238,7 +254,7 @@ esp_err_t esp_enable_extern_coex_gpio_pin(external_coex_wire_t wire_type, esp_ex ESP_LOGE(TAG, "Configure external coex with unexpected gpio pin!!!\n"); return ESP_ERR_INVALID_ARG; } - phy_coex_force_rx_ant(); + phy_coex_force_rx_ant(); // TO DO: esp32h2 /esp32c6 remove and add a common forece rx API esp_coex_external_params(g_external_coex_params, g_external_coex_follower_pti_val.pti_val1, g_external_coex_follower_pti_val.pti_val2); @@ -246,41 +262,79 @@ esp_err_t esp_enable_extern_coex_gpio_pin(external_coex_wire_t wire_type, esp_ex switch (wire_type) { -#ifndef SOC_EXTERNAL_COEX_ADVANCE case EXTERN_COEX_WIRE_4: { +#if SOC_EXTERNAL_COEX_ADVANCE + if(EXTERNAL_COEX_LEADER_ROLE == g_external_coex_params.work_mode) { +#endif /*Input gpio pin setup --> GPIO_BT_PRIORITY_IDX：GPIO_BT_ACTIVE_IDX*/ gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.in_pin0], PIN_FUNC_GPIO); gpio_set_direction(gpio_pin.in_pin0, GPIO_MODE_INPUT); +#if SOC_EXTERNAL_COEX_ADVANCE + esp_rom_gpio_connect_in_signal(gpio_pin.in_pin0, EXTERN_ACTIVE_I_IDX, false); +#else esp_rom_gpio_connect_in_signal(gpio_pin.in_pin0, GPIO_BT_ACTIVE_IDX, false); - +#endif gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.in_pin1], PIN_FUNC_GPIO); gpio_set_direction(gpio_pin.in_pin1, GPIO_MODE_INPUT); +#if SOC_EXTERNAL_COEX_ADVANCE + esp_rom_gpio_connect_in_signal(gpio_pin.in_pin1, EXTERN_PRIORITY_I_IDX, false); +#else esp_rom_gpio_connect_in_signal(gpio_pin.in_pin1, GPIO_BT_PRIORITY_IDX, false); +#endif /*Output gpio pin setup --> GPIO_WLAN_ACTIVE_IDX: 1 BT, 0 WiFi*/ gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.out_pin0], PIN_FUNC_GPIO); gpio_set_direction(gpio_pin.out_pin0, GPIO_MODE_OUTPUT); REG_WRITE(GPIO_ENABLE_W1TC_REG, BIT(gpio_pin.out_pin0)); +#if SOC_EXTERNAL_COEX_ADVANCE + esp_rom_gpio_connect_out_signal(gpio_pin.out_pin0, EXTERN_ACTIVE_O_IDX, false, false); +#else esp_rom_gpio_connect_out_signal(gpio_pin.out_pin0, GPIO_WLAN_ACTIVE_IDX, false, false); - - +#endif +#ifndef SOC_EXTERNAL_COEX_ADVANCE + esp_extern_coex_register_txline(gpio_pin.out_pin1); // For leader mode, set wifi txline +#endif REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin0), GPIO_PIN1_SYNC1_BYPASS, 2); REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin0), GPIO_PIN1_SYNC2_BYPASS, 2); REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin1), GPIO_PIN1_SYNC1_BYPASS, 2); REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin1), GPIO_PIN1_SYNC2_BYPASS, 2); +#if SOC_EXTERNAL_COEX_ADVANCE + } + else if(EXTERNAL_COEX_FOLLOWER_ROLE == g_external_coex_params.work_mode) { + gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.in_pin0], PIN_FUNC_GPIO); + gpio_set_direction(gpio_pin.in_pin0, GPIO_MODE_INPUT); + esp_rom_gpio_connect_in_signal(gpio_pin.in_pin0, EXTERN_ACTIVE_I_IDX, false); + + gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.in_pin1], PIN_FUNC_GPIO); + gpio_set_direction(gpio_pin.in_pin1, GPIO_MODE_INPUT); + esp_rom_gpio_connect_in_signal(gpio_pin.in_pin1, EXTERN_PRIORITY_I_IDX, false); + + gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.out_pin0], PIN_FUNC_GPIO); + gpio_set_direction(gpio_pin.out_pin0, GPIO_MODE_OUTPUT); + REG_WRITE(GPIO_ENABLE_W1TC_REG, BIT(gpio_pin.out_pin0)); + esp_rom_gpio_connect_out_signal(gpio_pin.out_pin0, EXTERN_ACTIVE_O_IDX, false, false); + + gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.out_pin1], PIN_FUNC_GPIO); + gpio_set_direction(gpio_pin.out_pin1, GPIO_MODE_OUTPUT); + REG_WRITE(GPIO_ENABLE_W1TC_REG, BIT(gpio_pin.out_pin1)); + esp_rom_gpio_connect_out_signal(gpio_pin.out_pin1, EXTERN_PRIORITY_O_IDX, false, false); - esp_extern_coex_register_txline(gpio_pin.out_pin1); + REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin0), GPIO_PIN1_SYNC1_BYPASS, 2); + REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin0), GPIO_PIN1_SYNC2_BYPASS, 2); + } +#else +#endif int ret = esp_coex_external_set(EXTERN_COEX_PTI_MID, EXTERN_COEX_PTI_MID, EXTERN_COEX_PTI_HIGH); if (ESP_OK != ret) { return ESP_FAIL; } break; } -#endif + case EXTERN_COEX_WIRE_3: { #if SOC_EXTERNAL_COEX_ADVANCE From 2f56bd8aaca29f68b6878504e38ed95602a8d8ba Mon Sep 17 00:00:00 2001 From: muhaidong Date: Mon, 8 May 2023 16:22:30 +0800 Subject: [PATCH 10/11] external coex: rename coex gpio struct field names --- components/esp_coex/Kconfig | 2 +- components/esp_coex/include/esp_coexist.h | 67 +-- .../esp_coex/include/esp_coexist_internal.h | 18 +- components/esp_coex/src/coexist.c | 557 +++++------------- .../esp32c2/include/soc/Kconfig.soc_caps.in | 4 + components/soc/esp32c2/include/soc/soc_caps.h | 5 +- .../esp32c3/include/soc/Kconfig.soc_caps.in | 8 + components/soc/esp32c3/include/soc/soc_caps.h | 4 + .../esp32c6/include/soc/Kconfig.soc_caps.in | 8 + components/soc/esp32c6/include/soc/soc_caps.h | 4 + .../esp32h2/include/soc/Kconfig.soc_caps.in | 8 + components/soc/esp32h2/include/soc/soc_caps.h | 4 + .../esp32s2/include/soc/Kconfig.soc_caps.in | 8 + components/soc/esp32s2/include/soc/soc_caps.h | 4 + .../esp32s3/include/soc/Kconfig.soc_caps.in | 8 + components/soc/esp32s3/include/soc/soc_caps.h | 4 + examples/wifi/iperf/main/cmd_wifi.c | 19 +- 17 files changed, 263 insertions(+), 469 deletions(-) diff --git a/components/esp_coex/Kconfig b/components/esp_coex/Kconfig index c8fdf5889ca6..e526c2705c67 100644 --- a/components/esp_coex/Kconfig +++ b/components/esp_coex/Kconfig @@ -17,7 +17,7 @@ menu "Wireless Coexistence" config ESP_COEX_EXTERNAL_COEXIST_ENABLE bool "External Coexistence" default n - depends on (!(BT_ENABLED||NIMBLE_ENABLED)&&(!IDF_TARGET_ESP32)&&(!IDF_TARGET_ESP32C6)) #JIRA FCC52 + depends on (!(BT_ENABLED||NIMBLE_ENABLED)&&(!IDF_TARGET_ESP32)) help If enabled, HW External coexistence arbitration is managed by GPIO pins. It can support three types of wired combinations so far which are 1-wired/2-wired/3-wired. diff --git a/components/esp_coex/include/esp_coexist.h b/components/esp_coex/include/esp_coexist.h index ecf1ed888af5..f8eb69d5c794 100644 --- a/components/esp_coex/include/esp_coexist.h +++ b/components/esp_coex/include/esp_coexist.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -9,6 +9,7 @@ #include #include "esp_err.h" +#include "hal/gpio_types.h" #ifdef __cplusplus extern "C" { @@ -46,12 +47,25 @@ typedef enum { * @brief external coex gpio pti */ typedef struct { - uint32_t in_pin0; - uint32_t in_pin1; - uint32_t out_pin0; - uint32_t out_pin1; + union { + uint32_t in_pin0 __attribute__((deprecated("Use 'request' instead"))); + gpio_num_t request; /**< request gpio signal from slave to master */ + }; + union { + uint32_t in_pin1 __attribute__((deprecated("Use 'priority' instead"))); + gpio_num_t priority; /**< request gpio signal priority from slave to master */ + }; + union { + uint32_t out_pin0 __attribute__((deprecated("Use 'grant' instead"))); + gpio_num_t grant; /**< grant gpio signal from master to slave */ + }; + union { + uint32_t out_pin1 __attribute__((deprecated("Use 'tx_line' instead"))); + gpio_num_t tx_line; /**< tx_line gpio signal from master to slave, indicates whether the master's WiFi is transmitting or not*/ + }; } esp_external_coex_gpio_set_t; + /** * @brief external coex pti level */ @@ -61,14 +75,6 @@ typedef enum { EXTERN_COEX_PTI_NUM, } esp_coex_pti_level_t; -/** - * @brief external coex follower pti - */ -typedef struct { - uint32_t pti_val1; - uint32_t pti_val2; -} esp_external_coex_follower_pti_t; - /** * @brief external coex role */ @@ -78,18 +84,6 @@ typedef enum { EXTERNAL_COEX_UNKNOWN_ROLE, } esp_extern_coex_work_mode_t; -/** - * @brief external coex wiretype & role composition - */ -typedef enum { - wire_3_leader_mode = 0, - wire_2_leader_mode, - wire_1_leader_mode, - wire_3_follower_mode, - wire_2_follower_mode, - wire_1_follower_mode, -} external_coex_classification; - /** * @brief external coex advance setup */ @@ -144,6 +138,13 @@ esp_err_t esp_coex_status_bit_set(esp_coex_status_type_t type, uint32_t status); esp_err_t esp_coex_status_bit_clear(esp_coex_status_type_t type, uint32_t status); #if CONFIG_EXTERNAL_COEX_ENABLE +/** + * @brief Configure work mode, the default work mode is leader role. + * @param work_mode : work mode. + * @return : ESP_OK - success, other - failed + */ +esp_err_t esp_external_coex_set_work_mode(esp_extern_coex_work_mode_t work_mode); + /** * @brief Setup gpio pin and corresponding pti level, start external coex, * the default work mode is leader role, the default output grant validate pin is high, @@ -169,8 +170,8 @@ esp_err_t esp_disable_extern_coex_gpio_pin(); * @param gpio_pin : gpio pin number to select. * @return : ESP_OK - success, other - failed */ -esp_err_t esp_external_coex_leader_role_set_gpio_pin(external_coex_wire_t wire_type, uint32_t in_pin0, - uint32_t in_pin1, uint32_t out_pin0, uint32_t out_pin1); +esp_err_t esp_external_coex_leader_role_set_gpio_pin(external_coex_wire_t wire_type, uint32_t request, uint32_t priority, + uint32_t grant) __attribute__((deprecated("Please use esp_external_coex_set_work_mode and esp_enable_extern_coex_gpio_pin instead"))); /** * @brief Configure follower work mode, gpio pin correspondly and finally enable external coex, @@ -179,8 +180,8 @@ esp_err_t esp_external_coex_leader_role_set_gpio_pin(external_coex_wire_t wire_t * @param gpio_pin : gpio pin number to select. * @return : ESP_OK - success, other - failed */ -esp_err_t esp_external_coex_follower_role_set_gpio_pin(external_coex_wire_t wire_type, uint32_t in_pin0, uint32_t in_pin1, - uint32_t out_pin0, uint32_t out_pin1); +esp_err_t esp_external_coex_follower_role_set_gpio_pin(external_coex_wire_t wire_type, uint32_t request, uint32_t priority, + uint32_t grant) __attribute__((deprecated("Please use esp_external_coex_set_work_mode and esp_enable_extern_coex_gpio_pin instead"))); /** * @brief Configure output grant signal latency in delay microseconds only for leader role of external coex, @@ -199,12 +200,8 @@ esp_err_t esp_external_coex_set_grant_delay(uint8_t delay_us); * @return : ESP_OK - success, other - failed */ esp_err_t esp_external_coex_set_validate_high(bool is_high_valid); -#else -esp_err_t esp_extern_coex_register_txline(uint32_t pin); - -esp_err_t esp_extern_coex_unregister_txline(void); -#endif -#endif +#endif /* SOC_EXTERNAL_COEX_ADVANCE */ +#endif /* CONFIG_EXTERNAL_COEX_ENABLE */ #if CONFIG_ESP_COEX_SW_COEXIST_ENABLE && CONFIG_SOC_IEEE802154_SUPPORTED /** diff --git a/components/esp_coex/include/esp_coexist_internal.h b/components/esp_coex/include/esp_coexist_internal.h index 8490222cb59f..d22f86d2f3fc 100644 --- a/components/esp_coex/include/esp_coexist_internal.h +++ b/components/esp_coex/include/esp_coexist_internal.h @@ -306,26 +306,12 @@ esp_err_t esp_coex_adapter_register(coex_adapter_funcs_t *funcs); #if CONFIG_EXTERNAL_COEX_ENABLE /** - * @brief Force RX Anttena only in external coex situation. - */ -extern void phy_coex_force_rx_ant(void); - -/** - * @brief Dismiss RX Anttena only in external coex situation. - */ -extern void phy_coex_dismiss_rx_ant(void); - -/** - * @brief Set external coexistence advanced informations, like working mode and grant mode in which level. - * - * @param outpti1 Only for slave mode, external coex output priority in level1. - * @param output2 Only for slave mode, external coex output priority in level2. + * @brief Set external coexistence advanced informations, like working mode. * * @return * - ESP_OK: succeed */ -esp_err_t esp_coex_external_params(esp_external_coex_advance_t coex_info, - uint32_t out_pti1, uint32_t out_pti2); +esp_err_t esp_coex_external_params(esp_external_coex_advance_t coex_info); /** * @brief Set external coexistence pti level and enable it. diff --git a/components/esp_coex/src/coexist.c b/components/esp_coex/src/coexist.c index 0fc08d03d20a..643f1b99de28 100644 --- a/components/esp_coex/src/coexist.c +++ b/components/esp_coex/src/coexist.c @@ -16,12 +16,22 @@ #include "soc/gpio_periph.h" #include "soc/gpio_struct.h" #include "esp_attr.h" -#ifdef CONFIG_IDF_TARGET_ESP32S3 -#include "esp_rom/include/esp32s3/rom/gpio.h" #endif + +#if SOC_EXTERNAL_COEX_ADVANCE +#define EXTERNAL_COEX_SIGNAL_I0_IDX EXTERN_ACTIVE_I_IDX +#define EXTERNAL_COEX_SIGNAL_I1_IDX EXTERN_PRIORITY_I_IDX +#define EXTERNAL_COEX_SIGNAL_O0_IDX EXTERN_ACTIVE_O_IDX +#define EXTERNAL_COEX_SIGNAL_O1_IDX EXTERN_PRIORITY_O_IDX +#else +#define EXTERNAL_COEX_SIGNAL_I0_IDX GPIO_BT_ACTIVE_IDX +#define EXTERNAL_COEX_SIGNAL_I1_IDX GPIO_BT_PRIORITY_IDX +#define EXTERNAL_COEX_SIGNAL_O0_IDX GPIO_WLAN_ACTIVE_IDX #endif -//static const char* TAG = "coexist"; +#if SOC_EXTERNAL_COEX_LEADER_TX_LINE +#define EXTERNAL_COEX_SIGNAL_O1_TXLINE_IDX BB_DIAG9_IDX +#endif const char *esp_coex_version_get(void) { @@ -35,497 +45,232 @@ esp_err_t esp_coex_preference_set(esp_coex_prefer_t prefer) #if CONFIG_EXTERNAL_COEX_ENABLE #define GPIO_PIN_REG(a) (GPIO_PIN0_REG + a * 0x04) - -#if SOC_EXTERNAL_COEX_ADVANCE static const char *TAG = "external_coex"; -external_coex_classification s_external_coex_partner[EXTERNAL_COEX_UNKNOWN_ROLE][EXTERN_COEX_WIRE_NUM] = { - { wire_1_leader_mode, wire_2_leader_mode, wire_3_leader_mode }, - {}, - { wire_1_follower_mode, wire_2_follower_mode, wire_3_follower_mode }, -}; - static esp_external_coex_advance_t g_external_coex_params = { EXTERNAL_COEX_LEADER_ROLE, 0, true }; -esp_external_coex_follower_pti_t g_external_coex_follower_pti_val = { 0, 0 }; esp_err_t esp_external_coex_set_work_mode(esp_extern_coex_work_mode_t work_mode) { - g_external_coex_params.work_mode = work_mode; - - if(EXTERNAL_COEX_FOLLOWER_ROLE == work_mode) { - g_external_coex_follower_pti_val.pti_val1 = 8; - g_external_coex_follower_pti_val.pti_val2 = 12; +#if !SOC_EXTERNAL_COEX_ADVANCE + if(work_mode != EXTERNAL_COEX_LEADER_ROLE) + { + return ESP_ERR_INVALID_ARG; } - - return ESP_OK; -} - -esp_err_t esp_external_coex_set_grant_delay(uint8_t delay_us) -{ - g_external_coex_params.delay_us = delay_us; - - return ESP_OK; -} - -esp_err_t esp_external_coex_set_validate_high(bool is_high_valid) -{ - g_external_coex_params.is_high_valid = is_high_valid; - +#endif + g_external_coex_params.work_mode = work_mode; return ESP_OK; } bool is_legal_external_coex_gpio(external_coex_wire_t wire_type, esp_external_coex_gpio_set_t gpio_pin) { - external_coex_classification external_coex_configure = s_external_coex_partner[g_external_coex_params.work_mode][wire_type]; - - switch (external_coex_configure) + switch (wire_type) { - case wire_3_leader_mode: - { - if(gpio_pin.in_pin0 == gpio_pin.in_pin1) { - return false; - } - if(gpio_pin.in_pin0 == gpio_pin.out_pin0) { - return false; - } - if(gpio_pin.in_pin1 == gpio_pin.out_pin0) { - return false; - } - if(gpio_pin.in_pin0 >= SOC_GPIO_PIN_COUNT) { - return false; - } - if(gpio_pin.in_pin1 >= SOC_GPIO_PIN_COUNT) { - return false; - } - if(gpio_pin.out_pin0 >= SOC_GPIO_PIN_COUNT) { - return false; - } - return true; - } - case wire_3_follower_mode: + case EXTERN_COEX_WIRE_4: { - if(gpio_pin.in_pin0 == gpio_pin.out_pin0) { + if(!GPIO_IS_VALID_GPIO(gpio_pin.tx_line) + || gpio_pin.tx_line == gpio_pin.priority || gpio_pin.tx_line == gpio_pin.grant || gpio_pin.tx_line == gpio_pin.request) { return false; } - if(gpio_pin.in_pin0 == gpio_pin.out_pin1) { - return false; - } - if(gpio_pin.out_pin0 == gpio_pin.out_pin1) { - return false; - } - if(gpio_pin.in_pin0 >= SOC_GPIO_PIN_COUNT) { - return false; - } - if(gpio_pin.out_pin1 >= SOC_GPIO_PIN_COUNT) { - return false; - } - if(gpio_pin.out_pin0 >= SOC_GPIO_PIN_COUNT) { - return false; - } - return true; } - case wire_2_leader_mode: - case wire_2_follower_mode: + __attribute__((fallthrough)); + case EXTERN_COEX_WIRE_3: { - if(gpio_pin.in_pin0 == gpio_pin.out_pin0) { - return false; - } - if(gpio_pin.in_pin0 >= SOC_GPIO_PIN_COUNT) { - return false; - } - if(gpio_pin.out_pin0 >= SOC_GPIO_PIN_COUNT) { + if(!GPIO_IS_VALID_GPIO(gpio_pin.priority) || gpio_pin.priority == gpio_pin.grant || gpio_pin.priority == gpio_pin.request) { return false; } - return true; } - case wire_1_leader_mode: + __attribute__((fallthrough)); + case EXTERN_COEX_WIRE_2: { - if(gpio_pin.in_pin0 >= SOC_GPIO_PIN_COUNT) { + if(!GPIO_IS_VALID_GPIO(gpio_pin.grant) || gpio_pin.grant == gpio_pin.request) { return false; } - return true; } - case wire_1_follower_mode: + __attribute__((fallthrough)); + case EXTERN_COEX_WIRE_1: { - if(gpio_pin.out_pin0 >= SOC_GPIO_PIN_COUNT) { + if(!GPIO_IS_VALID_GPIO(gpio_pin.request)) { return false; } - return true; + break; } default: return false; } + return true; } -esp_err_t esp_external_coex_leader_role_set_gpio_pin(external_coex_wire_t wire_type, uint32_t in_pin0, uint32_t in_pin1, uint32_t out_pin0, uint32_t out_pin1) +#if SOC_EXTERNAL_COEX_ADVANCE +esp_err_t esp_external_coex_set_gpio_pin(esp_external_coex_gpio_set_t *gpio_pin, external_coex_wire_t wire_type, uint32_t request, uint32_t priority, uint32_t grant) { - esp_external_coex_set_work_mode(EXTERNAL_COEX_LEADER_ROLE); - esp_external_coex_gpio_set_t gpio_pin; - switch (wire_type) { - case EXTERN_COEX_WIRE_4: - { - gpio_pin.in_pin0 = in_pin0; - gpio_pin.in_pin1 = in_pin1; - gpio_pin.out_pin0 = out_pin0; - gpio_pin.out_pin1 = out_pin1; - break; - } case EXTERN_COEX_WIRE_3: - { - gpio_pin.in_pin0 = in_pin0; - gpio_pin.in_pin1 = in_pin1; - gpio_pin.out_pin0 = out_pin0; - break; - } + gpio_pin->priority = priority; + __attribute__((fallthrough)); case EXTERN_COEX_WIRE_2: - { - gpio_pin.in_pin0 = in_pin0; - gpio_pin.out_pin0 = out_pin0; - break; - } + gpio_pin->grant = grant; + __attribute__((fallthrough)); case EXTERN_COEX_WIRE_1: { - gpio_pin.in_pin0 = in_pin0; + gpio_pin->request = request; break; } default: { - gpio_pin.in_pin0 = in_pin0; - gpio_pin.in_pin1 = in_pin1; - gpio_pin.out_pin0 = out_pin0; + gpio_pin->request = request; + gpio_pin->priority = priority; + gpio_pin->grant = grant; break; } } + return ESP_OK; +} + +esp_err_t esp_external_coex_set_grant_delay(uint8_t delay_us) +{ + g_external_coex_params.delay_us = delay_us; + return ESP_OK; +} + +esp_err_t esp_external_coex_set_validate_high(bool is_high_valid) +{ + g_external_coex_params.is_high_valid = is_high_valid; + return ESP_OK; +} +esp_err_t esp_external_coex_leader_role_set_gpio_pin(external_coex_wire_t wire_type, uint32_t request, uint32_t priority, uint32_t grant) +{ + esp_external_coex_set_work_mode(EXTERNAL_COEX_LEADER_ROLE); + esp_external_coex_gpio_set_t gpio_pin; + esp_external_coex_set_gpio_pin(&gpio_pin, wire_type, request, priority, grant); return esp_enable_extern_coex_gpio_pin(wire_type, gpio_pin); } -esp_err_t esp_external_coex_follower_role_set_gpio_pin(external_coex_wire_t wire_type, uint32_t in_pin0, uint32_t in_pin1, uint32_t out_pin0, uint32_t out_pin1) +esp_err_t esp_external_coex_follower_role_set_gpio_pin(external_coex_wire_t wire_type, uint32_t request, uint32_t priority, uint32_t grant) { esp_external_coex_set_work_mode(EXTERNAL_COEX_FOLLOWER_ROLE); esp_external_coex_gpio_set_t gpio_pin; - - switch (wire_type) { - case EXTERN_COEX_WIRE_4: - { - gpio_pin.in_pin0 = in_pin0; - gpio_pin.in_pin1 = in_pin1; - gpio_pin.out_pin0 = out_pin0; - gpio_pin.out_pin1 = out_pin1; - break; - } - case EXTERN_COEX_WIRE_3: - { - gpio_pin.in_pin0 = in_pin0; - gpio_pin.out_pin0 = out_pin0; - gpio_pin.out_pin1 = out_pin1; - break; - } - case EXTERN_COEX_WIRE_2: - { - gpio_pin.in_pin0 = in_pin0; - gpio_pin.out_pin0 = out_pin0; - break; - } - case EXTERN_COEX_WIRE_1: - { - gpio_pin.out_pin0 = out_pin0; - break; - } - default: - { - gpio_pin.in_pin0 = in_pin0; - gpio_pin.out_pin0 = out_pin0; - gpio_pin.out_pin1 = out_pin1; - break; - } - } - + esp_external_coex_set_gpio_pin(&gpio_pin, wire_type, request, priority, grant); return esp_enable_extern_coex_gpio_pin(wire_type, gpio_pin); } -#endif +#endif /* SOC_EXTERNAL_COEX_ADVANCE */ esp_err_t esp_enable_extern_coex_gpio_pin(external_coex_wire_t wire_type, esp_external_coex_gpio_set_t gpio_pin) { -#if SOC_EXTERNAL_COEX_ADVANCE if(false == is_legal_external_coex_gpio(wire_type, gpio_pin)) { ESP_LOGE(TAG, "Configure external coex with unexpected gpio pin!!!\n"); return ESP_ERR_INVALID_ARG; } - phy_coex_force_rx_ant(); // TO DO: esp32h2 /esp32c6 remove and add a common forece rx API - - esp_coex_external_params(g_external_coex_params, g_external_coex_follower_pti_val.pti_val1, - g_external_coex_follower_pti_val.pti_val2); -#endif - - switch (wire_type) - { - case EXTERN_COEX_WIRE_4: - { -#if SOC_EXTERNAL_COEX_ADVANCE - if(EXTERNAL_COEX_LEADER_ROLE == g_external_coex_params.work_mode) { -#endif - /*Input gpio pin setup --> GPIO_BT_PRIORITY_IDX：GPIO_BT_ACTIVE_IDX*/ - gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.in_pin0], PIN_FUNC_GPIO); - gpio_set_direction(gpio_pin.in_pin0, GPIO_MODE_INPUT); - -#if SOC_EXTERNAL_COEX_ADVANCE - esp_rom_gpio_connect_in_signal(gpio_pin.in_pin0, EXTERN_ACTIVE_I_IDX, false); -#else - esp_rom_gpio_connect_in_signal(gpio_pin.in_pin0, GPIO_BT_ACTIVE_IDX, false); -#endif - gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.in_pin1], PIN_FUNC_GPIO); - gpio_set_direction(gpio_pin.in_pin1, GPIO_MODE_INPUT); - -#if SOC_EXTERNAL_COEX_ADVANCE - esp_rom_gpio_connect_in_signal(gpio_pin.in_pin1, EXTERN_PRIORITY_I_IDX, false); -#else - esp_rom_gpio_connect_in_signal(gpio_pin.in_pin1, GPIO_BT_PRIORITY_IDX, false); -#endif - - /*Output gpio pin setup --> GPIO_WLAN_ACTIVE_IDX: 1 BT, 0 WiFi*/ - gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.out_pin0], PIN_FUNC_GPIO); - gpio_set_direction(gpio_pin.out_pin0, GPIO_MODE_OUTPUT); - REG_WRITE(GPIO_ENABLE_W1TC_REG, BIT(gpio_pin.out_pin0)); #if SOC_EXTERNAL_COEX_ADVANCE - esp_rom_gpio_connect_out_signal(gpio_pin.out_pin0, EXTERN_ACTIVE_O_IDX, false, false); -#else - esp_rom_gpio_connect_out_signal(gpio_pin.out_pin0, GPIO_WLAN_ACTIVE_IDX, false, false); + esp_coex_external_params(g_external_coex_params); #endif -#ifndef SOC_EXTERNAL_COEX_ADVANCE - esp_extern_coex_register_txline(gpio_pin.out_pin1); // For leader mode, set wifi txline -#endif - REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin0), GPIO_PIN1_SYNC1_BYPASS, 2); - REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin0), GPIO_PIN1_SYNC2_BYPASS, 2); - REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin1), GPIO_PIN1_SYNC1_BYPASS, 2); - REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin1), GPIO_PIN1_SYNC2_BYPASS, 2); -#if SOC_EXTERNAL_COEX_ADVANCE - } - else if(EXTERNAL_COEX_FOLLOWER_ROLE == g_external_coex_params.work_mode) { - gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.in_pin0], PIN_FUNC_GPIO); - gpio_set_direction(gpio_pin.in_pin0, GPIO_MODE_INPUT); - esp_rom_gpio_connect_in_signal(gpio_pin.in_pin0, EXTERN_ACTIVE_I_IDX, false); - - gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.in_pin1], PIN_FUNC_GPIO); - gpio_set_direction(gpio_pin.in_pin1, GPIO_MODE_INPUT); - esp_rom_gpio_connect_in_signal(gpio_pin.in_pin1, EXTERN_PRIORITY_I_IDX, false); - - gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.out_pin0], PIN_FUNC_GPIO); - gpio_set_direction(gpio_pin.out_pin0, GPIO_MODE_OUTPUT); - REG_WRITE(GPIO_ENABLE_W1TC_REG, BIT(gpio_pin.out_pin0)); - esp_rom_gpio_connect_out_signal(gpio_pin.out_pin0, EXTERN_ACTIVE_O_IDX, false, false); - - gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.out_pin1], PIN_FUNC_GPIO); - gpio_set_direction(gpio_pin.out_pin1, GPIO_MODE_OUTPUT); - REG_WRITE(GPIO_ENABLE_W1TC_REG, BIT(gpio_pin.out_pin1)); - esp_rom_gpio_connect_out_signal(gpio_pin.out_pin1, EXTERN_PRIORITY_O_IDX, false, false); - - REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin0), GPIO_PIN1_SYNC1_BYPASS, 2); - REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin0), GPIO_PIN1_SYNC2_BYPASS, 2); - } -#else -#endif - int ret = esp_coex_external_set(EXTERN_COEX_PTI_MID, EXTERN_COEX_PTI_MID, EXTERN_COEX_PTI_HIGH); - if (ESP_OK != ret) { - return ESP_FAIL; - } - break; - } - case EXTERN_COEX_WIRE_3: + if(EXTERNAL_COEX_LEADER_ROLE == g_external_coex_params.work_mode) { + switch (wire_type) { -#if SOC_EXTERNAL_COEX_ADVANCE - if(EXTERNAL_COEX_LEADER_ROLE == g_external_coex_params.work_mode) { -#endif - /*Input gpio pin setup --> GPIO_BT_PRIORITY_IDX：GPIO_BT_ACTIVE_IDX*/ - gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.in_pin0], PIN_FUNC_GPIO); - gpio_set_direction(gpio_pin.in_pin0, GPIO_MODE_INPUT); - -#if SOC_EXTERNAL_COEX_ADVANCE - esp_rom_gpio_connect_in_signal(gpio_pin.in_pin0, EXTERN_ACTIVE_I_IDX, false); -#else - esp_rom_gpio_connect_in_signal(gpio_pin.in_pin0, GPIO_BT_ACTIVE_IDX, false); -#endif - - gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.in_pin1], PIN_FUNC_GPIO); - gpio_set_direction(gpio_pin.in_pin1, GPIO_MODE_INPUT); - -#if SOC_EXTERNAL_COEX_ADVANCE - esp_rom_gpio_connect_in_signal(gpio_pin.in_pin1, EXTERN_PRIORITY_I_IDX, false); -#else - esp_rom_gpio_connect_in_signal(gpio_pin.in_pin1, GPIO_BT_PRIORITY_IDX, false); -#endif - - /*Output gpio pin setup --> GPIO_WLAN_ACTIVE_IDX: 1 BT, 0 WiFi*/ - gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.out_pin0], PIN_FUNC_GPIO); - gpio_set_direction(gpio_pin.out_pin0, GPIO_MODE_OUTPUT); - REG_WRITE(GPIO_ENABLE_W1TC_REG, BIT(gpio_pin.out_pin0)); - -#if SOC_EXTERNAL_COEX_ADVANCE - esp_rom_gpio_connect_out_signal(gpio_pin.out_pin0, EXTERN_ACTIVE_O_IDX, false, false); -#else - esp_rom_gpio_connect_out_signal(gpio_pin.out_pin0, GPIO_WLAN_ACTIVE_IDX, false, false); -#endif - - REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin0), GPIO_PIN1_SYNC1_BYPASS, 2); - REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin0), GPIO_PIN1_SYNC2_BYPASS, 2); - REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin1), GPIO_PIN1_SYNC1_BYPASS, 2); - REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin1), GPIO_PIN1_SYNC2_BYPASS, 2); -#if SOC_EXTERNAL_COEX_ADVANCE - } - else if(EXTERNAL_COEX_FOLLOWER_ROLE == g_external_coex_params.work_mode) { - /*Input gpio pin setup --> GPIO_BT_PRIORITY_IDX：GPIO_BT_ACTIVE_IDX*/ - gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.in_pin0], PIN_FUNC_GPIO); - gpio_set_direction(gpio_pin.in_pin0, GPIO_MODE_INPUT); - - esp_rom_gpio_connect_in_signal(gpio_pin.in_pin0, EXTERN_ACTIVE_I_IDX, false); - - /*Output gpio pin setup --> GPIO_WLAN_ACTIVE_IDX: 1 BT, 0 WiFi*/ - gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.out_pin0], PIN_FUNC_GPIO); - gpio_set_direction(gpio_pin.out_pin0, GPIO_MODE_OUTPUT); - REG_WRITE(GPIO_ENABLE_W1TC_REG, BIT(gpio_pin.out_pin0)); - esp_rom_gpio_connect_out_signal(gpio_pin.out_pin0, EXTERN_ACTIVE_O_IDX, false, false); - - gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.out_pin1], PIN_FUNC_GPIO); - gpio_set_direction(gpio_pin.out_pin1, GPIO_MODE_OUTPUT); - REG_WRITE(GPIO_ENABLE_W1TC_REG, BIT(gpio_pin.out_pin1)); - esp_rom_gpio_connect_out_signal(gpio_pin.out_pin1, EXTERN_PRIORITY_O_IDX, false, false); - - REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin0), GPIO_PIN1_SYNC1_BYPASS, 2); - REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin0), GPIO_PIN1_SYNC2_BYPASS, 2); - } -#else -#endif - int ret = esp_coex_external_set(EXTERN_COEX_PTI_MID, EXTERN_COEX_PTI_MID, EXTERN_COEX_PTI_HIGH); - if (ESP_OK != ret) { - return ESP_FAIL; +#if SOC_EXTERNAL_COEX_LEADER_TX_LINE + case EXTERN_COEX_WIRE_4: + { + gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.tx_line], PIN_FUNC_GPIO); + gpio_set_direction(gpio_pin.tx_line, GPIO_MODE_OUTPUT); + REG_WRITE(GPIO_ENABLE_W1TC_REG, BIT(gpio_pin.tx_line)); + esp_rom_gpio_connect_out_signal(gpio_pin.tx_line, EXTERNAL_COEX_SIGNAL_O1_TXLINE_IDX, false, false); } - break; - } - case EXTERN_COEX_WIRE_2: - { - /*Input gpio pin setup --> GPIO_BT_PRIORITY_IDX：GPIO_BT_ACTIVE_IDX*/ - gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.in_pin0], PIN_FUNC_GPIO); - gpio_set_direction(gpio_pin.in_pin0, GPIO_MODE_INPUT); - -#if SOC_EXTERNAL_COEX_ADVANCE - esp_rom_gpio_connect_in_signal(gpio_pin.in_pin0, EXTERN_ACTIVE_I_IDX, false); -#else - esp_rom_gpio_connect_in_signal(gpio_pin.in_pin0, GPIO_BT_ACTIVE_IDX, false); + __attribute__((fallthrough)); #endif - - /*Output gpio pin setup --> GPIO_WLAN_ACTIVE_IDX: 1 BT, 0 WiFi*/ - gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.out_pin0], PIN_FUNC_GPIO); - gpio_set_direction(gpio_pin.out_pin0, GPIO_MODE_OUTPUT); - REG_WRITE(GPIO_ENABLE_W1TC_REG, BIT(gpio_pin.out_pin0)); - -#if SOC_EXTERNAL_COEX_ADVANCE - esp_rom_gpio_connect_out_signal(gpio_pin.out_pin0, EXTERN_ACTIVE_O_IDX, false, false); -#else - esp_rom_gpio_connect_out_signal(gpio_pin.out_pin0, GPIO_WLAN_ACTIVE_IDX, false, false); -#endif - - REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin0), GPIO_PIN1_SYNC1_BYPASS, 2); - REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin0), GPIO_PIN1_SYNC2_BYPASS, 2); - - int ret = esp_coex_external_set(EXTERN_COEX_PTI_MID, EXTERN_COEX_PTI_MID, EXTERN_COEX_PTI_MID); - if (ESP_OK != ret) { + case EXTERN_COEX_WIRE_3: + { + gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.priority], PIN_FUNC_GPIO); + gpio_set_direction(gpio_pin.priority, GPIO_MODE_INPUT); + esp_rom_gpio_connect_in_signal(gpio_pin.priority, EXTERNAL_COEX_SIGNAL_I1_IDX, false); + REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.priority), GPIO_PIN1_SYNC1_BYPASS, 2); + REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.priority), GPIO_PIN1_SYNC2_BYPASS, 2); + } + __attribute__((fallthrough)); + case EXTERN_COEX_WIRE_2: + { + gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.grant], PIN_FUNC_GPIO); + gpio_set_direction(gpio_pin.grant, GPIO_MODE_OUTPUT); + REG_WRITE(GPIO_ENABLE_W1TC_REG, BIT(gpio_pin.grant)); + esp_rom_gpio_connect_out_signal(gpio_pin.grant, EXTERNAL_COEX_SIGNAL_O0_IDX, false, false); + } + __attribute__((fallthrough)); + case EXTERN_COEX_WIRE_1: + { + gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.request], PIN_FUNC_GPIO); + gpio_set_direction(gpio_pin.request, GPIO_MODE_INPUT); + esp_rom_gpio_connect_in_signal(gpio_pin.request, EXTERNAL_COEX_SIGNAL_I0_IDX, false); + REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.request), GPIO_PIN1_SYNC1_BYPASS, 2); + REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.request), GPIO_PIN1_SYNC2_BYPASS, 2); + break; + } + default: + { return ESP_FAIL; } - break; } - case EXTERN_COEX_WIRE_1: - { + } else if(EXTERNAL_COEX_FOLLOWER_ROLE == g_external_coex_params.work_mode) { #if SOC_EXTERNAL_COEX_ADVANCE - if(EXTERNAL_COEX_LEADER_ROLE == g_external_coex_params.work_mode) { -#endif - /*Input gpio pin setup --> GPIO_BT_PRIORITY_IDX：GPIO_BT_ACTIVE_IDX*/ - gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.in_pin0], PIN_FUNC_GPIO); - gpio_set_direction(gpio_pin.in_pin0, GPIO_MODE_INPUT); - -#if SOC_EXTERNAL_COEX_ADVANCE - esp_rom_gpio_connect_in_signal(gpio_pin.in_pin0, EXTERN_ACTIVE_I_IDX, false); -#else - esp_rom_gpio_connect_in_signal(gpio_pin.in_pin0, GPIO_BT_ACTIVE_IDX, false); -#endif - - REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin0), GPIO_PIN1_SYNC1_BYPASS, 2); - REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin0), GPIO_PIN1_SYNC2_BYPASS, 2); -#if SOC_EXTERNAL_COEX_ADVANCE - } - else if(EXTERNAL_COEX_FOLLOWER_ROLE == g_external_coex_params.work_mode) { - /*Output gpio pin setup --> GPIO_WLAN_ACTIVE_IDX: 1 BT, 0 WiFi*/ - gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.out_pin0], PIN_FUNC_GPIO); - gpio_set_direction(gpio_pin.out_pin0, GPIO_MODE_OUTPUT); - REG_WRITE(GPIO_ENABLE_W1TC_REG, BIT(gpio_pin.out_pin0)); - esp_rom_gpio_connect_out_signal(gpio_pin.out_pin0, EXTERN_ACTIVE_O_IDX, false, false); - } -#else -#endif - - int ret = esp_coex_external_set(EXTERN_COEX_PTI_HIGH, EXTERN_COEX_PTI_HIGH, EXTERN_COEX_PTI_HIGH); - if (ESP_OK != ret) { + switch (wire_type) + { + case EXTERN_COEX_WIRE_4: + { + gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.tx_line], PIN_FUNC_GPIO); + gpio_set_direction(gpio_pin.tx_line, GPIO_MODE_INPUT); + esp_rom_gpio_connect_in_signal(gpio_pin.tx_line, EXTERNAL_COEX_SIGNAL_I1_IDX, false); + REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.tx_line), GPIO_PIN1_SYNC1_BYPASS, 2); + REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.tx_line), GPIO_PIN1_SYNC2_BYPASS, 2); + } + __attribute__((fallthrough)); + case EXTERN_COEX_WIRE_3: + { + gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.priority], PIN_FUNC_GPIO); + gpio_set_direction(gpio_pin.priority, GPIO_MODE_OUTPUT); + REG_WRITE(GPIO_ENABLE_W1TC_REG, BIT(gpio_pin.priority)); + esp_rom_gpio_connect_out_signal(gpio_pin.priority, EXTERNAL_COEX_SIGNAL_O1_IDX, false, false); + } + __attribute__((fallthrough)); + case EXTERN_COEX_WIRE_2: + { + gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.grant], PIN_FUNC_GPIO); + gpio_set_direction(gpio_pin.grant, GPIO_MODE_INPUT); + esp_rom_gpio_connect_in_signal(gpio_pin.grant, EXTERNAL_COEX_SIGNAL_I0_IDX, false); + REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.grant), GPIO_PIN1_SYNC1_BYPASS, 2); + REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.grant), GPIO_PIN1_SYNC2_BYPASS, 2); + } + __attribute__((fallthrough)); + case EXTERN_COEX_WIRE_1: + { + gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.request], PIN_FUNC_GPIO); + gpio_set_direction(gpio_pin.request, GPIO_MODE_OUTPUT); + REG_WRITE(GPIO_ENABLE_W1TC_REG, BIT(gpio_pin.request)); + esp_rom_gpio_connect_out_signal(gpio_pin.request, EXTERNAL_COEX_SIGNAL_O0_IDX, false, false); + break; + } + default: + { return ESP_FAIL; } - break; - } - default: - { - return ESP_FAIL; } +#endif /* SOC_EXTERNAL_COEX_ADVANCE */ + return ESP_ERR_INVALID_ARG; + } + int ret = esp_coex_external_set(EXTERN_COEX_PTI_MID, EXTERN_COEX_PTI_MID, EXTERN_COEX_PTI_HIGH); + if (ESP_OK != ret) { + return ESP_FAIL; } return ESP_OK; } esp_err_t esp_disable_extern_coex_gpio_pin() { -#if SOC_EXTERNAL_COEX_ADVANCE - phy_coex_dismiss_rx_ant(); -#endif esp_coex_external_stop(); return ESP_OK; } - -#ifndef SOC_EXTERNAL_COEX_ADVANCE -#define ESP_EXTERN_COEX_OUTPIN_UNDEF 0xFFFF -DRAM_ATTR static uint32_t esp_extern_coex_outpin = ESP_EXTERN_COEX_OUTPIN_UNDEF; - -esp_err_t esp_extern_coex_register_txline(uint32_t pin) -{ - esp_extern_coex_outpin = pin; - gpio_config_t io_conf = { - //disable interrupt - .intr_type = GPIO_INTR_DISABLE, - //set as output mode - .mode = GPIO_MODE_OUTPUT, - //bit mask of the pins that you want to set,e.g.GPIO18/19 - .pin_bit_mask = (1ULL << esp_extern_coex_outpin), - //disable pull-down mode - .pull_down_en = GPIO_PULLDOWN_DISABLE, - //enable pull-up mode - .pull_up_en = GPIO_PULLUP_ENABLE, - }; - gpio_config(&io_conf); - - ESP_LOGI(TAG, "external coex select output io %d as txline", esp_extern_coex_outpin); - - esp_rom_gpio_matrix_out(esp_extern_coex_outpin, BB_DIAG9_IDX, false, false); - - return ESP_OK; -} - -esp_err_t esp_extern_coex_unregister_txline(void) -{ - /* Do nothing here */ - - return ESP_OK; -} -#endif -#endif/*External Coex*/ +#endif /* External Coex */ #if CONFIG_ESP_COEX_SW_COEXIST_ENABLE && CONFIG_SOC_IEEE802154_SUPPORTED esp_err_t esp_coex_wifi_i154_enable(void) diff --git a/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in index a260e80e7d78..84ec111f158d 100644 --- a/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in @@ -591,6 +591,10 @@ config SOC_EXTERNAL_COEX_ADVANCE bool default y +config SOC_EXTERNAL_COEX_LEADER_TX_LINE + bool + default n + config SOC_PHY_DIG_REGS_MEM_SIZE int default 21 diff --git a/components/soc/esp32c2/include/soc/soc_caps.h b/components/soc/esp32c2/include/soc/soc_caps.h index 845817b5adc8..01aaf379cf01 100644 --- a/components/soc/esp32c2/include/soc/soc_caps.h +++ b/components/soc/esp32c2/include/soc/soc_caps.h @@ -275,8 +275,9 @@ /*-------------------------- COEXISTENCE HARDWARE PTI CAPS -------------------------------*/ #define SOC_COEX_HW_PTI (1) -/*-------------------------- HARDWARE ADVANCED EXTERNAL COEXISTENCE CAPS -------------------*/ -#define SOC_EXTERNAL_COEX_ADVANCE (1) +/*-------------------------- EXTERNAL COEXISTENCE CAPS -------------------------------------*/ +#define SOC_EXTERNAL_COEX_ADVANCE (1) /*!< HARDWARE ADVANCED EXTERNAL COEXISTENCE CAPS */ +#define SOC_EXTERNAL_COEX_LEADER_TX_LINE (0) /*!< EXTERNAL COEXISTENCE TX LINE CAPS */ /*--------------- PHY REGISTER AND MEMORY SIZE CAPS --------------------------*/ #define SOC_PHY_DIG_REGS_MEM_SIZE (21*4) diff --git a/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in index b4a790a9909e..376983778289 100644 --- a/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in @@ -855,6 +855,14 @@ config SOC_COEX_HW_PTI bool default y +config SOC_EXTERNAL_COEX_ADVANCE + bool + default n + +config SOC_EXTERNAL_COEX_LEADER_TX_LINE + bool + default n + config SOC_PHY_DIG_REGS_MEM_SIZE int default 21 diff --git a/components/soc/esp32c3/include/soc/soc_caps.h b/components/soc/esp32c3/include/soc/soc_caps.h index b98c7b357fca..0ca52a51d345 100644 --- a/components/soc/esp32c3/include/soc/soc_caps.h +++ b/components/soc/esp32c3/include/soc/soc_caps.h @@ -376,6 +376,10 @@ /*-------------------------- COEXISTENCE HARDWARE PTI CAPS -------------------------------*/ #define SOC_COEX_HW_PTI (1) +/*-------------------------- EXTERNAL COEXISTENCE CAPS -------------------------------------*/ +#define SOC_EXTERNAL_COEX_ADVANCE (0) /*!< HARDWARE ADVANCED EXTERNAL COEXISTENCE CAPS */ +#define SOC_EXTERNAL_COEX_LEADER_TX_LINE (0) /*!< EXTERNAL COEXISTENCE TX LINE CAPS */ + /*--------------- PHY REGISTER AND MEMORY SIZE CAPS --------------------------*/ #define SOC_PHY_DIG_REGS_MEM_SIZE (21*4) #define SOC_MAC_BB_PD_MEM_SIZE (192*4) diff --git a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in index 1a49fd77f758..bbf30c47054e 100644 --- a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in @@ -1087,6 +1087,14 @@ config SOC_COEX_HW_PTI bool default y +config SOC_EXTERNAL_COEX_ADVANCE + bool + default y + +config SOC_EXTERNAL_COEX_LEADER_TX_LINE + bool + default n + config SOC_PHY_DIG_REGS_MEM_SIZE int default 21 diff --git a/components/soc/esp32c6/include/soc/soc_caps.h b/components/soc/esp32c6/include/soc/soc_caps.h index c5ba77fa76f6..676709dae210 100644 --- a/components/soc/esp32c6/include/soc/soc_caps.h +++ b/components/soc/esp32c6/include/soc/soc_caps.h @@ -449,6 +449,10 @@ /*-------------------------- COEXISTENCE HARDWARE PTI CAPS -------------------------------*/ #define SOC_COEX_HW_PTI (1) +/*-------------------------- EXTERNAL COEXISTENCE CAPS -------------------------------------*/ +#define SOC_EXTERNAL_COEX_ADVANCE (1) /*!< HARDWARE ADVANCED EXTERNAL COEXISTENCE CAPS */ +#define SOC_EXTERNAL_COEX_LEADER_TX_LINE (0) /*!< EXTERNAL COEXISTENCE TX LINE CAPS */ + /*--------------- PHY REGISTER AND MEMORY SIZE CAPS --------------------------*/ #define SOC_PHY_DIG_REGS_MEM_SIZE (21*4) diff --git a/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in index 451f50594493..314956ccf32e 100644 --- a/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in @@ -1063,6 +1063,14 @@ config SOC_COEX_HW_PTI bool default y +config SOC_EXTERNAL_COEX_ADVANCE + bool + default y + +config SOC_EXTERNAL_COEX_LEADER_TX_LINE + bool + default n + config SOC_PHY_DIG_REGS_MEM_SIZE int default 21 diff --git a/components/soc/esp32h2/include/soc/soc_caps.h b/components/soc/esp32h2/include/soc/soc_caps.h index f5db799604f5..a5bd04e64545 100644 --- a/components/soc/esp32h2/include/soc/soc_caps.h +++ b/components/soc/esp32h2/include/soc/soc_caps.h @@ -443,6 +443,10 @@ /*-------------------------- COEXISTENCE HARDWARE PTI CAPS -------------------------------*/ #define SOC_COEX_HW_PTI (1) +/*-------------------------- EXTERNAL COEXISTENCE CAPS -------------------------------------*/ +#define SOC_EXTERNAL_COEX_ADVANCE (1) /*!< HARDWARE ADVANCED EXTERNAL COEXISTENCE CAPS */ +#define SOC_EXTERNAL_COEX_LEADER_TX_LINE (0) /*!< EXTERNAL COEXISTENCE TX LINE CAPS */ + // TODO: IDF-6337 /*--------------- PHY REGISTER AND MEMORY SIZE CAPS --------------------------*/ #define SOC_PHY_DIG_REGS_MEM_SIZE (21*4) diff --git a/components/soc/esp32s2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32s2/include/soc/Kconfig.soc_caps.in index 40ff26611581..9a9f66fbe065 100644 --- a/components/soc/esp32s2/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32s2/include/soc/Kconfig.soc_caps.in @@ -1047,6 +1047,14 @@ config SOC_COEX_HW_PTI bool default y +config SOC_EXTERNAL_COEX_ADVANCE + bool + default n + +config SOC_EXTERNAL_COEX_LEADER_TX_LINE + bool + default y + config SOC_TEMPERATURE_SENSOR_SUPPORT_FAST_RC bool default y diff --git a/components/soc/esp32s2/include/soc/soc_caps.h b/components/soc/esp32s2/include/soc/soc_caps.h index 868c6502f027..cc3b488a0628 100644 --- a/components/soc/esp32s2/include/soc/soc_caps.h +++ b/components/soc/esp32s2/include/soc/soc_caps.h @@ -450,6 +450,10 @@ /* ---------------------------- Compatibility ------------------------------- */ // No contents +/*-------------------------- EXTERNAL COEXISTENCE CAPS -------------------------------------*/ +#define SOC_EXTERNAL_COEX_ADVANCE (0) /*!< HARDWARE ADVANCED EXTERNAL COEXISTENCE CAPS */ +#define SOC_EXTERNAL_COEX_LEADER_TX_LINE (1) /*!< EXTERNAL COEXISTENCE TX LINE CAPS */ + /*-------------------------- Temperature Sensor CAPS -------------------------------------*/ #define SOC_TEMPERATURE_SENSOR_SUPPORT_FAST_RC (1) diff --git a/components/soc/esp32s3/include/soc/Kconfig.soc_caps.in b/components/soc/esp32s3/include/soc/Kconfig.soc_caps.in index 7a15b353286c..c7508d343783 100644 --- a/components/soc/esp32s3/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32s3/include/soc/Kconfig.soc_caps.in @@ -1195,6 +1195,14 @@ config SOC_COEX_HW_PTI bool default y +config SOC_EXTERNAL_COEX_ADVANCE + bool + default n + +config SOC_EXTERNAL_COEX_LEADER_TX_LINE + bool + default y + config SOC_SDMMC_USE_GPIO_MATRIX bool default y diff --git a/components/soc/esp32s3/include/soc/soc_caps.h b/components/soc/esp32s3/include/soc/soc_caps.h index 6530d757c79b..a0b5deeb4a56 100644 --- a/components/soc/esp32s3/include/soc/soc_caps.h +++ b/components/soc/esp32s3/include/soc/soc_caps.h @@ -480,6 +480,10 @@ /*-------------------------- COEXISTENCE HARDWARE PTI CAPS -------------------------------*/ #define SOC_COEX_HW_PTI (1) +/*-------------------------- EXTERNAL COEXISTENCE CAPS -------------------------------------*/ +#define SOC_EXTERNAL_COEX_ADVANCE (0) /*!< HARDWARE ADVANCED EXTERNAL COEXISTENCE CAPS */ +#define SOC_EXTERNAL_COEX_LEADER_TX_LINE (1) /*!< EXTERNAL COEXISTENCE TX LINE CAPS */ + /*-------------------------- SDMMC CAPS -----------------------------------------*/ /* Card detect, write protect, interrupt use GPIO Matrix on all chips. diff --git a/examples/wifi/iperf/main/cmd_wifi.c b/examples/wifi/iperf/main/cmd_wifi.c index 18f80e803953..9a876a22d55e 100644 --- a/examples/wifi/iperf/main/cmd_wifi.c +++ b/examples/wifi/iperf/main/cmd_wifi.c @@ -173,17 +173,18 @@ void initialise_wifi(void) #if CONFIG_EXTERNAL_COEX_ENABLE #if SOC_EXTERNAL_COEX_ADVANCE - uint32_t in_pin0 = 1; - uint32_t in_pin1 = 2; - uint32_t out_pin0 = 3; - ESP_ERROR_CHECK( esp_external_coex_leader_role_set_gpio_pin(EXTERN_COEX_WIRE_3, in_pin0, in_pin1, out_pin0) ); + uint32_t request = 1; + uint32_t priority = 2; + uint32_t grant = 3; + ESP_ERROR_CHECK(esp_external_coex_leader_role_set_gpio_pin(EXTERN_COEX_WIRE_3, request, priority, grant)); #else esp_external_coex_gpio_set_t gpio_pin; - gpio_pin.in_pin0 = 1; - gpio_pin.in_pin1 = 2; - gpio_pin.out_pin0 = 3; - gpio_pin.out_pin1 = 4; - ESP_ERROR_CHECK( esp_enable_extern_coex_gpio_pin(EXTERN_COEX_WIRE_4, gpio_pin) ); + gpio_pin.request = 1; + gpio_pin.priority = 2; + gpio_pin.grant = 3; + gpio_pin.tx_line = 4; + esp_external_coex_set_work_mode(EXTERNAL_COEX_LEADER_ROLE); + ESP_ERROR_CHECK(esp_enable_extern_coex_gpio_pin(EXTERN_COEX_WIRE_4, gpio_pin)); #endif #endif From 7c4cd75fe77bad93d002440611264d23d44516e5 Mon Sep 17 00:00:00 2001 From: muhaidong Date: Thu, 1 Jun 2023 10:56:33 +0800 Subject: [PATCH 11/11] feat(external coex): add set tx line flag api --- components/esp_coex/include/esp_coexist.h | 8 ++++++-- .../esp_coex/include/esp_coexist_internal.h | 17 ++++++++++++++++- components/esp_coex/lib | 2 +- components/esp_coex/src/coexist.c | 8 +++++--- components/esp_wifi/lib | 2 +- examples/wifi/iperf/main/cmd_wifi.c | 16 ++++++++-------- 6 files changed, 37 insertions(+), 16 deletions(-) diff --git a/components/esp_coex/include/esp_coexist.h b/components/esp_coex/include/esp_coexist.h index f8eb69d5c794..9fda8c6d2ffb 100644 --- a/components/esp_coex/include/esp_coexist.h +++ b/components/esp_coex/include/esp_coexist.h @@ -167,7 +167,9 @@ esp_err_t esp_disable_extern_coex_gpio_pin(); * @brief Configure leader work mode, gpio pin correspondly and finally enable external coex, * demand not to call the legacy function of `esp_enable_extern_coex_gpio_pin` any more. * @param wire_type : to select the whole external coex gpio number. - * @param gpio_pin : gpio pin number to select. + * @param request : request gpio pin number to select. + * @param priority : priority gpio pin number to select. + * @param grant : grant gpio pin number to select. * @return : ESP_OK - success, other - failed */ esp_err_t esp_external_coex_leader_role_set_gpio_pin(external_coex_wire_t wire_type, uint32_t request, uint32_t priority, @@ -177,7 +179,9 @@ esp_err_t esp_external_coex_leader_role_set_gpio_pin(external_coex_wire_t wire_t * @brief Configure follower work mode, gpio pin correspondly and finally enable external coex, * demand not to call the legacy function of `esp_enable_extern_coex_gpio_pin` any more. * @param wire_type : to select the whole external coex gpio number. - * @param gpio_pin : gpio pin number to select. + * @param request : request gpio pin number to select. + * @param priority : priority gpio pin number to select. + * @param grant : grant gpio pin number to select. * @return : ESP_OK - success, other - failed */ esp_err_t esp_external_coex_follower_role_set_gpio_pin(external_coex_wire_t wire_type, uint32_t request, uint32_t priority, diff --git a/components/esp_coex/include/esp_coexist_internal.h b/components/esp_coex/include/esp_coexist_internal.h index d22f86d2f3fc..5d1fe2c5a5c6 100644 --- a/components/esp_coex/include/esp_coexist_internal.h +++ b/components/esp_coex/include/esp_coexist_internal.h @@ -308,10 +308,13 @@ esp_err_t esp_coex_adapter_register(coex_adapter_funcs_t *funcs); /** * @brief Set external coexistence advanced informations, like working mode. * + * @param out_pti1 This parameter no longer works, will be deprecated and later removed in future releases. + * @param out_pti2 This parameter no longer works, will be deprecated and later removed in future releases. + * * @return * - ESP_OK: succeed */ -esp_err_t esp_coex_external_params(esp_external_coex_advance_t coex_info); +esp_err_t esp_coex_external_params(esp_external_coex_advance_t coex_info, uint32_t out_pti1, uint32_t out_pti2); /** * @brief Set external coexistence pti level and enable it. @@ -333,6 +336,18 @@ esp_err_t esp_coex_external_set(esp_coex_pti_level_t level1, * - ESP_OK: succeed */ void esp_coex_external_stop(void); + +#if SOC_EXTERNAL_COEX_LEADER_TX_LINE +/** + * @brief Enable external coexist tx line + * + * @param en Enable external coex tx line + * + * @return + * - ESP_OK: succeed + */ +void esp_coex_external_set_txline(bool en); +#endif /*SOC_EXTERNAL_COEX_LEADER_TX_LINE*/ #endif /*External Coex*/ /** diff --git a/components/esp_coex/lib b/components/esp_coex/lib index 08e1c246c740..37698e17a4c7 160000 --- a/components/esp_coex/lib +++ b/components/esp_coex/lib @@ -1 +1 @@ -Subproject commit 08e1c246c74050565806289000f9d506bfb6ac01 +Subproject commit 37698e17a4c7fd2e0872317fc8befaac3bb10cb4 diff --git a/components/esp_coex/src/coexist.c b/components/esp_coex/src/coexist.c index 643f1b99de28..5e8a175df40b 100644 --- a/components/esp_coex/src/coexist.c +++ b/components/esp_coex/src/coexist.c @@ -164,7 +164,7 @@ esp_err_t esp_enable_extern_coex_gpio_pin(external_coex_wire_t wire_type, esp_ex } #if SOC_EXTERNAL_COEX_ADVANCE - esp_coex_external_params(g_external_coex_params); + esp_coex_external_params(g_external_coex_params, 0, 0); #endif if(EXTERNAL_COEX_LEADER_ROLE == g_external_coex_params.work_mode) { @@ -173,6 +173,7 @@ esp_err_t esp_enable_extern_coex_gpio_pin(external_coex_wire_t wire_type, esp_ex #if SOC_EXTERNAL_COEX_LEADER_TX_LINE case EXTERN_COEX_WIRE_4: { + esp_coex_external_set_txline(true); gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.tx_line], PIN_FUNC_GPIO); gpio_set_direction(gpio_pin.tx_line, GPIO_MODE_OUTPUT); REG_WRITE(GPIO_ENABLE_W1TC_REG, BIT(gpio_pin.tx_line)); @@ -254,10 +255,11 @@ esp_err_t esp_enable_extern_coex_gpio_pin(external_coex_wire_t wire_type, esp_ex return ESP_FAIL; } } -#endif /* SOC_EXTERNAL_COEX_ADVANCE */ +#else return ESP_ERR_INVALID_ARG; +#endif /* SOC_EXTERNAL_COEX_ADVANCE */ } - int ret = esp_coex_external_set(EXTERN_COEX_PTI_MID, EXTERN_COEX_PTI_MID, EXTERN_COEX_PTI_HIGH); + esp_err_t ret = esp_coex_external_set(EXTERN_COEX_PTI_MID, EXTERN_COEX_PTI_MID, EXTERN_COEX_PTI_HIGH); if (ESP_OK != ret) { return ESP_FAIL; } diff --git a/components/esp_wifi/lib b/components/esp_wifi/lib index fd77ffcf8e56..82dd9020a46f 160000 --- a/components/esp_wifi/lib +++ b/components/esp_wifi/lib @@ -1 +1 @@ -Subproject commit fd77ffcf8e56ad5c9ea85d635f40ce63134101b0 +Subproject commit 82dd9020a46f8603c60c33e5af87a80a256f4f8f diff --git a/examples/wifi/iperf/main/cmd_wifi.c b/examples/wifi/iperf/main/cmd_wifi.c index 9a876a22d55e..b85010b33779 100644 --- a/examples/wifi/iperf/main/cmd_wifi.c +++ b/examples/wifi/iperf/main/cmd_wifi.c @@ -172,21 +172,21 @@ void initialise_wifi(void) ESP_ERROR_CHECK(esp_wifi_start() ); #if CONFIG_EXTERNAL_COEX_ENABLE -#if SOC_EXTERNAL_COEX_ADVANCE - uint32_t request = 1; - uint32_t priority = 2; - uint32_t grant = 3; - ESP_ERROR_CHECK(esp_external_coex_leader_role_set_gpio_pin(EXTERN_COEX_WIRE_3, request, priority, grant)); -#else esp_external_coex_gpio_set_t gpio_pin; gpio_pin.request = 1; gpio_pin.priority = 2; gpio_pin.grant = 3; +#if SOC_EXTERNAL_COEX_LEADER_TX_LINE gpio_pin.tx_line = 4; +#endif + esp_external_coex_set_work_mode(EXTERNAL_COEX_LEADER_ROLE); +#if SOC_EXTERNAL_COEX_LEADER_TX_LINE ESP_ERROR_CHECK(esp_enable_extern_coex_gpio_pin(EXTERN_COEX_WIRE_4, gpio_pin)); -#endif -#endif +#else + ESP_ERROR_CHECK(esp_enable_extern_coex_gpio_pin(EXTERN_COEX_WIRE_3, gpio_pin)); +#endif /* SOC_EXTERNAL_COEX_LEADER_TX_LINE */ +#endif /* CONFIG_EXTERNAL_COEX_ENABLE */ #if CONFIG_ESP_WIFI_ENABLE_WIFI_RX_STATS #if CONFIG_ESP_WIFI_ENABLE_WIFI_RX_MU_STATS