diff --git a/components/driver/gpio/gpio.c b/components/driver/gpio/gpio.c index b6f4324607ed..e1d81a2b3e24 100644 --- a/components/driver/gpio/gpio.c +++ b/components/driver/gpio/gpio.c @@ -22,6 +22,7 @@ #include "esp_check.h" #include "hal/gpio_hal.h" #include "esp_rom_gpio.h" +#include "esp_private/esp_gpio_reserve.h" #if (SOC_RTCIO_PIN_COUNT > 0) #include "hal/rtc_io_hal.h" @@ -1006,3 +1007,45 @@ esp_err_t gpio_deep_sleep_wakeup_disable(gpio_num_t gpio_num) return ESP_OK; } #endif // SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP + +esp_err_t gpio_dump_io_configuration(FILE *out_stream, uint64_t io_bit_mask) +{ + ESP_RETURN_ON_FALSE(out_stream, ESP_ERR_INVALID_ARG, GPIO_TAG, "out_stream error"); + ESP_RETURN_ON_FALSE(!(io_bit_mask & ~SOC_GPIO_VALID_GPIO_MASK), ESP_ERR_INVALID_ARG, GPIO_TAG, "io_bit_mask error"); + + fprintf(out_stream, "================IO DUMP Start================\n"); + while (io_bit_mask) { + uint32_t gpio_num = __builtin_ffsll(io_bit_mask) - 1; + io_bit_mask &= ~(1ULL << gpio_num); + + bool pu, pd, ie, oe, od, slp_sel; + uint32_t drv, fun_sel, sig_out; + gpio_hal_get_io_config(gpio_context.gpio_hal, gpio_num, &pu, &pd, &ie, &oe, &od, &drv, &fun_sel, &sig_out, &slp_sel); + + fprintf(out_stream, "IO[%"PRIu32"]%s -\n", gpio_num, esp_gpio_is_pin_reserved(gpio_num) ? " **RESERVED**" : ""); + fprintf(out_stream, " Pullup: %d, Pulldown: %d, DriveCap: %"PRIu32"\n", pu, pd, drv); + fprintf(out_stream, " InputEn: %d, OutputEn: %d, OpenDrain: %d\n", ie, oe, od); + fprintf(out_stream, " FuncSel: %"PRIu32" (%s)\n", fun_sel, (fun_sel == PIN_FUNC_GPIO) ? "GPIO" : "IOMUX"); + if (oe && fun_sel == PIN_FUNC_GPIO) { + fprintf(out_stream, " GPIO Matrix SigOut ID: %"PRIu32"%s\n", sig_out, (sig_out == SIG_GPIO_OUT_IDX) ? " (simple GPIO output)" : ""); + } + if (ie && fun_sel == PIN_FUNC_GPIO) { + uint32_t cnt = 0; + fprintf(out_stream, " GPIO Matrix SigIn ID:"); + for (int i = 0; i < SIG_GPIO_OUT_IDX; i++) { + if (gpio_hal_get_in_signal_connected_io(gpio_context.gpio_hal, i) == gpio_num) { + cnt++; + fprintf(out_stream, " %d", i); + } + } + if (cnt == 0) { + fprintf(out_stream, " (simple GPIO input)"); + } + fprintf(out_stream, "\n"); + } + fprintf(out_stream, " SleepSelEn: %d\n", slp_sel); + fprintf(out_stream, "\n"); + } + fprintf(out_stream, "=================IO DUMP End==================\n"); + return ESP_OK; +} diff --git a/components/driver/gpio/include/driver/gpio.h b/components/driver/gpio/include/driver/gpio.h index cc8cf8c9f5b0..8abe78b709de 100644 --- a/components/driver/gpio/include/driver/gpio.h +++ b/components/driver/gpio/include/driver/gpio.h @@ -1,11 +1,12 @@ /* - * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ #pragma once +#include #include #include "sdkconfig.h" #include "esp_err.h" @@ -543,7 +544,19 @@ esp_err_t gpio_deep_sleep_wakeup_enable(gpio_num_t gpio_num, gpio_int_type_t int */ esp_err_t gpio_deep_sleep_wakeup_disable(gpio_num_t gpio_num); -#endif +#endif //SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP + +/** + * @brief Dump IO configuration information to console + * + * @param out_stream IO stream (e.g. stdout) + * @param io_bit_mask IO pin bit mask, each bit maps to an IO + * + * @return + * - ESP_OK Success + * - ESP_ERR_INVALID_ARG Parameter error + */ +esp_err_t gpio_dump_io_configuration(FILE *out_stream, uint64_t io_bit_mask); #ifdef __cplusplus } diff --git a/components/hal/esp32/include/hal/gpio_ll.h b/components/hal/esp32/include/hal/gpio_ll.h index 6c15657aa2bc..19aea3160961 100644 --- a/components/hal/esp32/include/hal/gpio_ll.h +++ b/components/hal/esp32/include/hal/gpio_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -39,6 +39,39 @@ extern const uint8_t GPIO_PIN_MUX_REG_OFFSET[SOC_GPIO_PIN_COUNT]; #define GPIO_LL_PRO_CPU_NMI_INTR_ENA (BIT(3)) #define GPIO_LL_SDIO_EXT_INTR_ENA (BIT(4)) +/** + * @brief Get the configuration for an IO + * + * @param hw Peripheral GPIO hardware instance address. + * @param gpio_num GPIO number + * @param pu Pull-up enabled or not + * @param pd Pull-down enabled or not + * @param ie Input enabled or not + * @param oe Output enabled or not + * @param od Open-drain enabled or not + * @param drv Drive strength value + * @param fun_sel IOMUX function selection value + * @param sig_out Outputting peripheral signal index + * @param slp_sel Pin sleep mode enabled or not + */ +static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num, + bool *pu, bool *pd, bool *ie, bool *oe, bool *od, uint32_t *drv, + uint32_t *fun_sel, uint32_t *sig_out, bool *slp_sel) +{ + uint32_t bit_shift = (gpio_num < 32) ? gpio_num : (gpio_num - 32); + uint32_t bit_mask = 1 << bit_shift; + uint32_t iomux_reg_val = REG_READ(GPIO_PIN_MUX_REG[gpio_num]); + *pu = (iomux_reg_val & FUN_PU_M) >> FUN_PU_S; + *pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S; + *ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S; + *oe = (((gpio_num < 32) ? hw->enable : hw->enable1.val) & bit_mask) >> bit_shift; + *od = hw->pin[gpio_num].pad_driver; + *drv = (iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S; + *fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S; + *sig_out = hw->func_out_sel_cfg[gpio_num].func_sel; + *slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S; +} + /** * @brief Enable pull-up on GPIO. * @@ -669,6 +702,23 @@ static inline void gpio_ll_iomux_out(gpio_dev_t *hw, uint8_t gpio_num, int func, gpio_ll_func_sel(hw, gpio_num, func); } +/** + * @brief Get the GPIO number that is routed to the input peripheral signal through GPIO matrix. + * + * @param hw Peripheral GPIO hardware instance address. + * @param in_sig_idx Peripheral signal index (tagged as input attribute). + * + * @return + * - -1 Signal bypassed GPIO matrix + * - Others GPIO number + */ +static inline int gpio_ll_get_in_signal_connected_io(gpio_dev_t *hw, uint32_t in_sig_idx) +{ + typeof(hw->func_in_sel_cfg[in_sig_idx]) reg; + reg.val = hw->func_in_sel_cfg[in_sig_idx].val; + return (reg.sig_in_sel ? reg.func_sel : -1); +} + #ifdef __cplusplus } #endif diff --git a/components/hal/esp32c2/include/hal/gpio_ll.h b/components/hal/esp32c2/include/hal/gpio_ll.h index c38ce4724176..8b3b420d0ab2 100644 --- a/components/hal/esp32c2/include/hal/gpio_ll.h +++ b/components/hal/esp32c2/include/hal/gpio_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -31,6 +31,39 @@ extern "C" { #define GPIO_LL_PRO_CPU_INTR_ENA (BIT(0)) #define GPIO_LL_PRO_CPU_NMI_INTR_ENA (BIT(1)) + +/** + * @brief Get the configuration for an IO + * + * @param hw Peripheral GPIO hardware instance address. + * @param gpio_num GPIO number + * @param pu Pull-up enabled or not + * @param pd Pull-down enabled or not + * @param ie Input enabled or not + * @param oe Output enabled or not + * @param od Open-drain enabled or not + * @param drv Drive strength value + * @param fun_sel IOMUX function selection value + * @param sig_out Outputting peripheral signal index + * @param slp_sel Pin sleep mode enabled or not + */ +static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num, + bool *pu, bool *pd, bool *ie, bool *oe, bool *od, uint32_t *drv, + uint32_t *fun_sel, uint32_t *sig_out, bool *slp_sel) +{ + uint32_t bit_mask = 1 << gpio_num; + uint32_t iomux_reg_val = REG_READ(GPIO_PIN_MUX_REG[gpio_num]); + *pu = (iomux_reg_val & FUN_PU_M) >> FUN_PU_S; + *pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S; + *ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S; + *oe = (hw->enable.val & bit_mask) >> gpio_num; + *od = hw->pin[gpio_num].pad_driver; + *drv = (iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S; + *fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S; + *sig_out = hw->func_out_sel_cfg[gpio_num].func_sel; + *slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S; +} + /** * @brief Enable pull-up on GPIO. * @@ -475,6 +508,23 @@ static inline void gpio_ll_iomux_out(gpio_dev_t *hw, uint8_t gpio_num, int func, gpio_ll_func_sel(hw, gpio_num, func); } +/** + * @brief Get the GPIO number that is routed to the input peripheral signal through GPIO matrix. + * + * @param hw Peripheral GPIO hardware instance address. + * @param in_sig_idx Peripheral signal index (tagged as input attribute). + * + * @return + * - -1 Signal bypassed GPIO matrix + * - Others GPIO number + */ +static inline int gpio_ll_get_in_signal_connected_io(gpio_dev_t *hw, uint32_t in_sig_idx) +{ + gpio_func_in_sel_cfg_reg_t reg; + reg.val = hw->func_in_sel_cfg[in_sig_idx].val; + return (reg.sig_in_sel ? reg.func_sel : -1); +} + /** * @brief Force hold all digital(VDD3P3_CPU) and rtc(VDD3P3_RTC) gpio pads. * @note GPIO force hold, whether the chip in sleep mode or wakeup mode. diff --git a/components/hal/esp32c3/include/hal/gpio_ll.h b/components/hal/esp32c3/include/hal/gpio_ll.h index 1bc8655cebbc..1c9a285e5291 100644 --- a/components/hal/esp32c3/include/hal/gpio_ll.h +++ b/components/hal/esp32c3/include/hal/gpio_ll.h @@ -33,6 +33,39 @@ extern "C" { #define GPIO_LL_PRO_CPU_INTR_ENA (BIT(0)) #define GPIO_LL_PRO_CPU_NMI_INTR_ENA (BIT(1)) + +/** + * @brief Get the configuration for an IO + * + * @param hw Peripheral GPIO hardware instance address. + * @param gpio_num GPIO number + * @param pu Pull-up enabled or not + * @param pd Pull-down enabled or not + * @param ie Input enabled or not + * @param oe Output enabled or not + * @param od Open-drain enabled or not + * @param drv Drive strength value + * @param fun_sel IOMUX function selection value + * @param sig_out Outputting peripheral signal index + * @param slp_sel Pin sleep mode enabled or not + */ +static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num, + bool *pu, bool *pd, bool *ie, bool *oe, bool *od, uint32_t *drv, + uint32_t *fun_sel, uint32_t *sig_out, bool *slp_sel) +{ + uint32_t bit_mask = 1 << gpio_num; + uint32_t iomux_reg_val = REG_READ(GPIO_PIN_MUX_REG[gpio_num]); + *pu = (iomux_reg_val & FUN_PU_M) >> FUN_PU_S; + *pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S; + *ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S; + *oe = (hw->enable.val & bit_mask) >> gpio_num; + *od = hw->pin[gpio_num].pad_driver; + *drv = (iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S; + *fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S; + *sig_out = hw->func_out_sel_cfg[gpio_num].func_sel; + *slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S; +} + /** * @brief Enable pull-up on GPIO. * @@ -491,6 +524,23 @@ static inline void gpio_ll_iomux_out(gpio_dev_t *hw, uint8_t gpio_num, int func, gpio_ll_func_sel(hw, gpio_num, func); } +/** + * @brief Get the GPIO number that is routed to the input peripheral signal through GPIO matrix. + * + * @param hw Peripheral GPIO hardware instance address. + * @param in_sig_idx Peripheral signal index (tagged as input attribute). + * + * @return + * - -1 Signal bypassed GPIO matrix + * - Others GPIO number + */ +static inline int gpio_ll_get_in_signal_connected_io(gpio_dev_t *hw, uint32_t in_sig_idx) +{ + typeof(hw->func_in_sel_cfg[in_sig_idx]) reg; + reg.val = hw->func_in_sel_cfg[in_sig_idx].val; + return (reg.sig_in_sel ? reg.func_sel : -1); +} + /** * @brief Force hold all digital(VDD3P3_CPU) and rtc(VDD3P3_RTC) gpio pads. * @note GPIO force hold, whether the chip in sleep mode or wakeup mode. diff --git a/components/hal/esp32c6/include/hal/gpio_ll.h b/components/hal/esp32c6/include/hal/gpio_ll.h index 827dc43aa2d9..52939fbee753 100644 --- a/components/hal/esp32c6/include/hal/gpio_ll.h +++ b/components/hal/esp32c6/include/hal/gpio_ll.h @@ -38,6 +38,39 @@ extern "C" { #define GPIO_LL_PRO_CPU_INTR_ENA (BIT(0)) #define GPIO_LL_PRO_CPU_NMI_INTR_ENA (BIT(1)) + +/** + * @brief Get the configuration for an IO + * + * @param hw Peripheral GPIO hardware instance address. + * @param gpio_num GPIO number + * @param pu Pull-up enabled or not + * @param pd Pull-down enabled or not + * @param ie Input enabled or not + * @param oe Output enabled or not + * @param od Open-drain enabled or not + * @param drv Drive strength value + * @param fun_sel IOMUX function selection value + * @param sig_out Outputting peripheral signal index + * @param slp_sel Pin sleep mode enabled or not + */ +static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num, + bool *pu, bool *pd, bool *ie, bool *oe, bool *od, uint32_t *drv, + uint32_t *fun_sel, uint32_t *sig_out, bool *slp_sel) +{ + uint32_t bit_mask = 1 << gpio_num; + uint32_t iomux_reg_val = REG_READ(GPIO_PIN_MUX_REG[gpio_num]); + *pu = (iomux_reg_val & FUN_PU_M) >> FUN_PU_S; + *pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S; + *ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S; + *oe = (hw->enable.val & bit_mask) >> gpio_num; + *od = hw->pin[gpio_num].pad_driver; + *drv = (iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S; + *fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S; + *sig_out = hw->func_out_sel_cfg[gpio_num].out_sel; + *slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S; +} + /** * @brief Enable pull-up on GPIO. * @@ -478,6 +511,23 @@ static inline void gpio_ll_iomux_set_clk_src(soc_module_clk_t src) } } +/** + * @brief Get the GPIO number that is routed to the input peripheral signal through GPIO matrix. + * + * @param hw Peripheral GPIO hardware instance address. + * @param in_sig_idx Peripheral signal index (tagged as input attribute). + * + * @return + * - -1 Signal bypassed GPIO matrix + * - Others GPIO number + */ +static inline int gpio_ll_get_in_signal_connected_io(gpio_dev_t *hw, uint32_t in_sig_idx) +{ + gpio_func_in_sel_cfg_reg_t reg; + reg.val = hw->func_in_sel_cfg[in_sig_idx].val; + return (reg.sig_in_sel ? reg.in_sel : -1); +} + /** * @brief Force hold digital io pad. * @note GPIO force hold, whether the chip in sleep mode or wakeup mode. diff --git a/components/hal/esp32h2/include/hal/gpio_ll.h b/components/hal/esp32h2/include/hal/gpio_ll.h index 2aeb5ce22b49..cc4c933a4d55 100644 --- a/components/hal/esp32h2/include/hal/gpio_ll.h +++ b/components/hal/esp32h2/include/hal/gpio_ll.h @@ -37,6 +37,39 @@ extern "C" { #define GPIO_LL_PRO_CPU_INTR_ENA (BIT(0)) #define GPIO_LL_PRO_CPU_NMI_INTR_ENA (BIT(1)) + +/** + * @brief Get the configuration for an IO + * + * @param hw Peripheral GPIO hardware instance address. + * @param gpio_num GPIO number + * @param pu Pull-up enabled or not + * @param pd Pull-down enabled or not + * @param ie Input enabled or not + * @param oe Output enabled or not + * @param od Open-drain enabled or not + * @param drv Drive strength value + * @param fun_sel IOMUX function selection value + * @param sig_out Outputting peripheral signal index + * @param slp_sel Pin sleep mode enabled or not + */ +static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num, + bool *pu, bool *pd, bool *ie, bool *oe, bool *od, uint32_t *drv, + uint32_t *fun_sel, uint32_t *sig_out, bool *slp_sel) +{ + uint32_t bit_mask = 1 << gpio_num; + uint32_t iomux_reg_val = REG_READ(GPIO_PIN_MUX_REG[gpio_num]); + *pu = (iomux_reg_val & FUN_PU_M) >> FUN_PU_S; + *pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S; + *ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S; + *oe = (hw->enable.val & bit_mask) >> gpio_num; + *od = hw->pin[gpio_num].pad_driver; + *drv = (iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S; + *fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S; + *sig_out = hw->func_out_sel_cfg[gpio_num].out_sel; + *slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S; +} + /** * @brief Enable pull-up on GPIO. * @@ -521,6 +554,23 @@ static inline void gpio_ll_iomux_set_clk_src(soc_module_clk_t src) } } +/** + * @brief Get the GPIO number that is routed to the input peripheral signal through GPIO matrix. + * + * @param hw Peripheral GPIO hardware instance address. + * @param in_sig_idx Peripheral signal index (tagged as input attribute). + * + * @return + * - -1 Signal bypassed GPIO matrix + * - Others GPIO number + */ +static inline int gpio_ll_get_in_signal_connected_io(gpio_dev_t *hw, uint32_t in_sig_idx) +{ + gpio_func_in_sel_cfg_reg_t reg; + reg.val = hw->func_in_sel_cfg[in_sig_idx].val; + return (reg.sig_in_sel ? reg.in_sel : -1); +} + /** * @brief Force hold all digital(VDDPST2) and lp(VDDPST1) io pads. * @note GPIO force hold, whether the chip in sleep mode or wakeup mode. diff --git a/components/hal/esp32p4/include/hal/gpio_ll.h b/components/hal/esp32p4/include/hal/gpio_ll.h index 61e241428060..39d9eb770ce5 100644 --- a/components/hal/esp32p4/include/hal/gpio_ll.h +++ b/components/hal/esp32p4/include/hal/gpio_ll.h @@ -43,6 +43,39 @@ extern "C" { // #define GPIO_LL_INTR2_ENA (BIT(2)) // #define GPIO_LL_INTR3_ENA (BIT(3)) +/** + * @brief Get the configuration for an IO + * + * @param hw Peripheral GPIO hardware instance address. + * @param gpio_num GPIO number + * @param pu Pull-up enabled or not + * @param pd Pull-down enabled or not + * @param ie Input enabled or not + * @param oe Output enabled or not + * @param od Open-drain enabled or not + * @param drv Drive strength value + * @param fun_sel IOMUX function selection value + * @param sig_out Outputting peripheral signal index + * @param slp_sel Pin sleep mode enabled or not + */ +static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num, + bool *pu, bool *pd, bool *ie, bool *oe, bool *od, uint32_t *drv, + uint32_t *fun_sel, uint32_t *sig_out, bool *slp_sel) +{ + uint32_t bit_shift = (gpio_num < 32) ? gpio_num : (gpio_num - 32); + uint32_t bit_mask = 1 << bit_shift; + uint32_t iomux_reg_val = REG_READ(GPIO_PIN_MUX_REG[gpio_num]); + *pu = (iomux_reg_val & FUN_PU_M) >> FUN_PU_S; + *pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S; + *ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S; + *oe = (((gpio_num < 32) ? hw->enable.val : hw->enable1.val) & bit_mask) >> bit_shift; + *od = hw->pin[gpio_num].pad_driver; + *drv = (iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S; + *fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S; + *sig_out = hw->func_out_sel_cfg[gpio_num].out_sel; + *slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S; +} + /** * @brief Enable pull-up on GPIO. * @@ -607,6 +640,23 @@ static inline void gpio_ll_iomux_set_clk_src(soc_module_clk_t src) /// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance #define gpio_ll_iomux_set_clk_src(...) (void)__DECLARE_RCC_ATOMIC_ENV; gpio_ll_iomux_set_clk_src(__VA_ARGS__) +/** + * @brief Get the GPIO number that is routed to the input peripheral signal through GPIO matrix. + * + * @param hw Peripheral GPIO hardware instance address. + * @param in_sig_idx Peripheral signal index (tagged as input attribute). + * + * @return + * - -1 Signal bypassed GPIO matrix + * - Others GPIO number + */ +static inline int gpio_ll_get_in_signal_connected_io(gpio_dev_t *hw, uint32_t in_sig_idx) +{ + gpio_func_in_sel_cfg_reg_t reg; + reg.val = hw->func_in_sel_cfg[in_sig_idx].val; + return (reg.sig_in_sel ? reg.in_sel : -1); +} + /** * @brief Force hold digital io pad. * @note GPIO force hold, whether the chip in sleep mode or wakeup mode. diff --git a/components/hal/esp32p4/include/hal/rtc_io_ll.h b/components/hal/esp32p4/include/hal/rtc_io_ll.h index 5d448c145bb5..197fb0c2de86 100644 --- a/components/hal/esp32p4/include/hal/rtc_io_ll.h +++ b/components/hal/esp32p4/include/hal/rtc_io_ll.h @@ -56,7 +56,7 @@ static inline void rtcio_ll_matrix_in(int rtcio_num, uint32_t signal_idx, bool i lp_gpio_func_in_sel_cfg_reg_t reg; reg.func_in_sel = rtcio_num; reg.in_inv_sel = inv; - reg.sig_in_sel = 1; // Bypass LP_GPIO + reg.sig_in_sel = 1; // Signal should not bypass LP_GPIO matrix LP_GPIO.func_in_sel_cfg[signal_idx].val = reg.val; } diff --git a/components/hal/esp32s2/include/hal/gpio_ll.h b/components/hal/esp32s2/include/hal/gpio_ll.h index 83bf6479f304..9b1544733ab6 100644 --- a/components/hal/esp32s2/include/hal/gpio_ll.h +++ b/components/hal/esp32s2/include/hal/gpio_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -33,6 +33,39 @@ extern "C" { #define GPIO_LL_PRO_CPU_INTR_ENA (BIT(0)) #define GPIO_LL_PRO_CPU_NMI_INTR_ENA (BIT(1)) +/** + * @brief Get the configuration for an IO + * + * @param hw Peripheral GPIO hardware instance address. + * @param gpio_num GPIO number + * @param pu Pull-up enabled or not + * @param pd Pull-down enabled or not + * @param ie Input enabled or not + * @param oe Output enabled or not + * @param od Open-drain enabled or not + * @param drv Drive strength value + * @param fun_sel IOMUX function selection value + * @param sig_out Outputting peripheral signal index + * @param slp_sel Pin sleep mode enabled or not + */ +static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num, + bool *pu, bool *pd, bool *ie, bool *oe, bool *od, uint32_t *drv, + uint32_t *fun_sel, uint32_t *sig_out, bool *slp_sel) +{ + uint32_t bit_shift = (gpio_num < 32) ? gpio_num : (gpio_num - 32); + uint32_t bit_mask = 1 << bit_shift; + uint32_t iomux_reg_val = REG_READ(GPIO_PIN_MUX_REG[gpio_num]); + *pu = (iomux_reg_val & FUN_PU_M) >> FUN_PU_S; + *pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S; + *ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S; + *oe = (((gpio_num < 32) ? hw->enable : hw->enable1.val) & bit_mask) >> bit_shift; + *od = hw->pin[gpio_num].pad_driver; + *drv = (iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S; + *fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S; + *sig_out = hw->func_out_sel_cfg[gpio_num].func_sel; + *slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S; +} + /** * @brief Enable pull-up on GPIO. * @@ -490,6 +523,23 @@ static inline void gpio_ll_iomux_out(gpio_dev_t *hw, uint8_t gpio_num, int func, gpio_ll_func_sel(hw, gpio_num, func); } +/** + * @brief Get the GPIO number that is routed to the input peripheral signal through GPIO matrix. + * + * @param hw Peripheral GPIO hardware instance address. + * @param in_sig_idx Peripheral signal index (tagged as input attribute). + * + * @return + * - -1 Signal bypassed GPIO matrix + * - Others GPIO number + */ +static inline int gpio_ll_get_in_signal_connected_io(gpio_dev_t *hw, uint32_t in_sig_idx) +{ + typeof(hw->func_in_sel_cfg[in_sig_idx]) reg; + reg.val = hw->func_in_sel_cfg[in_sig_idx].val; + return (reg.sig_in_sel ? reg.func_sel : -1); +} + /** * @brief Force hold digital gpio pad. * @note GPIO force hold, whether the chip in sleep mode or wakeup mode. diff --git a/components/hal/esp32s3/include/hal/gpio_ll.h b/components/hal/esp32s3/include/hal/gpio_ll.h index 1cdeb2db4cc8..d86188c98414 100644 --- a/components/hal/esp32s3/include/hal/gpio_ll.h +++ b/components/hal/esp32s3/include/hal/gpio_ll.h @@ -34,6 +34,39 @@ extern "C" { #define GPIO_LL_INTR_ENA (BIT(0)) #define GPIO_LL_NMI_INTR_ENA (BIT(1)) +/** + * @brief Get the configuration for an IO + * + * @param hw Peripheral GPIO hardware instance address. + * @param gpio_num GPIO number + * @param pu Pull-up enabled or not + * @param pd Pull-down enabled or not + * @param ie Input enabled or not + * @param oe Output enabled or not + * @param od Open-drain enabled or not + * @param drv Drive strength value + * @param fun_sel IOMUX function selection value + * @param sig_out Outputting peripheral signal index + * @param slp_sel Pin sleep mode enabled or not + */ +static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num, + bool *pu, bool *pd, bool *ie, bool *oe, bool *od, uint32_t *drv, + uint32_t *fun_sel, uint32_t *sig_out, bool *slp_sel) +{ + uint32_t bit_shift = (gpio_num < 32) ? gpio_num : (gpio_num - 32); + uint32_t bit_mask = 1 << bit_shift; + uint32_t iomux_reg_val = REG_READ(GPIO_PIN_MUX_REG[gpio_num]); + *pu = (iomux_reg_val & FUN_PU_M) >> FUN_PU_S; + *pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S; + *ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S; + *oe = (((gpio_num < 32) ? hw->enable : hw->enable1.val) & bit_mask) >> bit_shift; + *od = hw->pin[gpio_num].pad_driver; + *drv = (iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S; + *fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S; + *sig_out = hw->func_out_sel_cfg[gpio_num].func_sel; + *slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S; +} + /** * @brief Enable pull-up on GPIO. * @@ -509,6 +542,23 @@ static inline void gpio_ll_iomux_out(gpio_dev_t *hw, uint8_t gpio_num, int func, gpio_ll_func_sel(hw, gpio_num, func); } +/** + * @brief Get the GPIO number that is routed to the input peripheral signal through GPIO matrix. + * + * @param hw Peripheral GPIO hardware instance address. + * @param in_sig_idx Peripheral signal index (tagged as input attribute). + * + * @return + * - -1 Signal bypassed GPIO matrix + * - Others GPIO number + */ +static inline int gpio_ll_get_in_signal_connected_io(gpio_dev_t *hw, uint32_t in_sig_idx) +{ + typeof(hw->func_in_sel_cfg[in_sig_idx]) reg; + reg.val = hw->func_in_sel_cfg[in_sig_idx].val; + return (reg.sig_in_sel ? reg.func_sel : -1); +} + /** * @brief Force hold digital gpio pad. * @note GPIO force hold, whether the chip in sleep mode or wakeup mode. diff --git a/components/hal/include/hal/gpio_hal.h b/components/hal/include/hal/gpio_hal.h index 3b624374e42b..11a15a71da1b 100644 --- a/components/hal/include/hal/gpio_hal.h +++ b/components/hal/include/hal/gpio_hal.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -32,9 +32,26 @@ extern "C" { typedef struct { gpio_dev_t *dev; - uint32_t version; } gpio_hal_context_t; +/** + * @brief Get the configuration for an IO + * + * @param hal Context of the HAL layer + * @param gpio_num GPIO number + * @param pu Pointer to accept the status of pull-up enabled or not + * @param pd Pointer to accept the status of pull-down enabled or not + * @param ie Pointer to accept the status of input enabled or not + * @param oe Pointer to accept the status of output enabled or not + * @param od Pointer to accept the status of open-drain enabled or not + * @param drv Pointer to accept the value of drive strength + * @param fun_sel Pointer to accept the value of IOMUX function selection + * @param sig_out Pointer to accept the index of outputting peripheral signal + * @param slp_sel Pointer to accept the status of pin sleep mode enabled or not + */ +#define gpio_hal_get_io_config(hal, gpio_num, pu, pd, ie, oe, od, drv, fun_sel, sig_out, slp_sel) \ + gpio_ll_get_io_config((hal)->dev, gpio_num, pu, pd, ie, oe, od, drv, fun_sel, sig_out, slp_sel) + /** * @brief Enable pull-up on GPIO. * @@ -171,12 +188,24 @@ void gpio_hal_intr_disable(gpio_hal_context_t *hal, uint32_t gpio_num); /** * @brief Select a function for the pin in the IOMUX * - * @param hw Peripheral GPIO hardware instance address. + * @param hal Context of the HAL layer * @param gpio_num GPIO number * @param func Function to assign to the pin */ #define gpio_hal_func_sel(hal, gpio_num, func) gpio_ll_func_sel((hal)->dev, gpio_num, func) +/** + * @brief Get the GPIO number that is routed to the input peripheral signal through GPIO matrix + * + * @param hal Context of the HAL layer + * @param in_sig_idx Peripheral signal index (tagged as input attribute) + * + * @return + * - -1 Signal bypassed GPIO matrix + * - Others GPIO number + */ +#define gpio_hal_get_in_signal_connected_io(hal, in_sig_idx) gpio_ll_get_in_signal_connected_io((hal)->dev, in_sig_idx) + /** * @brief GPIO set output level * diff --git a/components/soc/esp32c6/include/soc/gpio_struct.h b/components/soc/esp32c6/include/soc/gpio_struct.h index ed3e224ca91a..68a44048dc46 100644 --- a/components/soc/esp32c6/include/soc/gpio_struct.h +++ b/components/soc/esp32c6/include/soc/gpio_struct.h @@ -589,8 +589,8 @@ typedef struct gpio_dev_t { uint32_t reserved_100[19]; volatile gpio_status_next_reg_t status_next; volatile gpio_status_next1_reg_t status_next1; - volatile gpio_func_in_sel_cfg_reg_t func_in_sel_cfg[125]; - uint32_t reserved_348[131]; + volatile gpio_func_in_sel_cfg_reg_t func_in_sel_cfg[128]; + uint32_t reserved_34b[128]; volatile gpio_func_out_sel_cfg_reg_t func_out_sel_cfg[35]; uint32_t reserved_5e0[19]; volatile gpio_clock_gate_reg_t clock_gate; diff --git a/components/soc/esp32h2/include/soc/gpio_struct.h b/components/soc/esp32h2/include/soc/gpio_struct.h index f1e8327deb59..dd5cd23ba5c1 100644 --- a/components/soc/esp32h2/include/soc/gpio_struct.h +++ b/components/soc/esp32h2/include/soc/gpio_struct.h @@ -385,8 +385,8 @@ typedef struct { uint32_t reserved_0f4[22]; volatile gpio_status_next_reg_t status_next; uint32_t reserved_150; - volatile gpio_func_in_sel_cfg_reg_t func_in_sel_cfg[125]; - uint32_t reserved_348[131]; + volatile gpio_func_in_sel_cfg_reg_t func_in_sel_cfg[128]; + uint32_t reserved_34b[128]; volatile gpio_func_out_sel_cfg_reg_t func_out_sel_cfg[32]; uint32_t reserved_5d4[22]; volatile gpio_clock_gate_reg_t clock_gate; diff --git a/docs/doxygen/Doxyfile b/docs/doxygen/Doxyfile index 6fa689b992dd..7f02fa0f7932 100644 --- a/docs/doxygen/Doxyfile +++ b/docs/doxygen/Doxyfile @@ -83,6 +83,7 @@ INPUT = \ $(PROJECT_PATH)/components/driver/gpio/include/driver/gpio.h \ $(PROJECT_PATH)/components/driver/gpio/include/driver/gpio_etm.h \ $(PROJECT_PATH)/components/driver/gpio/include/driver/gpio_filter.h \ + $(PROJECT_PATH)/components/driver/gpio/include/driver/lp_io.h \ $(PROJECT_PATH)/components/driver/gpio/include/driver/rtc_io.h \ $(PROJECT_PATH)/components/driver/gptimer/include/driver/gptimer.h \ $(PROJECT_PATH)/components/driver/gptimer/include/driver/gptimer_etm.h \ diff --git a/docs/en/api-reference/peripherals/gpio.rst b/docs/en/api-reference/peripherals/gpio.rst index 78e52ebc10a8..a7622fc908a5 100644 --- a/docs/en/api-reference/peripherals/gpio.rst +++ b/docs/en/api-reference/peripherals/gpio.rst @@ -10,6 +10,34 @@ GPIO Summary :start-after: gpio-summary :end-before: --- +GPIO driver offers a dump function :cpp:func:`gpio_dump_io_configuration` to show the configurations of the IOs at the moment, such as pull-up / pull-down, input / output enable, pin mapping etc. Below is an example dump: + +:: + + ================IO DUMP Start================ + IO[4] - + Pullup: 1, Pulldown: 0, DriveCap: 2 + InputEn: 1, OutputEn: 0, OpenDrain: 0 + FuncSel: 1 (GPIO) + GPIO Matrix SigIn ID: (simple GPIO input) + SleepSelEn: 1 + + IO[18] - + Pullup: 0, Pulldown: 0, DriveCap: 2 + InputEn: 0, OutputEn: 1, OpenDrain: 0 + FuncSel: 1 (GPIO) + GPIO Matrix SigOut ID: 256 (simple GPIO output) + SleepSelEn: 1 + + IO[26] **RESERVED** - + Pullup: 1, Pulldown: 0, DriveCap: 2 + InputEn: 1, OutputEn: 0, OpenDrain: 0 + FuncSel: 0 (IOMUX) + SleepSelEn: 1 + + =================IO DUMP End================== + +If an IO pin is routed to a peripheral signal through the GPIO matrix, the signal ID printed in the dump information is defined in the ``soc/gpio_sig_map.h`` file. The word ``**RESERVED**`` indicates the IO is occupied by either FLASH or PSRAM. It is strongly not recommended to reconfigure them for other application purposes. .. only:: SOC_RTCIO_INPUT_OUTPUT_SUPPORTED @@ -96,6 +124,7 @@ API Reference - Normal GPIO ------------------------ .. include-build-file:: inc/rtc_io.inc + .. include-build-file:: inc/lp_io.inc .. include-build-file:: inc/rtc_io_types.inc .. only:: SOC_GPIO_SUPPORT_PIN_GLITCH_FILTER or SOC_GPIO_FLEX_GLITCH_FILTER_NUM diff --git a/docs/zh_CN/api-reference/peripherals/gpio.rst b/docs/zh_CN/api-reference/peripherals/gpio.rst index a30c91625ee1..0cf85c43c6ac 100644 --- a/docs/zh_CN/api-reference/peripherals/gpio.rst +++ b/docs/zh_CN/api-reference/peripherals/gpio.rst @@ -10,6 +10,34 @@ GPIO 汇总 :start-after: gpio-summary :end-before: --- +GPIO 驱动提供了一个函数 :cpp:func:`gpio_dump_io_configuration` 用来输出指定管脚的实时配置状态，包括上下拉、输入输出使能、管脚映射等。输出示例如下： + +:: + + ================IO DUMP Start================ + IO[4] - + Pullup: 1, Pulldown: 0, DriveCap: 2 + InputEn: 1, OutputEn: 0, OpenDrain: 0 + FuncSel: 1 (GPIO) + GPIO Matrix SigIn ID: (simple GPIO input) + SleepSelEn: 1 + + IO[18] - + Pullup: 0, Pulldown: 0, DriveCap: 2 + InputEn: 0, OutputEn: 1, OpenDrain: 0 + FuncSel: 1 (GPIO) + GPIO Matrix SigOut ID: 256 (simple GPIO output) + SleepSelEn: 1 + + IO[26] **RESERVED** - + Pullup: 1, Pulldown: 0, DriveCap: 2 + InputEn: 1, OutputEn: 0, OpenDrain: 0 + FuncSel: 0 (IOMUX) + SleepSelEn: 1 + + =================IO DUMP End================== + +当 IO 管脚是通过 GPIO 交换矩阵连接到内部外设信号，输出信息打印中的外设信号 ID 定义可以在 ``soc/gpio_sig_map.h`` 文件中查看。``**RESERVED**`` 字样则表示此 IO 被用于连接 FLASH 或 PSRAM，因此该引脚不应该被其他任何应用场景所征用并进行重新配置。 .. only:: SOC_RTCIO_INPUT_OUTPUT_SUPPORTED @@ -96,6 +124,7 @@ API 参考 - 普通 GPIO ------------------------ .. include-build-file:: inc/rtc_io.inc + .. include-build-file:: inc/lp_io.inc .. include-build-file:: inc/rtc_io_types.inc .. only:: SOC_GPIO_SUPPORT_PIN_GLITCH_FILTER or SOC_GPIO_FLEX_GLITCH_FILTER_NUM