From 9df77e015a38db3a9abfd272a96e5d01f3f376a5 Mon Sep 17 00:00:00 2001 From: wuzhenghui Date: Thu, 13 Jul 2023 13:01:07 +0800 Subject: [PATCH] fix(rtc_clk): fix i2c master clock missing in bbpll configure --- components/esp_hw_support/port/esp32c6/rtc_clk.c | 3 +++ components/esp_hw_support/port/esp32h2/rtc_clk.c | 3 +++ 2 files changed, 6 insertions(+) diff --git a/components/esp_hw_support/port/esp32c6/rtc_clk.c b/components/esp_hw_support/port/esp32c6/rtc_clk.c index b05a3b0915b..c56234e410f 100644 --- a/components/esp_hw_support/port/esp32c6/rtc_clk.c +++ b/components/esp_hw_support/port/esp32c6/rtc_clk.c @@ -17,6 +17,7 @@ #include "esp_rom_sys.h" #include "hal/clk_tree_ll.h" #include "hal/regi2c_ctrl_ll.h" +#include "hal/modem_lpcon_ll.h" #include "soc/io_mux_reg.h" #include "soc/lp_aon_reg.h" @@ -142,6 +143,7 @@ static void rtc_clk_bbpll_configure(rtc_xtal_freq_t xtal_freq, int pll_freq) /* Digital part */ clk_ll_bbpll_set_freq_mhz(pll_freq); /* Analog part */ + modem_lpcon_ll_enable_i2c_master_clock(&MODEM_LPCON, true); /* BBPLL CALIBRATION START */ regi2c_ctrl_ll_bbpll_calibration_start(); clk_ll_bbpll_set_config(pll_freq, xtal_freq); @@ -149,6 +151,7 @@ static void rtc_clk_bbpll_configure(rtc_xtal_freq_t xtal_freq, int pll_freq) while(!regi2c_ctrl_ll_bbpll_calibration_is_done()); /* BBPLL CALIBRATION STOP */ regi2c_ctrl_ll_bbpll_calibration_stop(); + modem_lpcon_ll_enable_i2c_master_clock(&MODEM_LPCON, false); s_cur_pll_freq = pll_freq; } diff --git a/components/esp_hw_support/port/esp32h2/rtc_clk.c b/components/esp_hw_support/port/esp32h2/rtc_clk.c index d834c09cb49..877ceb58cce 100644 --- a/components/esp_hw_support/port/esp32h2/rtc_clk.c +++ b/components/esp_hw_support/port/esp32h2/rtc_clk.c @@ -17,6 +17,7 @@ #include "esp_rom_sys.h" #include "hal/clk_tree_ll.h" #include "hal/regi2c_ctrl_ll.h" +#include "hal/modem_lpcon_ll.h" #include "soc/io_mux_reg.h" #include "soc/lp_aon_reg.h" #include "soc/lp_clkrst_reg.h" @@ -159,6 +160,7 @@ static void rtc_clk_bbpll_configure(rtc_xtal_freq_t xtal_freq, int pll_freq) /* Digital part */ clk_ll_bbpll_set_freq_mhz(pll_freq); /* Analog part */ + modem_lpcon_ll_enable_i2c_master_clock(&MODEM_LPCON, true); /* BBPLL CALIBRATION START */ regi2c_ctrl_ll_bbpll_calibration_start(); clk_ll_bbpll_set_config(pll_freq, xtal_freq); @@ -166,6 +168,7 @@ static void rtc_clk_bbpll_configure(rtc_xtal_freq_t xtal_freq, int pll_freq) while(!regi2c_ctrl_ll_bbpll_calibration_is_done()); /* BBPLL CALIBRATION STOP */ regi2c_ctrl_ll_bbpll_calibration_stop(); + modem_lpcon_ll_enable_i2c_master_clock(&MODEM_LPCON, false); s_cur_pll_freq = pll_freq; }