From 07332abbaad63a74b22a6641488d9f6db000a2e2 Mon Sep 17 00:00:00 2001 From: boarchuz Date: Mon, 12 Jun 2023 18:59:25 +1000 Subject: [PATCH] fix ULP FSM reg ops with addr > 0xFF --- components/ulp/ulp_fsm/include/esp32/ulp.h | 4 ++-- components/ulp/ulp_fsm/include/esp32s2/ulp.h | 4 ++-- components/ulp/ulp_fsm/include/esp32s3/ulp.h | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/components/ulp/ulp_fsm/include/esp32/ulp.h b/components/ulp/ulp_fsm/include/esp32/ulp.h index 3ba944cc732..c5d9b8b9f45 100644 --- a/components/ulp/ulp_fsm/include/esp32/ulp.h +++ b/components/ulp/ulp_fsm/include/esp32/ulp.h @@ -331,7 +331,7 @@ static inline uint32_t SOC_REG_TO_ULP_PERIPH_SEL(uint32_t reg) { * This instruction can access RTC_CNTL_, RTC_IO_, SENS_, and RTC_I2C peripheral registers. */ #define I_WR_REG(reg, low_bit, high_bit, val) {.wr_reg = {\ - .addr = (reg & 0xff) / sizeof(uint32_t), \ + .addr = ((reg) / sizeof(uint32_t)) & 0xff, \ .periph_sel = SOC_REG_TO_ULP_PERIPH_SEL(reg), \ .data = val, \ .low = low_bit, \ @@ -345,7 +345,7 @@ static inline uint32_t SOC_REG_TO_ULP_PERIPH_SEL(uint32_t reg) { * This instruction can access RTC_CNTL_, RTC_IO_, SENS_, and RTC_I2C peripheral registers. */ #define I_RD_REG(reg, low_bit, high_bit) {.rd_reg = {\ - .addr = (reg & 0xff) / sizeof(uint32_t), \ + .addr = ((reg) / sizeof(uint32_t)) & 0xff, \ .periph_sel = SOC_REG_TO_ULP_PERIPH_SEL(reg), \ .unused = 0, \ .low = low_bit, \ diff --git a/components/ulp/ulp_fsm/include/esp32s2/ulp.h b/components/ulp/ulp_fsm/include/esp32s2/ulp.h index 33a57383269..dff16973551 100644 --- a/components/ulp/ulp_fsm/include/esp32s2/ulp.h +++ b/components/ulp/ulp_fsm/include/esp32s2/ulp.h @@ -319,7 +319,7 @@ static inline uint32_t SOC_REG_TO_ULP_PERIPH_SEL(uint32_t reg) * This instruction can access RTC_CNTL_, RTC_IO_, SENS_, and RTC_I2C peripheral registers. */ #define I_WR_REG(reg, low_bit, high_bit, val) {.wr_reg = {\ - .addr = (reg & 0xff) / sizeof(uint32_t), \ + .addr = ((reg) / sizeof(uint32_t)) & 0xff, \ .periph_sel = SOC_REG_TO_ULP_PERIPH_SEL(reg), \ .data = val, \ .low = low_bit, \ @@ -333,7 +333,7 @@ static inline uint32_t SOC_REG_TO_ULP_PERIPH_SEL(uint32_t reg) * This instruction can access RTC_CNTL_, RTC_IO_, SENS_, and RTC_I2C peripheral registers. */ #define I_RD_REG(reg, low_bit, high_bit) {.rd_reg = {\ - .addr = (reg & 0xff) / sizeof(uint32_t), \ + .addr = ((reg) / sizeof(uint32_t)) & 0xff, \ .periph_sel = SOC_REG_TO_ULP_PERIPH_SEL(reg), \ .unused = 0, \ .low = low_bit, \ diff --git a/components/ulp/ulp_fsm/include/esp32s3/ulp.h b/components/ulp/ulp_fsm/include/esp32s3/ulp.h index 33a57383269..dff16973551 100644 --- a/components/ulp/ulp_fsm/include/esp32s3/ulp.h +++ b/components/ulp/ulp_fsm/include/esp32s3/ulp.h @@ -319,7 +319,7 @@ static inline uint32_t SOC_REG_TO_ULP_PERIPH_SEL(uint32_t reg) * This instruction can access RTC_CNTL_, RTC_IO_, SENS_, and RTC_I2C peripheral registers. */ #define I_WR_REG(reg, low_bit, high_bit, val) {.wr_reg = {\ - .addr = (reg & 0xff) / sizeof(uint32_t), \ + .addr = ((reg) / sizeof(uint32_t)) & 0xff, \ .periph_sel = SOC_REG_TO_ULP_PERIPH_SEL(reg), \ .data = val, \ .low = low_bit, \ @@ -333,7 +333,7 @@ static inline uint32_t SOC_REG_TO_ULP_PERIPH_SEL(uint32_t reg) * This instruction can access RTC_CNTL_, RTC_IO_, SENS_, and RTC_I2C peripheral registers. */ #define I_RD_REG(reg, low_bit, high_bit) {.rd_reg = {\ - .addr = (reg & 0xff) / sizeof(uint32_t), \ + .addr = ((reg) / sizeof(uint32_t)) & 0xff, \ .periph_sel = SOC_REG_TO_ULP_PERIPH_SEL(reg), \ .unused = 0, \ .low = low_bit, \