diff --git a/components/efuse/esp32c6/esp_efuse_table.c b/components/efuse/esp32c6/esp_efuse_table.c
index e6bf085e8a61..8b04686b3092 100644
--- a/components/efuse/esp32c6/esp_efuse_table.c
+++ b/components/efuse/esp32c6/esp_efuse_table.c
@@ -9,7 +9,7 @@
 #include <assert.h>
 #include "esp_efuse_table.h"
 
-// md5_digest_table fd5a35cea89bfad954e834bc92bed385
+// md5_digest_table 0d9c0c6a65ccf2d4a7279ede32b6f797
 // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
 // If you want to change some fields, you need to change esp_efuse_table.csv file
 // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
@@ -187,6 +187,34 @@ static const esp_efuse_desc_t WR_DIS_MAC_EXT[] = {
     {EFUSE_BLK0, 20, 1}, 	 // [] wr_dis of MAC_EXT,
 };
 
+static const esp_efuse_desc_t WR_DIS_ACTIVE_HP_DBIAS[] = {
+    {EFUSE_BLK0, 20, 1}, 	 // [] wr_dis of ACTIVE_HP_DBIAS,
+};
+
+static const esp_efuse_desc_t WR_DIS_ACTIVE_LP_DBIAS[] = {
+    {EFUSE_BLK0, 20, 1}, 	 // [] wr_dis of ACTIVE_LP_DBIAS,
+};
+
+static const esp_efuse_desc_t WR_DIS_LSLP_HP_DBG[] = {
+    {EFUSE_BLK0, 20, 1}, 	 // [] wr_dis of LSLP_HP_DBG,
+};
+
+static const esp_efuse_desc_t WR_DIS_LSLP_HP_DBIAS[] = {
+    {EFUSE_BLK0, 20, 1}, 	 // [] wr_dis of LSLP_HP_DBIAS,
+};
+
+static const esp_efuse_desc_t WR_DIS_DSLP_LP_DBG[] = {
+    {EFUSE_BLK0, 20, 1}, 	 // [] wr_dis of DSLP_LP_DBG,
+};
+
+static const esp_efuse_desc_t WR_DIS_DSLP_LP_DBIAS[] = {
+    {EFUSE_BLK0, 20, 1}, 	 // [] wr_dis of DSLP_LP_DBIAS,
+};
+
+static const esp_efuse_desc_t WR_DIS_DBIAS_VOL_GAP[] = {
+    {EFUSE_BLK0, 20, 1}, 	 // [] wr_dis of DBIAS_VOL_GAP,
+};
+
 static const esp_efuse_desc_t WR_DIS_WAFER_VERSION_MINOR[] = {
     {EFUSE_BLK0, 20, 1}, 	 // [] wr_dis of WAFER_VERSION_MINOR,
 };
@@ -553,6 +581,34 @@ static const esp_efuse_desc_t MAC_EXT[] = {
     {EFUSE_BLK1, 48, 8}, 	 // [] Stores the extended bits of MAC address,
 };
 
+static const esp_efuse_desc_t ACTIVE_HP_DBIAS[] = {
+    {EFUSE_BLK1, 64, 5}, 	 // [] Stores the active hp dbias,
+};
+
+static const esp_efuse_desc_t ACTIVE_LP_DBIAS[] = {
+    {EFUSE_BLK1, 69, 5}, 	 // [] Stores the active lp dbias,
+};
+
+static const esp_efuse_desc_t LSLP_HP_DBG[] = {
+    {EFUSE_BLK1, 74, 2}, 	 // [] Stores the lslp hp dbg,
+};
+
+static const esp_efuse_desc_t LSLP_HP_DBIAS[] = {
+    {EFUSE_BLK1, 76, 4}, 	 // [] Stores the lslp hp dbias,
+};
+
+static const esp_efuse_desc_t DSLP_LP_DBG[] = {
+    {EFUSE_BLK1, 80, 3}, 	 // [] Stores the dslp lp dbg,
+};
+
+static const esp_efuse_desc_t DSLP_LP_DBIAS[] = {
+    {EFUSE_BLK1, 83, 4}, 	 // [] Stores the dslp lp dbias,
+};
+
+static const esp_efuse_desc_t DBIAS_VOL_GAP[] = {
+    {EFUSE_BLK1, 87, 5}, 	 // [] Stores the hp and lp dbias vol gap,
+};
+
 static const esp_efuse_desc_t WAFER_VERSION_MINOR[] = {
     {EFUSE_BLK1, 114, 4}, 	 // [],
 };
@@ -912,6 +968,41 @@ const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_MAC_EXT[] = {
     NULL
 };
 
+const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ACTIVE_HP_DBIAS[] = {
+    &WR_DIS_ACTIVE_HP_DBIAS[0],    		// [] wr_dis of ACTIVE_HP_DBIAS
+    NULL
+};
+
+const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ACTIVE_LP_DBIAS[] = {
+    &WR_DIS_ACTIVE_LP_DBIAS[0],    		// [] wr_dis of ACTIVE_LP_DBIAS
+    NULL
+};
+
+const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_LSLP_HP_DBG[] = {
+    &WR_DIS_LSLP_HP_DBG[0],    		// [] wr_dis of LSLP_HP_DBG
+    NULL
+};
+
+const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_LSLP_HP_DBIAS[] = {
+    &WR_DIS_LSLP_HP_DBIAS[0],    		// [] wr_dis of LSLP_HP_DBIAS
+    NULL
+};
+
+const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DSLP_LP_DBG[] = {
+    &WR_DIS_DSLP_LP_DBG[0],    		// [] wr_dis of DSLP_LP_DBG
+    NULL
+};
+
+const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DSLP_LP_DBIAS[] = {
+    &WR_DIS_DSLP_LP_DBIAS[0],    		// [] wr_dis of DSLP_LP_DBIAS
+    NULL
+};
+
+const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DBIAS_VOL_GAP[] = {
+    &WR_DIS_DBIAS_VOL_GAP[0],    		// [] wr_dis of DBIAS_VOL_GAP
+    NULL
+};
+
 const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_WAFER_VERSION_MINOR[] = {
     &WR_DIS_WAFER_VERSION_MINOR[0],    		// [] wr_dis of WAFER_VERSION_MINOR
     NULL
@@ -1368,6 +1459,41 @@ const esp_efuse_desc_t* ESP_EFUSE_MAC_EXT[] = {
     NULL
 };
 
+const esp_efuse_desc_t* ESP_EFUSE_ACTIVE_HP_DBIAS[] = {
+    &ACTIVE_HP_DBIAS[0],    		// [] Stores the active hp dbias
+    NULL
+};
+
+const esp_efuse_desc_t* ESP_EFUSE_ACTIVE_LP_DBIAS[] = {
+    &ACTIVE_LP_DBIAS[0],    		// [] Stores the active lp dbias
+    NULL
+};
+
+const esp_efuse_desc_t* ESP_EFUSE_LSLP_HP_DBG[] = {
+    &LSLP_HP_DBG[0],    		// [] Stores the lslp hp dbg
+    NULL
+};
+
+const esp_efuse_desc_t* ESP_EFUSE_LSLP_HP_DBIAS[] = {
+    &LSLP_HP_DBIAS[0],    		// [] Stores the lslp hp dbias
+    NULL
+};
+
+const esp_efuse_desc_t* ESP_EFUSE_DSLP_LP_DBG[] = {
+    &DSLP_LP_DBG[0],    		// [] Stores the dslp lp dbg
+    NULL
+};
+
+const esp_efuse_desc_t* ESP_EFUSE_DSLP_LP_DBIAS[] = {
+    &DSLP_LP_DBIAS[0],    		// [] Stores the dslp lp dbias
+    NULL
+};
+
+const esp_efuse_desc_t* ESP_EFUSE_DBIAS_VOL_GAP[] = {
+    &DBIAS_VOL_GAP[0],    		// [] Stores the hp and lp dbias vol gap
+    NULL
+};
+
 const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION_MINOR[] = {
     &WAFER_VERSION_MINOR[0],    		// []
     NULL
diff --git a/components/efuse/esp32c6/esp_efuse_table.csv b/components/efuse/esp32c6/esp_efuse_table.csv
index 9cfbb6fb6d2a..7f0f52ec395f 100644
--- a/components/efuse/esp32c6/esp_efuse_table.csv
+++ b/components/efuse/esp32c6/esp_efuse_table.csv
@@ -9,7 +9,7 @@
 # this will generate new source files, next rebuild all the sources.
 # !!!!!!!!!!! #
 
-# This file was generated by regtools.py based on the efuses.yaml file with the version: 709e8ea096e8a03a10006d40d5451a49
+# This file was generated by regtools.py based on the efuses.yaml file with the version: df46b69f0ed3913114ba53d3a0b2b843
 
 WR_DIS,                                          EFUSE_BLK0,   0,  32, [] Disable programming of individual eFuses
 WR_DIS.RD_DIS,                                   EFUSE_BLK0,   0,   1, [] wr_dis of RD_DIS
@@ -54,6 +54,13 @@ WR_DIS.DISABLE_BLK_VERSION_MAJOR,                EFUSE_BLK0,  19,   1, [] wr_dis
 WR_DIS.BLK1,                                     EFUSE_BLK0,  20,   1, [] wr_dis of BLOCK1
 WR_DIS.MAC,                                      EFUSE_BLK0,  20,   1, [WR_DIS.MAC_FACTORY] wr_dis of MAC
 WR_DIS.MAC_EXT,                                  EFUSE_BLK0,  20,   1, [] wr_dis of MAC_EXT
+WR_DIS.ACTIVE_HP_DBIAS,                          EFUSE_BLK0,  20,   1, [] wr_dis of ACTIVE_HP_DBIAS
+WR_DIS.ACTIVE_LP_DBIAS,                          EFUSE_BLK0,  20,   1, [] wr_dis of ACTIVE_LP_DBIAS
+WR_DIS.LSLP_HP_DBG,                              EFUSE_BLK0,  20,   1, [] wr_dis of LSLP_HP_DBG
+WR_DIS.LSLP_HP_DBIAS,                            EFUSE_BLK0,  20,   1, [] wr_dis of LSLP_HP_DBIAS
+WR_DIS.DSLP_LP_DBG,                              EFUSE_BLK0,  20,   1, [] wr_dis of DSLP_LP_DBG
+WR_DIS.DSLP_LP_DBIAS,                            EFUSE_BLK0,  20,   1, [] wr_dis of DSLP_LP_DBIAS
+WR_DIS.DBIAS_VOL_GAP,                            EFUSE_BLK0,  20,   1, [] wr_dis of DBIAS_VOL_GAP
 WR_DIS.WAFER_VERSION_MINOR,                      EFUSE_BLK0,  20,   1, [] wr_dis of WAFER_VERSION_MINOR
 WR_DIS.WAFER_VERSION_MAJOR,                      EFUSE_BLK0,  20,   1, [] wr_dis of WAFER_VERSION_MAJOR
 WR_DIS.PKG_VERSION,                              EFUSE_BLK0,  20,   1, [] wr_dis of PKG_VERSION
@@ -150,6 +157,13 @@ MAC,                                             EFUSE_BLK1,  40,   8, [MAC_FACT
 ,                                                EFUSE_BLK1,   0,   8, [MAC_FACTORY] MAC address
 MAC_EXT,                                         EFUSE_BLK1,  56,   8, [] Stores the extended bits of MAC address
 ,                                                EFUSE_BLK1,  48,   8, [] Stores the extended bits of MAC address
+ACTIVE_HP_DBIAS,                                 EFUSE_BLK1,  64,   5, [] Stores the active hp dbias
+ACTIVE_LP_DBIAS,                                 EFUSE_BLK1,  69,   5, [] Stores the active lp dbias
+LSLP_HP_DBG,                                     EFUSE_BLK1,  74,   2, [] Stores the lslp hp dbg
+LSLP_HP_DBIAS,                                   EFUSE_BLK1,  76,   4, [] Stores the lslp hp dbias
+DSLP_LP_DBG,                                     EFUSE_BLK1,  80,   3, [] Stores the dslp lp dbg
+DSLP_LP_DBIAS,                                   EFUSE_BLK1,  83,   4, [] Stores the dslp lp dbias
+DBIAS_VOL_GAP,                                   EFUSE_BLK1,  87,   5, [] Stores the hp and lp dbias vol gap
 WAFER_VERSION_MINOR,                             EFUSE_BLK1, 114,   4, []
 WAFER_VERSION_MAJOR,                             EFUSE_BLK1, 118,   2, []
 PKG_VERSION,                                     EFUSE_BLK1, 120,   3, [] Package version
diff --git a/components/efuse/esp32c6/include/esp_efuse_table.h b/components/efuse/esp32c6/include/esp_efuse_table.h
index 28379f967257..c0dec3c99b8c 100644
--- a/components/efuse/esp32c6/include/esp_efuse_table.h
+++ b/components/efuse/esp32c6/include/esp_efuse_table.h
@@ -10,7 +10,7 @@ extern "C" {
 
 #include "esp_efuse.h"
 
-// md5_digest_table fd5a35cea89bfad954e834bc92bed385
+// md5_digest_table 0d9c0c6a65ccf2d4a7279ede32b6f797
 // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
 // If you want to change some fields, you need to change esp_efuse_table.csv file
 // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
@@ -70,6 +70,13 @@ extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLK1[];
 extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_MAC[];
 #define ESP_EFUSE_WR_DIS_MAC_FACTORY ESP_EFUSE_WR_DIS_MAC
 extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_MAC_EXT[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ACTIVE_HP_DBIAS[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ACTIVE_LP_DBIAS[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_LSLP_HP_DBG[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_LSLP_HP_DBIAS[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DSLP_LP_DBG[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DSLP_LP_DBIAS[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DBIAS_VOL_GAP[];
 extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_WAFER_VERSION_MINOR[];
 extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_WAFER_VERSION_MAJOR[];
 extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_PKG_VERSION[];
@@ -187,6 +194,13 @@ extern const esp_efuse_desc_t* ESP_EFUSE_DISABLE_BLK_VERSION_MAJOR[];
 extern const esp_efuse_desc_t* ESP_EFUSE_MAC[];
 #define ESP_EFUSE_MAC_FACTORY ESP_EFUSE_MAC
 extern const esp_efuse_desc_t* ESP_EFUSE_MAC_EXT[];
+extern const esp_efuse_desc_t* ESP_EFUSE_ACTIVE_HP_DBIAS[];
+extern const esp_efuse_desc_t* ESP_EFUSE_ACTIVE_LP_DBIAS[];
+extern const esp_efuse_desc_t* ESP_EFUSE_LSLP_HP_DBG[];
+extern const esp_efuse_desc_t* ESP_EFUSE_LSLP_HP_DBIAS[];
+extern const esp_efuse_desc_t* ESP_EFUSE_DSLP_LP_DBG[];
+extern const esp_efuse_desc_t* ESP_EFUSE_DSLP_LP_DBIAS[];
+extern const esp_efuse_desc_t* ESP_EFUSE_DBIAS_VOL_GAP[];
 extern const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION_MINOR[];
 extern const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION_MAJOR[];
 extern const esp_efuse_desc_t* ESP_EFUSE_PKG_VERSION[];
diff --git a/components/efuse/esp32h2/esp_efuse_table.c b/components/efuse/esp32h2/esp_efuse_table.c
index 219295b88991..31482481edf9 100644
--- a/components/efuse/esp32h2/esp_efuse_table.c
+++ b/components/efuse/esp32h2/esp_efuse_table.c
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2017-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2017-2024 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -9,7 +9,7 @@
 #include <assert.h>
 #include "esp_efuse_table.h"
 
-// md5_digest_table 2d4447d97f60a463a015165b36b45afb
+// md5_digest_table 1b79da735c5daed71ed7a91a0c55c5b6
 // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
 // If you want to change some fields, you need to change esp_efuse_table.csv file
 // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
@@ -183,6 +183,34 @@ static const esp_efuse_desc_t WR_DIS_MAC_EXT[] = {
     {EFUSE_BLK0, 20, 1}, 	 // [] wr_dis of MAC_EXT,
 };
 
+static const esp_efuse_desc_t WR_DIS_RXIQ_VERSION[] = {
+    {EFUSE_BLK0, 20, 1}, 	 // [] wr_dis of RXIQ_VERSION,
+};
+
+static const esp_efuse_desc_t WR_DIS_RXIQ_0[] = {
+    {EFUSE_BLK0, 20, 1}, 	 // [] wr_dis of RXIQ_0,
+};
+
+static const esp_efuse_desc_t WR_DIS_RXIQ_1[] = {
+    {EFUSE_BLK0, 20, 1}, 	 // [] wr_dis of RXIQ_1,
+};
+
+static const esp_efuse_desc_t WR_DIS_ACTIVE_HP_DBIAS[] = {
+    {EFUSE_BLK0, 20, 1}, 	 // [] wr_dis of ACTIVE_HP_DBIAS,
+};
+
+static const esp_efuse_desc_t WR_DIS_ACTIVE_LP_DBIAS[] = {
+    {EFUSE_BLK0, 20, 1}, 	 // [] wr_dis of ACTIVE_LP_DBIAS,
+};
+
+static const esp_efuse_desc_t WR_DIS_DSLP_DBIAS[] = {
+    {EFUSE_BLK0, 20, 1}, 	 // [] wr_dis of DSLP_DBIAS,
+};
+
+static const esp_efuse_desc_t WR_DIS_DBIAS_VOL_GAP[] = {
+    {EFUSE_BLK0, 20, 1}, 	 // [] wr_dis of DBIAS_VOL_GAP,
+};
+
 static const esp_efuse_desc_t WR_DIS_WAFER_VERSION_MINOR[] = {
     {EFUSE_BLK0, 20, 1}, 	 // [] wr_dis of WAFER_VERSION_MINOR,
 };
@@ -541,12 +569,40 @@ static const esp_efuse_desc_t MAC_EXT[] = {
     {EFUSE_BLK1, 48, 8}, 	 // [] Stores the extended bits of MAC address,
 };
 
+static const esp_efuse_desc_t RXIQ_VERSION[] = {
+    {EFUSE_BLK1, 64, 3}, 	 // [] Stores RF Calibration data. RXIQ version,
+};
+
+static const esp_efuse_desc_t RXIQ_0[] = {
+    {EFUSE_BLK1, 67, 7}, 	 // [] Stores RF Calibration data. RXIQ data 0,
+};
+
+static const esp_efuse_desc_t RXIQ_1[] = {
+    {EFUSE_BLK1, 74, 7}, 	 // [] Stores RF Calibration data. RXIQ data 1,
+};
+
+static const esp_efuse_desc_t ACTIVE_HP_DBIAS[] = {
+    {EFUSE_BLK1, 81, 5}, 	 // [] Stores the PMU active hp dbias,
+};
+
+static const esp_efuse_desc_t ACTIVE_LP_DBIAS[] = {
+    {EFUSE_BLK1, 86, 5}, 	 // [] Stores the PMU active lp dbias,
+};
+
+static const esp_efuse_desc_t DSLP_DBIAS[] = {
+    {EFUSE_BLK1, 91, 4}, 	 // [] Stores the PMU sleep dbias,
+};
+
+static const esp_efuse_desc_t DBIAS_VOL_GAP[] = {
+    {EFUSE_BLK1, 95, 5}, 	 // [] Stores the low 1 bit of dbias_vol_gap,
+};
+
 static const esp_efuse_desc_t WAFER_VERSION_MINOR[] = {
-    {EFUSE_BLK1, 114, 3}, 	 // [],
+    {EFUSE_BLK1, 114, 3}, 	 // [] Stores the wafer version minor,
 };
 
 static const esp_efuse_desc_t WAFER_VERSION_MAJOR[] = {
-    {EFUSE_BLK1, 117, 2}, 	 // [],
+    {EFUSE_BLK1, 117, 2}, 	 // [] Stores the wafer version major,
 };
 
 static const esp_efuse_desc_t DISABLE_WAFER_VERSION_MAJOR[] = {
@@ -554,15 +610,15 @@ static const esp_efuse_desc_t DISABLE_WAFER_VERSION_MAJOR[] = {
 };
 
 static const esp_efuse_desc_t FLASH_CAP[] = {
-    {EFUSE_BLK1, 120, 3}, 	 // [],
+    {EFUSE_BLK1, 120, 3}, 	 // [] Stores the flash cap,
 };
 
 static const esp_efuse_desc_t FLASH_TEMP[] = {
-    {EFUSE_BLK1, 123, 2}, 	 // [],
+    {EFUSE_BLK1, 123, 2}, 	 // [] Stores the flash temp,
 };
 
 static const esp_efuse_desc_t FLASH_VENDOR[] = {
-    {EFUSE_BLK1, 125, 3}, 	 // [],
+    {EFUSE_BLK1, 125, 3}, 	 // [] Stores the flash vendor,
 };
 
 static const esp_efuse_desc_t PKG_VERSION[] = {
@@ -574,7 +630,7 @@ static const esp_efuse_desc_t OPTIONAL_UNIQUE_ID[] = {
 };
 
 static const esp_efuse_desc_t BLK_VERSION_MINOR[] = {
-    {EFUSE_BLK2, 130, 3}, 	 // [] BLK_VERSION_MINOR of BLOCK2,
+    {EFUSE_BLK2, 130, 3}, 	 // [] BLK_VERSION_MINOR of BLOCK2. 1: RF Calibration data in BLOCK1,
 };
 
 static const esp_efuse_desc_t BLK_VERSION_MAJOR[] = {
@@ -891,6 +947,41 @@ const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_MAC_EXT[] = {
     NULL
 };
 
+const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_RXIQ_VERSION[] = {
+    &WR_DIS_RXIQ_VERSION[0],    		// [] wr_dis of RXIQ_VERSION
+    NULL
+};
+
+const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_RXIQ_0[] = {
+    &WR_DIS_RXIQ_0[0],    		// [] wr_dis of RXIQ_0
+    NULL
+};
+
+const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_RXIQ_1[] = {
+    &WR_DIS_RXIQ_1[0],    		// [] wr_dis of RXIQ_1
+    NULL
+};
+
+const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ACTIVE_HP_DBIAS[] = {
+    &WR_DIS_ACTIVE_HP_DBIAS[0],    		// [] wr_dis of ACTIVE_HP_DBIAS
+    NULL
+};
+
+const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ACTIVE_LP_DBIAS[] = {
+    &WR_DIS_ACTIVE_LP_DBIAS[0],    		// [] wr_dis of ACTIVE_LP_DBIAS
+    NULL
+};
+
+const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DSLP_DBIAS[] = {
+    &WR_DIS_DSLP_DBIAS[0],    		// [] wr_dis of DSLP_DBIAS
+    NULL
+};
+
+const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DBIAS_VOL_GAP[] = {
+    &WR_DIS_DBIAS_VOL_GAP[0],    		// [] wr_dis of DBIAS_VOL_GAP
+    NULL
+};
+
 const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_WAFER_VERSION_MINOR[] = {
     &WR_DIS_WAFER_VERSION_MINOR[0],    		// [] wr_dis of WAFER_VERSION_MINOR
     NULL
@@ -1337,13 +1428,48 @@ const esp_efuse_desc_t* ESP_EFUSE_MAC_EXT[] = {
     NULL
 };
 
+const esp_efuse_desc_t* ESP_EFUSE_RXIQ_VERSION[] = {
+    &RXIQ_VERSION[0],    		// [] Stores RF Calibration data. RXIQ version
+    NULL
+};
+
+const esp_efuse_desc_t* ESP_EFUSE_RXIQ_0[] = {
+    &RXIQ_0[0],    		// [] Stores RF Calibration data. RXIQ data 0
+    NULL
+};
+
+const esp_efuse_desc_t* ESP_EFUSE_RXIQ_1[] = {
+    &RXIQ_1[0],    		// [] Stores RF Calibration data. RXIQ data 1
+    NULL
+};
+
+const esp_efuse_desc_t* ESP_EFUSE_ACTIVE_HP_DBIAS[] = {
+    &ACTIVE_HP_DBIAS[0],    		// [] Stores the PMU active hp dbias
+    NULL
+};
+
+const esp_efuse_desc_t* ESP_EFUSE_ACTIVE_LP_DBIAS[] = {
+    &ACTIVE_LP_DBIAS[0],    		// [] Stores the PMU active lp dbias
+    NULL
+};
+
+const esp_efuse_desc_t* ESP_EFUSE_DSLP_DBIAS[] = {
+    &DSLP_DBIAS[0],    		// [] Stores the PMU sleep dbias
+    NULL
+};
+
+const esp_efuse_desc_t* ESP_EFUSE_DBIAS_VOL_GAP[] = {
+    &DBIAS_VOL_GAP[0],    		// [] Stores the low 1 bit of dbias_vol_gap
+    NULL
+};
+
 const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION_MINOR[] = {
-    &WAFER_VERSION_MINOR[0],    		// []
+    &WAFER_VERSION_MINOR[0],    		// [] Stores the wafer version minor
     NULL
 };
 
 const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION_MAJOR[] = {
-    &WAFER_VERSION_MAJOR[0],    		// []
+    &WAFER_VERSION_MAJOR[0],    		// [] Stores the wafer version major
     NULL
 };
 
@@ -1353,17 +1479,17 @@ const esp_efuse_desc_t* ESP_EFUSE_DISABLE_WAFER_VERSION_MAJOR[] = {
 };
 
 const esp_efuse_desc_t* ESP_EFUSE_FLASH_CAP[] = {
-    &FLASH_CAP[0],    		// []
+    &FLASH_CAP[0],    		// [] Stores the flash cap
     NULL
 };
 
 const esp_efuse_desc_t* ESP_EFUSE_FLASH_TEMP[] = {
-    &FLASH_TEMP[0],    		// []
+    &FLASH_TEMP[0],    		// [] Stores the flash temp
     NULL
 };
 
 const esp_efuse_desc_t* ESP_EFUSE_FLASH_VENDOR[] = {
-    &FLASH_VENDOR[0],    		// []
+    &FLASH_VENDOR[0],    		// [] Stores the flash vendor
     NULL
 };
 
@@ -1378,7 +1504,7 @@ const esp_efuse_desc_t* ESP_EFUSE_OPTIONAL_UNIQUE_ID[] = {
 };
 
 const esp_efuse_desc_t* ESP_EFUSE_BLK_VERSION_MINOR[] = {
-    &BLK_VERSION_MINOR[0],    		// [] BLK_VERSION_MINOR of BLOCK2
+    &BLK_VERSION_MINOR[0],    		// [] BLK_VERSION_MINOR of BLOCK2. 1: RF Calibration data in BLOCK1
     NULL
 };
 
diff --git a/components/efuse/esp32h2/esp_efuse_table.csv b/components/efuse/esp32h2/esp_efuse_table.csv
index 914b98f2f06f..20b5cec21dc3 100644
--- a/components/efuse/esp32h2/esp_efuse_table.csv
+++ b/components/efuse/esp32h2/esp_efuse_table.csv
@@ -9,7 +9,7 @@
 # this will generate new source files, next rebuild all the sources.
 # !!!!!!!!!!! #
 
-# This file was generated by regtools.py based on the efuses.yaml file with the version: b69ddcfb39a412df490e3facbbfb46b2
+# This file was generated by regtools.py based on the efuses.yaml file with the version: ef562916e77cf77203c1a4c0cff35ac5
 
 WR_DIS,                                          EFUSE_BLK0,   0,  32, [] Disable programming of individual eFuses
 WR_DIS.RD_DIS,                                   EFUSE_BLK0,   0,   1, [] wr_dis of RD_DIS
@@ -53,6 +53,13 @@ WR_DIS.HYS_EN_PAD1,                              EFUSE_BLK0,  19,   1, [] wr_dis
 WR_DIS.BLK1,                                     EFUSE_BLK0,  20,   1, [] wr_dis of BLOCK1
 WR_DIS.MAC,                                      EFUSE_BLK0,  20,   1, [WR_DIS.MAC_FACTORY] wr_dis of MAC
 WR_DIS.MAC_EXT,                                  EFUSE_BLK0,  20,   1, [] wr_dis of MAC_EXT
+WR_DIS.RXIQ_VERSION,                             EFUSE_BLK0,  20,   1, [] wr_dis of RXIQ_VERSION
+WR_DIS.RXIQ_0,                                   EFUSE_BLK0,  20,   1, [] wr_dis of RXIQ_0
+WR_DIS.RXIQ_1,                                   EFUSE_BLK0,  20,   1, [] wr_dis of RXIQ_1
+WR_DIS.ACTIVE_HP_DBIAS,                          EFUSE_BLK0,  20,   1, [] wr_dis of ACTIVE_HP_DBIAS
+WR_DIS.ACTIVE_LP_DBIAS,                          EFUSE_BLK0,  20,   1, [] wr_dis of ACTIVE_LP_DBIAS
+WR_DIS.DSLP_DBIAS,                               EFUSE_BLK0,  20,   1, [] wr_dis of DSLP_DBIAS
+WR_DIS.DBIAS_VOL_GAP,                            EFUSE_BLK0,  20,   1, [] wr_dis of DBIAS_VOL_GAP
 WR_DIS.WAFER_VERSION_MINOR,                      EFUSE_BLK0,  20,   1, [] wr_dis of WAFER_VERSION_MINOR
 WR_DIS.WAFER_VERSION_MAJOR,                      EFUSE_BLK0,  20,   1, [] wr_dis of WAFER_VERSION_MAJOR
 WR_DIS.DISABLE_WAFER_VERSION_MAJOR,              EFUSE_BLK0,  20,   1, [] wr_dis of DISABLE_WAFER_VERSION_MAJOR
@@ -147,15 +154,22 @@ MAC,                                             EFUSE_BLK1,  40,   8, [MAC_FACT
 ,                                                EFUSE_BLK1,   0,   8, [MAC_FACTORY] MAC address
 MAC_EXT,                                         EFUSE_BLK1,  56,   8, [] Stores the extended bits of MAC address
 ,                                                EFUSE_BLK1,  48,   8, [] Stores the extended bits of MAC address
-WAFER_VERSION_MINOR,                             EFUSE_BLK1, 114,   3, []
-WAFER_VERSION_MAJOR,                             EFUSE_BLK1, 117,   2, []
+RXIQ_VERSION,                                    EFUSE_BLK1,  64,   3, [] Stores RF Calibration data. RXIQ version
+RXIQ_0,                                          EFUSE_BLK1,  67,   7, [] Stores RF Calibration data. RXIQ data 0
+RXIQ_1,                                          EFUSE_BLK1,  74,   7, [] Stores RF Calibration data. RXIQ data 1
+ACTIVE_HP_DBIAS,                                 EFUSE_BLK1,  81,   5, [] Stores the PMU active hp dbias
+ACTIVE_LP_DBIAS,                                 EFUSE_BLK1,  86,   5, [] Stores the PMU active lp dbias
+DSLP_DBIAS,                                      EFUSE_BLK1,  91,   4, [] Stores the PMU sleep dbias
+DBIAS_VOL_GAP,                                   EFUSE_BLK1,  95,   5, [] Stores the low 1 bit of dbias_vol_gap
+WAFER_VERSION_MINOR,                             EFUSE_BLK1, 114,   3, [] Stores the wafer version minor
+WAFER_VERSION_MAJOR,                             EFUSE_BLK1, 117,   2, [] Stores the wafer version major
 DISABLE_WAFER_VERSION_MAJOR,                     EFUSE_BLK1, 119,   1, [] Disables check of wafer version major
-FLASH_CAP,                                       EFUSE_BLK1, 120,   3, []
-FLASH_TEMP,                                      EFUSE_BLK1, 123,   2, []
-FLASH_VENDOR,                                    EFUSE_BLK1, 125,   3, []
+FLASH_CAP,                                       EFUSE_BLK1, 120,   3, [] Stores the flash cap
+FLASH_TEMP,                                      EFUSE_BLK1, 123,   2, [] Stores the flash temp
+FLASH_VENDOR,                                    EFUSE_BLK1, 125,   3, [] Stores the flash vendor
 PKG_VERSION,                                     EFUSE_BLK1, 128,   3, [] Package version
 OPTIONAL_UNIQUE_ID,                              EFUSE_BLK2,   0, 128, [] Optional unique 128-bit ID
-BLK_VERSION_MINOR,                               EFUSE_BLK2, 130,   3, [] BLK_VERSION_MINOR of BLOCK2
+BLK_VERSION_MINOR,                               EFUSE_BLK2, 130,   3, [] BLK_VERSION_MINOR of BLOCK2. 1: RF Calibration data in BLOCK1
 BLK_VERSION_MAJOR,                               EFUSE_BLK2, 133,   2, [] BLK_VERSION_MAJOR of BLOCK2
 DISABLE_BLK_VERSION_MAJOR,                       EFUSE_BLK2, 135,   1, [] Disables check of blk version major
 TEMP_CALIB,                                      EFUSE_BLK2, 136,   9, [] Temperature calibration data
diff --git a/components/efuse/esp32h2/include/esp_efuse_table.h b/components/efuse/esp32h2/include/esp_efuse_table.h
index 96c8df6ee2fd..2aa6a22ee4bf 100644
--- a/components/efuse/esp32h2/include/esp_efuse_table.h
+++ b/components/efuse/esp32h2/include/esp_efuse_table.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2017-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2017-2024 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -10,7 +10,7 @@ extern "C" {
 
 #include "esp_efuse.h"
 
-// md5_digest_table 2d4447d97f60a463a015165b36b45afb
+// md5_digest_table 1b79da735c5daed71ed7a91a0c55c5b6
 // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
 // If you want to change some fields, you need to change esp_efuse_table.csv file
 // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
@@ -68,6 +68,13 @@ extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLK1[];
 extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_MAC[];
 #define ESP_EFUSE_WR_DIS_MAC_FACTORY ESP_EFUSE_WR_DIS_MAC
 extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_MAC_EXT[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_RXIQ_VERSION[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_RXIQ_0[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_RXIQ_1[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ACTIVE_HP_DBIAS[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ACTIVE_LP_DBIAS[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DSLP_DBIAS[];
+extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DBIAS_VOL_GAP[];
 extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_WAFER_VERSION_MINOR[];
 extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_WAFER_VERSION_MAJOR[];
 extern const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DISABLE_WAFER_VERSION_MAJOR[];
@@ -182,6 +189,13 @@ extern const esp_efuse_desc_t* ESP_EFUSE_HYS_EN_PAD1[];
 extern const esp_efuse_desc_t* ESP_EFUSE_MAC[];
 #define ESP_EFUSE_MAC_FACTORY ESP_EFUSE_MAC
 extern const esp_efuse_desc_t* ESP_EFUSE_MAC_EXT[];
+extern const esp_efuse_desc_t* ESP_EFUSE_RXIQ_VERSION[];
+extern const esp_efuse_desc_t* ESP_EFUSE_RXIQ_0[];
+extern const esp_efuse_desc_t* ESP_EFUSE_RXIQ_1[];
+extern const esp_efuse_desc_t* ESP_EFUSE_ACTIVE_HP_DBIAS[];
+extern const esp_efuse_desc_t* ESP_EFUSE_ACTIVE_LP_DBIAS[];
+extern const esp_efuse_desc_t* ESP_EFUSE_DSLP_DBIAS[];
+extern const esp_efuse_desc_t* ESP_EFUSE_DBIAS_VOL_GAP[];
 extern const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION_MINOR[];
 extern const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION_MAJOR[];
 extern const esp_efuse_desc_t* ESP_EFUSE_DISABLE_WAFER_VERSION_MAJOR[];
diff --git a/components/esp_hw_support/port/esp32h2/pmu_init.c b/components/esp_hw_support/port/esp32h2/pmu_init.c
index 0548461a2bb4..2978714b3c90 100644
--- a/components/esp_hw_support/port/esp32h2/pmu_init.c
+++ b/components/esp_hw_support/port/esp32h2/pmu_init.c
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -24,13 +24,13 @@ typedef struct {
     const pmu_hp_system_power_param_t     *power;
     const pmu_hp_system_clock_param_t     *clock;
     const pmu_hp_system_digital_param_t   *digital;
-    const pmu_hp_system_analog_param_t    *analog;
+    pmu_hp_system_analog_param_t          *analog;    //param determined at runtime
     const pmu_hp_system_retention_param_t *retent;
 } pmu_hp_system_param_t;
 
 typedef struct {
     const pmu_lp_system_power_param_t  *power;
-    const pmu_lp_system_analog_param_t *analog;
+    pmu_lp_system_analog_param_t       *analog;    //param determined at runtime
 } pmu_lp_system_param_t;
 
 pmu_context_t * __attribute__((weak)) IRAM_ATTR PMU_instance(void)
@@ -43,7 +43,7 @@ pmu_context_t * __attribute__((weak)) IRAM_ATTR PMU_instance(void)
     return &pmu_context;
 }
 
-void pmu_hp_system_init(pmu_context_t *ctx, pmu_hp_mode_t mode, pmu_hp_system_param_t *param)
+void pmu_hp_system_init(pmu_context_t *ctx, pmu_hp_mode_t mode, const pmu_hp_system_param_t *param)
 {
     const pmu_hp_system_power_param_t *power = param->power;
     const pmu_hp_system_clock_param_t *clock = param->clock;
@@ -102,7 +102,7 @@ void pmu_hp_system_init(pmu_context_t *ctx, pmu_hp_mode_t mode, pmu_hp_system_pa
     pmu_ll_hp_set_sleep_protect_mode(ctx->hal->dev, PMU_SLEEP_PROTECT_HP_LP_SLEEP);
 }
 
-void pmu_lp_system_init(pmu_context_t *ctx, pmu_lp_mode_t mode, pmu_lp_system_param_t *param)
+void pmu_lp_system_init(pmu_context_t *ctx, pmu_lp_mode_t mode, const pmu_lp_system_param_t *param)
 {
     const pmu_lp_system_power_param_t *power = param->power;
     const pmu_lp_system_analog_param_t *anlg = param->analog;
@@ -157,18 +157,26 @@ static inline void pmu_power_domain_force_default(pmu_context_t *ctx)
 
 static inline void pmu_hp_system_param_default(pmu_hp_mode_t mode, pmu_hp_system_param_t *param)
 {
+    assert (param->analog);
+
     param->power = pmu_hp_system_power_param_default(mode);
     param->clock = pmu_hp_system_clock_param_default(mode);
     param->digital = pmu_hp_system_digital_param_default(mode);
-    param->analog = pmu_hp_system_analog_param_default(mode);
+    *param->analog = *pmu_hp_system_analog_param_default(mode); //copy default value
     param->retent = pmu_hp_system_retention_param_default(mode);
+
+    if (mode == PMU_MODE_HP_ACTIVE || mode == PMU_MODE_HP_MODEM) {
+        param->analog->regulator0.dbias = get_act_hp_dbias();
+    }
 }
 
 static void pmu_hp_system_init_default(pmu_context_t *ctx)
 {
     assert(ctx);
-    pmu_hp_system_param_t param = { 0 };
     for (pmu_hp_mode_t mode = PMU_MODE_HP_ACTIVE; mode < PMU_MODE_HP_MAX; mode++) {
+        pmu_hp_system_analog_param_t analog = {};
+        pmu_hp_system_param_t param = {.analog = &analog};
+
         pmu_hp_system_param_default(mode, &param);
         pmu_hp_system_init(ctx, mode, &param);
     }
@@ -176,15 +184,23 @@ static void pmu_hp_system_init_default(pmu_context_t *ctx)
 
 static inline void pmu_lp_system_param_default(pmu_lp_mode_t mode, pmu_lp_system_param_t *param)
 {
+    assert (param->analog);
+
     param->power = pmu_lp_system_power_param_default(mode);
-    param->analog = pmu_lp_system_analog_param_default(mode);
+    *param->analog = *pmu_lp_system_analog_param_default(mode); //copy default value
+
+    if (mode == PMU_MODE_LP_ACTIVE) {
+        param->analog->regulator0.dbias = get_act_lp_dbias();
+    }
 }
 
 static void pmu_lp_system_init_default(pmu_context_t *ctx)
 {
     assert(ctx);
-    pmu_lp_system_param_t param;
     for (pmu_lp_mode_t mode = PMU_MODE_LP_ACTIVE; mode < PMU_MODE_LP_MAX; mode++) {
+        pmu_lp_system_analog_param_t analog = {};
+        pmu_lp_system_param_t param = {.analog = &analog};
+
         pmu_lp_system_param_default(mode, &param);
         pmu_lp_system_init(ctx, mode, &param);
     }
diff --git a/components/esp_hw_support/port/esp32h2/pmu_param.c b/components/esp_hw_support/port/esp32h2/pmu_param.c
index b0662d50f714..d052a766638b 100644
--- a/components/esp_hw_support/port/esp32h2/pmu_param.c
+++ b/components/esp_hw_support/port/esp32h2/pmu_param.c
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -12,6 +12,11 @@
 #include "pmu_param.h"
 #include "soc/pmu_icg_mapping.h"
 #include "esp_private/esp_pmu.h"
+#include "hal/efuse_ll.h"
+#include "hal/efuse_hal.h"
+#include "esp_hw_log.h"
+
+static __attribute__((unused)) const char *TAG = "pmu_param";
 
 #ifndef ARRAY_SIZE
 #define ARRAY_SIZE(a)   (sizeof(a) / sizeof((a)[0]))
@@ -212,7 +217,7 @@ const pmu_hp_system_digital_param_t * pmu_hp_system_digital_param_default(pmu_hp
         .xpd             = 1,   \
         .slp_mem_dbias   = 0, \
         .slp_logic_dbias = 0, \
-        .dbias           = HP_CALI_DBIAS \
+        .dbias           = HP_CALI_DBIAS_DEFAULT \
     }, \
     .regulator1 = {             \
         .drv_b           = 0x1a \
@@ -232,7 +237,7 @@ const pmu_hp_system_digital_param_t * pmu_hp_system_digital_param_default(pmu_hp
         .xpd             = 1,   \
         .slp_mem_dbias   = 0, \
         .slp_logic_dbias = 0, \
-        .dbias           = HP_CALI_DBIAS  \
+        .dbias           = HP_CALI_DBIAS_DEFAULT  \
     }, \
     .regulator1 = {             \
         .drv_b           = 0x1b \
@@ -269,7 +274,6 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
     assert(mode < ARRAY_SIZE(hp_analog));
     return &hp_analog[mode];
 }
-
 #define PMU_HP_RETENTION_REGDMA_CONFIG(dir, entry)  ((((dir)<<2) | (entry & 0x3)) & 0x7)
 
 #define PMU_HP_ACTIVE_RETENTION_CONFIG_DEFAULT() {  \
@@ -409,7 +413,7 @@ const pmu_lp_system_power_param_t * pmu_lp_system_power_param_default(pmu_lp_mod
         .slp_xpd    = 0,    \
         .xpd        = 1,    \
         .slp_dbias  = 0,  \
-        .dbias      = LP_CALI_DBIAS  \
+        .dbias      = LP_CALI_DBIAS_DEFAULT  \
     }, \
     .regulator1 = {         \
         .drv_b      = 0     \
@@ -442,3 +446,53 @@ const pmu_lp_system_analog_param_t * pmu_lp_system_analog_param_default(pmu_lp_m
     assert(mode < ARRAY_SIZE(lp_analog));
     return &lp_analog[mode];
 }
+
+uint32_t get_act_hp_dbias(void)
+{
+    /* hp_cali_dbias is read from efuse to ensure that the hp_active_voltage is close to 0.93V */
+    unsigned blk_version = efuse_hal_blk_version();
+    uint32_t hp_cali_dbias = HP_CALI_DBIAS_DEFAULT;
+    if (blk_version >= 3) {
+        hp_cali_dbias = efuse_ll_get_active_hp_dbias();
+        if (hp_cali_dbias != 0) {
+            //efuse dbias need to add 2 to meet the CPU frequency switching
+            if (hp_cali_dbias + 2 > 31) {
+                hp_cali_dbias = 31;
+            } else {
+                hp_cali_dbias += 2;
+            }
+        } else {
+            hp_cali_dbias = HP_CALI_DBIAS_DEFAULT;
+            ESP_HW_LOGD(TAG, "hp_cali_dbias not burnt in efuse or wrong value was burnt in blk version: %d\n", blk_version);
+        }
+    } else {
+        ESP_HW_LOGD(TAG, "blk_version is less than 3, act dbias not burnt in efuse\n");
+    }
+
+    return hp_cali_dbias;
+}
+
+uint32_t get_act_lp_dbias(void)
+{
+    /* lp_cali_dbias are read from efuse to ensure that the lp_active_voltage is close to 0.925V */
+    unsigned blk_version = efuse_hal_blk_version();
+    uint32_t lp_cali_dbias = LP_CALI_DBIAS_DEFAULT;
+    if (blk_version >= 3) {
+        lp_cali_dbias = efuse_ll_get_active_lp_dbias();
+        if (lp_cali_dbias != 0) {
+            //efuse dbias need to add 2 to meet the CPU frequency switching
+            if (lp_cali_dbias + 2 > 31) {
+                lp_cali_dbias = 31;
+            } else {
+                lp_cali_dbias += 2;
+            }
+        } else {
+            lp_cali_dbias = LP_CALI_DBIAS_DEFAULT;
+            ESP_HW_LOGD(TAG, "lp_cali_dbias not burnt in efuse or wrong value was burnt in blk version: %d\n", blk_version);
+        }
+    } else {
+        ESP_HW_LOGD(TAG, "blk_version is less than 3, act dbias not burnt in efuse\n");
+    }
+
+    return lp_cali_dbias;
+}
diff --git a/components/esp_hw_support/port/esp32h2/pmu_sleep.c b/components/esp_hw_support/port/esp32h2/pmu_sleep.c
index 80c39d80d5f3..5c2b902523e9 100644
--- a/components/esp_hw_support/port/esp32h2/pmu_sleep.c
+++ b/components/esp_hw_support/port/esp32h2/pmu_sleep.c
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -17,10 +17,34 @@
 #include "hal/lp_aon_hal.h"
 #include "esp_private/esp_pmu.h"
 #include "pmu_param.h"
+#include "hal/efuse_ll.h"
+#include "hal/efuse_hal.h"
+#include "esp_hw_log.h"
+
+static __attribute__((unused)) const char *TAG = "pmu_sleep";
 
 #define HP(state)   (PMU_MODE_HP_ ## state)
 #define LP(state)   (PMU_MODE_LP_ ## state)
 
+uint32_t get_slp_lp_dbias(void)
+{
+    /* pmu_lp_dbias_sleep_0v7 is read from efuse to ensure that the HP_LDO_voltage is close to 0.68V,
+    ** and the LP_LDO_voltage is close to 0.73V
+    */
+    uint32_t pmu_lp_dbias_sleep_0v7 = PMU_LP_DBIAS_SLEEP_0V7_DEFAULT;
+    unsigned blk_version = efuse_hal_blk_version();
+    if (blk_version >= 3) {
+        pmu_lp_dbias_sleep_0v7 = efuse_ll_get_dslp_dbias();
+        if (pmu_lp_dbias_sleep_0v7 == 0) {
+            pmu_lp_dbias_sleep_0v7 = PMU_LP_DBIAS_SLEEP_0V7_DEFAULT;
+            ESP_HW_LOGD(TAG, "slp dbias not burnt in efuse or wrong value was burnt in blk version: %d\n", blk_version);
+        }
+    } else {
+        ESP_HW_LOGD(TAG, "blk_version is less than 3, slp dbias not burnt in efuse\n");
+    }
+
+    return pmu_lp_dbias_sleep_0v7;
+}
 
 void pmu_sleep_enable_regdma_backup(void)
 {
@@ -122,21 +146,24 @@ const pmu_sleep_config_t* pmu_sleep_config_default(
 
     if (dslp) {
         pmu_sleep_analog_config_t analog_default = PMU_SLEEP_ANALOG_DSLP_CONFIG_DEFAULT(pd_flags);
+        analog_default.lp_sys[LP(SLEEP)].analog.dbias = get_slp_lp_dbias();
         config->analog = analog_default;
     } else {
         pmu_sleep_digital_config_t digital_default = PMU_SLEEP_DIGITAL_LSLP_CONFIG_DEFAULT(pd_flags);
         config->digital = digital_default;
 
         pmu_sleep_analog_config_t analog_default = PMU_SLEEP_ANALOG_LSLP_CONFIG_DEFAULT(pd_flags);
+        analog_default.hp_sys.analog.dbias = PMU_HP_DBIAS_LIGHTSLEEP_0V6_DEFAULT;
+        analog_default.lp_sys[LP(SLEEP)].analog.dbias = get_slp_lp_dbias();
         if (!(pd_flags & PMU_SLEEP_PD_XTAL)){
             analog_default.hp_sys.analog.xpd_trx = PMU_XPD_TRX_SLEEP_ON;
-            analog_default.hp_sys.analog.dbias = HP_CALI_DBIAS;
+            analog_default.hp_sys.analog.dbias = get_act_hp_dbias();
             analog_default.hp_sys.analog.pd_cur = PMU_PD_CUR_SLEEP_ON;
             analog_default.hp_sys.analog.bias_sleep = PMU_BIASSLP_SLEEP_ON;
 
             analog_default.lp_sys[LP(SLEEP)].analog.pd_cur = PMU_PD_CUR_SLEEP_ON;
             analog_default.lp_sys[LP(SLEEP)].analog.bias_sleep = PMU_BIASSLP_SLEEP_ON;
-            analog_default.lp_sys[LP(SLEEP)].analog.dbias = LP_CALI_DBIAS;
+            analog_default.lp_sys[LP(SLEEP)].analog.dbias = get_act_lp_dbias();
         }
         config->analog = analog_default;
     }
diff --git a/components/esp_hw_support/port/esp32h2/private_include/pmu_param.h b/components/esp_hw_support/port/esp32h2/private_include/pmu_param.h
index f66827d0a0ad..58fbf97ff48b 100644
--- a/components/esp_hw_support/port/esp32h2/private_include/pmu_param.h
+++ b/components/esp_hw_support/port/esp32h2/private_include/pmu_param.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -16,8 +16,8 @@
 extern "C" {
 #endif
 
-#define HP_CALI_DBIAS   17
-#define LP_CALI_DBIAS   18
+#define HP_CALI_DBIAS_DEFAULT   17
+#define LP_CALI_DBIAS_DEFAULT   18
 
 // FOR  XTAL FORCE PU IN SLEEP
 #define PMU_PD_CUR_SLEEP_ON    0
@@ -38,8 +38,8 @@ extern "C" {
 #define PMU_HP_DRVB_LIGHTSLEEP      0xFFFFF8
 #define PMU_LP_DRVB_LIGHTSLEEP      0
 
-#define PMU_HP_DBIAS_LIGHTSLEEP_0V6 1
-#define PMU_LP_DBIAS_LIGHTSLEEP_0V7 6
+#define PMU_HP_DBIAS_LIGHTSLEEP_0V6_DEFAULT 1
+#define PMU_LP_DBIAS_SLEEP_0V7_DEFAULT      6
 
 #define PMU_REGDMA_S2A_WORK_TIME_PD_TOP_US     0
 // The current value of this depends on the restoration time overhead of the longest chain in regdma
@@ -48,7 +48,9 @@ extern "C" {
 // FOR DEEPSLEEP
 #define PMU_HP_XPD_DEEPSLEEP    0
 #define PMU_LP_DRVB_DEEPSLEEP   7
-#define PMU_LP_DBIAS_DEEPSLEEP_0V7      PMU_LP_DBIAS_LIGHTSLEEP_0V7
+
+uint32_t get_act_hp_dbias(void);
+uint32_t get_act_lp_dbias(void);
 
 typedef struct {
     pmu_hp_dig_power_reg_t  dig_power;
@@ -333,7 +335,7 @@ typedef struct {
             .pd_cur          = PMU_PD_CUR_SLEEP_DEFAULT,    \
             .bias_sleep      = PMU_BIASSLP_SLEEP_DEFAULT,   \
             .xpd             = PMU_HP_XPD_LIGHTSLEEP,       \
-            .dbias           = PMU_HP_DBIAS_LIGHTSLEEP_0V6  \
+            .dbias           = PMU_HP_DBIAS_LIGHTSLEEP_0V6_DEFAULT  \
         }                                                   \
     },                                                      \
     .lp_sys[PMU_MODE_LP_SLEEP] = {                          \
@@ -344,7 +346,7 @@ typedef struct {
             .slp_xpd       = PMU_LP_SLP_XPD_SLEEP_DEFAULT,  \
             .slp_dbias     = PMU_LP_SLP_DBIAS_SLEEP_DEFAULT,\
             .xpd           = PMU_LP_XPD_SLEEP_DEFAULT,      \
-            .dbias         = PMU_LP_DBIAS_LIGHTSLEEP_0V7    \
+            .dbias         = PMU_LP_DBIAS_SLEEP_0V7_DEFAULT   \
         }                                                   \
     }                                                       \
 }
@@ -366,7 +368,7 @@ typedef struct {
             .slp_xpd       = PMU_LP_SLP_XPD_SLEEP_DEFAULT,  \
             .slp_dbias     = PMU_LP_SLP_DBIAS_SLEEP_DEFAULT,\
             .xpd           = PMU_LP_XPD_SLEEP_DEFAULT,      \
-            .dbias         = PMU_LP_DBIAS_DEEPSLEEP_0V7     \
+            .dbias         = PMU_LP_DBIAS_SLEEP_0V7_DEFAULT    \
         }                                                   \
     }                                                       \
 }
diff --git a/components/esp_hw_support/port/esp32h2/rtc_clk_init.c b/components/esp_hw_support/port/esp32h2/rtc_clk_init.c
index 02d8b9bc4a3e..c01cd139476e 100644
--- a/components/esp_hw_support/port/esp32h2/rtc_clk_init.c
+++ b/components/esp_hw_support/port/esp32h2/rtc_clk_init.c
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -43,8 +43,13 @@ void rtc_clk_init(rtc_clk_config_t cfg)
     REG_SET_FIELD(LP_CLKRST_RC32K_CNTL_REG, LP_CLKRST_RC32K_DFREQ, cfg.rc32k_dfreq);
     REGI2C_WRITE_MASK(I2C_PMU, I2C_PMU_EN_I2C_RTC_DREG, 0);
     REGI2C_WRITE_MASK(I2C_PMU, I2C_PMU_EN_I2C_DIG_DREG, 0);
-    REG_SET_FIELD(PMU_HP_ACTIVE_HP_REGULATOR0_REG, PMU_HP_ACTIVE_HP_REGULATOR_DBIAS, HP_CALI_DBIAS);
-    REG_SET_FIELD(PMU_HP_SLEEP_LP_REGULATOR0_REG, PMU_HP_SLEEP_LP_REGULATOR_DBIAS, LP_CALI_DBIAS);
+
+    uint32_t hp_cali_dbias = get_act_hp_dbias();
+    uint32_t lp_cali_dbias = get_act_lp_dbias();
+
+    SET_PERI_REG_BITS(PMU_HP_MODEM_HP_REGULATOR0_REG, PMU_HP_MODEM_HP_REGULATOR_DBIAS, hp_cali_dbias, PMU_HP_MODEM_HP_REGULATOR_DBIAS_S);
+    SET_PERI_REG_BITS(PMU_HP_ACTIVE_HP_REGULATOR0_REG, PMU_HP_ACTIVE_HP_REGULATOR_DBIAS, hp_cali_dbias, PMU_HP_ACTIVE_HP_REGULATOR_DBIAS_S);
+    SET_PERI_REG_BITS(PMU_HP_SLEEP_LP_REGULATOR0_REG, PMU_HP_SLEEP_LP_REGULATOR_DBIAS, lp_cali_dbias, PMU_HP_SLEEP_LP_REGULATOR_DBIAS_S);
 
     clk_ll_rc_fast_tick_conf();
 
diff --git a/components/hal/efuse_hal.c b/components/hal/efuse_hal.c
index 8d94e82641b9..68e06d530a8b 100644
--- a/components/hal/efuse_hal.c
+++ b/components/hal/efuse_hal.c
@@ -24,7 +24,7 @@ IRAM_ATTR uint32_t efuse_hal_chip_revision(void)
     return efuse_hal_get_major_chip_version() * 100 + efuse_hal_get_minor_chip_version();
 }
 
-uint32_t efuse_hal_blk_version(void)
+IRAM_ATTR uint32_t efuse_hal_blk_version(void)
 {
     return efuse_ll_get_blk_version_major() * 100 + efuse_ll_get_blk_version_minor();
 }
diff --git a/components/hal/esp32h2/include/hal/efuse_ll.h b/components/hal/esp32h2/include/hal/efuse_ll.h
index 8adf2a4ce134..d2aa40fcb358 100644
--- a/components/hal/esp32h2/include/hal/efuse_ll.h
+++ b/components/hal/esp32h2/include/hal/efuse_ll.h
@@ -40,6 +40,26 @@ __attribute__((always_inline)) static inline uint32_t efuse_ll_get_mac1(void)
     return EFUSE.rd_mac_sys_1.mac_1;
 }
 
+__attribute__((always_inline)) static inline uint32_t efuse_ll_get_active_hp_dbias(void)
+{
+    return EFUSE.rd_mac_sys_2.active_hp_dbias;
+}
+
+__attribute__((always_inline)) static inline uint32_t efuse_ll_get_active_lp_dbias(void)
+{
+    return EFUSE.rd_mac_sys_2.active_lp_dbias;
+}
+
+__attribute__((always_inline)) static inline uint32_t efuse_ll_get_dslp_dbias(void)
+{
+    return EFUSE.rd_mac_sys_2.dslp_dbias;
+}
+
+__attribute__((always_inline)) static inline int32_t efuse_ll_get_dbias_vol_gap(void)
+{
+    return (EFUSE.rd_mac_sys_3.dbias_vol_gap_sign << 4)|(EFUSE.rd_mac_sys_3.dbias_vol_gap_value2 << 1)|EFUSE.rd_mac_sys_2.dbias_vol_gap_value1;
+}
+
 __attribute__((always_inline)) static inline bool efuse_ll_get_secure_boot_v2_en(void)
 {
     return EFUSE.rd_repeat_data2.secure_boot_en;
diff --git a/components/soc/esp32c6/include/soc/efuse_reg.h b/components/soc/esp32c6/include/soc/efuse_reg.h
index 6caf63d89001..882041ac4137 100644
--- a/components/soc/esp32c6/include/soc/efuse_reg.h
+++ b/components/soc/esp32c6/include/soc/efuse_reg.h
@@ -1,5 +1,5 @@
 /**
- * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
  *
  *  SPDX-License-Identifier: Apache-2.0
  */
@@ -650,20 +650,62 @@ extern "C" {
  *  BLOCK1 data register $n.
  */
 #define EFUSE_RD_MAC_SPI_SYS_2_REG (DR_REG_EFUSE_BASE + 0x4c)
-/** EFUSE_MAC_SPI_RESERVED : RO; bitpos: [13:0]; default: 0;
- *  Reserved.
- */
-#define EFUSE_MAC_SPI_RESERVED    0x00003FFFU
-#define EFUSE_MAC_SPI_RESERVED_M  (EFUSE_MAC_SPI_RESERVED_V << EFUSE_MAC_SPI_RESERVED_S)
-#define EFUSE_MAC_SPI_RESERVED_V  0x00003FFFU
-#define EFUSE_MAC_SPI_RESERVED_S  0
-/** EFUSE_SPI_PAD_CONF_1 : RO; bitpos: [31:14]; default: 0;
+/** EFUSE_ACTIVE_HP_DBIAS : RO; bitpos: [4:0]; default: 0;
+ *  Stores the active hp dbias.
+ */
+#define EFUSE_ACTIVE_HP_DBIAS    0x0000001FU
+#define EFUSE_ACTIVE_HP_DBIAS_M  (EFUSE_ACTIVE_HP_DBIAS_V << EFUSE_ACTIVE_HP_DBIAS_S)
+#define EFUSE_ACTIVE_HP_DBIAS_V  0x0000001FU
+#define EFUSE_ACTIVE_HP_DBIAS_S  0
+/** EFUSE_ACTIVE_LP_DBIAS : RO; bitpos: [9:5]; default: 0;
+ *  Stores the active lp dbias.
+ */
+#define EFUSE_ACTIVE_LP_DBIAS    0x0000001FU
+#define EFUSE_ACTIVE_LP_DBIAS_M  (EFUSE_ACTIVE_LP_DBIAS_V << EFUSE_ACTIVE_LP_DBIAS_S)
+#define EFUSE_ACTIVE_LP_DBIAS_V  0x0000001FU
+#define EFUSE_ACTIVE_LP_DBIAS_S  5
+/** EFUSE_LSLP_HP_DBG : RO; bitpos: [11:10]; default: 0;
+ *  Stores the lslp hp dbg.
+ */
+#define EFUSE_LSLP_HP_DBG    0x00000003U
+#define EFUSE_LSLP_HP_DBG_M  (EFUSE_LSLP_HP_DBG_V << EFUSE_LSLP_HP_DBG_S)
+#define EFUSE_LSLP_HP_DBG_V  0x00000003U
+#define EFUSE_LSLP_HP_DBG_S  10
+/** EFUSE_LSLP_HP_DBIAS : RO; bitpos: [15:12]; default: 0;
+ *  Stores the lslp hp dbias.
+ */
+#define EFUSE_LSLP_HP_DBIAS    0x0000000FU
+#define EFUSE_LSLP_HP_DBIAS_M  (EFUSE_LSLP_HP_DBIAS_V << EFUSE_LSLP_HP_DBIAS_S)
+#define EFUSE_LSLP_HP_DBIAS_V  0x0000000FU
+#define EFUSE_LSLP_HP_DBIAS_S  12
+/** EFUSE_DSLP_LP_DBG : RO; bitpos: [18:16]; default: 0;
+ *  Stores the dslp lp dbg.
+ */
+#define EFUSE_DSLP_LP_DBG    0x00000007U
+#define EFUSE_DSLP_LP_DBG_M  (EFUSE_DSLP_LP_DBG_V << EFUSE_DSLP_LP_DBG_S)
+#define EFUSE_DSLP_LP_DBG_V  0x00000007U
+#define EFUSE_DSLP_LP_DBG_S  16
+/** EFUSE_DSLP_LP_DBIAS : RO; bitpos: [22:19]; default: 0;
+ *  Stores the dslp lp dbias.
+ */
+#define EFUSE_DSLP_LP_DBIAS    0x0000000FU
+#define EFUSE_DSLP_LP_DBIAS_M  (EFUSE_DSLP_LP_DBIAS_V << EFUSE_DSLP_LP_DBIAS_S)
+#define EFUSE_DSLP_LP_DBIAS_V  0x0000000FU
+#define EFUSE_DSLP_LP_DBIAS_S  19
+/** EFUSE_DBIAS_VOL_GAP : RO; bitpos: [27:23]; default: 0;
+ *  Stores the hp and lp dbias vol gap.
+ */
+#define EFUSE_DBIAS_VOL_GAP    0x0000001FU
+#define EFUSE_DBIAS_VOL_GAP_M  (EFUSE_DBIAS_VOL_GAP_V << EFUSE_DBIAS_VOL_GAP_S)
+#define EFUSE_DBIAS_VOL_GAP_V  0x0000001FU
+#define EFUSE_DBIAS_VOL_GAP_S  23
+/** EFUSE_SPI_PAD_CONF_1 : RO; bitpos: [31:28]; default: 0;
  *  Stores the first part of SPI_PAD_CONF.
  */
-#define EFUSE_SPI_PAD_CONF_1    0x0003FFFFU
+#define EFUSE_SPI_PAD_CONF_1    0x0000000FU
 #define EFUSE_SPI_PAD_CONF_1_M  (EFUSE_SPI_PAD_CONF_1_V << EFUSE_SPI_PAD_CONF_1_S)
-#define EFUSE_SPI_PAD_CONF_1_V  0x0003FFFFU
-#define EFUSE_SPI_PAD_CONF_1_S  14
+#define EFUSE_SPI_PAD_CONF_1_V  0x0000000FU
+#define EFUSE_SPI_PAD_CONF_1_S  28
 
 /** EFUSE_RD_MAC_SPI_SYS_3_REG register
  *  BLOCK1 data register $n.
diff --git a/components/soc/esp32c6/include/soc/efuse_struct.h b/components/soc/esp32c6/include/soc/efuse_struct.h
index 08a60cf5b142..e6971b4d5836 100644
--- a/components/soc/esp32c6/include/soc/efuse_struct.h
+++ b/components/soc/esp32c6/include/soc/efuse_struct.h
@@ -1,5 +1,5 @@
 /**
- * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
  *
  *  SPDX-License-Identifier: Apache-2.0
  */
@@ -509,14 +509,38 @@ typedef union {
  */
 typedef union {
     struct {
-        /** mac_spi_reserved : RO; bitpos: [13:0]; default: 0;
-         *  Reserved.
+        /** active_hp_dbias : RO; bitpos: [4:0]; default: 0;
+         *  Stores the active hp dbias.
+         */
+        uint32_t active_hp_dbias:5;
+        /** active_lp_dbias : RO; bitpos: [9:5]; default: 0;
+         *  Stores the active lp dbias.
+         */
+        uint32_t active_lp_dbias:5;
+        /** lslp_hp_dbg : RO; bitpos: [11:10]; default: 0;
+         *  Stores the lslp hp dbg.
+         */
+        uint32_t lslp_hp_dbg:2;
+        /** lslp_hp_dbias : RO; bitpos: [15:12]; default: 0;
+         *  Stores the lslp hp dbias.
+         */
+        uint32_t lslp_hp_dbias:4;
+        /** dslp_lp_dbg : RO; bitpos: [18:16]; default: 0;
+         *  Stores the dslp lp dbg.
+         */
+        uint32_t dslp_lp_dbg:3;
+        /** dslp_lp_dbias : RO; bitpos: [22:19]; default: 0;
+         *  Stores the dslp lp dbias.
+         */
+        uint32_t dslp_lp_dbias:4;
+        /** dbias_vol_gap : RO; bitpos: [27:23]; default: 0;
+         *  Stores the hp and lp dbias vol gap.
          */
-        uint32_t mac_spi_reserved:14;
-        /** spi_pad_conf_1 : RO; bitpos: [31:14]; default: 0;
+        uint32_t dbias_vol_gap:5;
+        /** spi_pad_conf_1 : RO; bitpos: [31:28]; default: 0;
          *  Stores the first part of SPI_PAD_CONF.
          */
-        uint32_t spi_pad_conf_1:18;
+        uint32_t spi_pad_conf_1:4;
     };
     uint32_t val;
 } efuse_rd_mac_spi_sys_2_reg_t;
diff --git a/components/soc/esp32h2/include/soc/efuse_reg.h b/components/soc/esp32h2/include/soc/efuse_reg.h
index e1076c8e44a5..532514d58761 100644
--- a/components/soc/esp32h2/include/soc/efuse_reg.h
+++ b/components/soc/esp32h2/include/soc/efuse_reg.h
@@ -1,5 +1,5 @@
 /**
- * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
  *
  *  SPDX-License-Identifier: Apache-2.0
  */
@@ -612,60 +612,119 @@ extern "C" {
  *  BLOCK1 data register $n.
  */
 #define EFUSE_RD_MAC_SYS_2_REG (DR_REG_EFUSE_BASE + 0x4c)
-/** EFUSE_MAC_RESERVED_1 : RO; bitpos: [13:0]; default: 0;
- *  Reserved.
- */
-#define EFUSE_MAC_RESERVED_1    0x00003FFFU
-#define EFUSE_MAC_RESERVED_1_M  (EFUSE_MAC_RESERVED_1_V << EFUSE_MAC_RESERVED_1_S)
-#define EFUSE_MAC_RESERVED_1_V  0x00003FFFU
-#define EFUSE_MAC_RESERVED_1_S  0
-/** EFUSE_MAC_RESERVED_0 : RO; bitpos: [31:14]; default: 0;
- *  Reserved.
- */
-#define EFUSE_MAC_RESERVED_0    0x0003FFFFU
-#define EFUSE_MAC_RESERVED_0_M  (EFUSE_MAC_RESERVED_0_V << EFUSE_MAC_RESERVED_0_S)
-#define EFUSE_MAC_RESERVED_0_V  0x0003FFFFU
-#define EFUSE_MAC_RESERVED_0_S  14
+/** EFUSE_RXIQ_VERSION : RO; bitpos: [2:0]; default: 0;
+ *  Stores RF Calibration data. RXIQ version.
+ */
+#define EFUSE_RXIQ_VERSION    0x00000007U
+#define EFUSE_RXIQ_VERSION_M  (EFUSE_RXIQ_VERSION_V << EFUSE_RXIQ_VERSION_S)
+#define EFUSE_RXIQ_VERSION_V  0x00000007U
+#define EFUSE_RXIQ_VERSION_S  0
+/** EFUSE_RXIQ_0 : RO; bitpos: [9:3]; default: 0;
+ *  Stores RF Calibration data. RXIQ data 0.
+ */
+#define EFUSE_RXIQ_0    0x0000007FU
+#define EFUSE_RXIQ_0_M  (EFUSE_RXIQ_0_V << EFUSE_RXIQ_0_S)
+#define EFUSE_RXIQ_0_V  0x0000007FU
+#define EFUSE_RXIQ_0_S  3
+/** EFUSE_RXIQ_1 : RO; bitpos: [16:10]; default: 0;
+ *  Stores RF Calibration data. RXIQ data 1.
+ */
+#define EFUSE_RXIQ_1    0x0000007FU
+#define EFUSE_RXIQ_1_M  (EFUSE_RXIQ_1_V << EFUSE_RXIQ_1_S)
+#define EFUSE_RXIQ_1_V  0x0000007FU
+#define EFUSE_RXIQ_1_S  10
+/** EFUSE_ACTIVE_HP_DBIAS : RO; bitpos: [21:17]; default: 0;
+ *  Stores the PMU active hp dbias.
+ */
+#define EFUSE_ACTIVE_HP_DBIAS    0x0000001FU
+#define EFUSE_ACTIVE_HP_DBIAS_M  (EFUSE_ACTIVE_HP_DBIAS_V << EFUSE_ACTIVE_HP_DBIAS_S)
+#define EFUSE_ACTIVE_HP_DBIAS_V  0x0000001FU
+#define EFUSE_ACTIVE_HP_DBIAS_S  17
+/** EFUSE_ACTIVE_LP_DBIAS : RO; bitpos: [26:22]; default: 0;
+ *  Stores the PMU active lp dbias.
+ */
+#define EFUSE_ACTIVE_LP_DBIAS    0x0000001FU
+#define EFUSE_ACTIVE_LP_DBIAS_M  (EFUSE_ACTIVE_LP_DBIAS_V << EFUSE_ACTIVE_LP_DBIAS_S)
+#define EFUSE_ACTIVE_LP_DBIAS_V  0x0000001FU
+#define EFUSE_ACTIVE_LP_DBIAS_S  22
+/** EFUSE_DSLP_DBIAS : RO; bitpos: [30:27]; default: 0;
+ *  Stores the PMU sleep dbias.
+ */
+#define EFUSE_DSLP_DBIAS    0x0000000FU
+#define EFUSE_DSLP_DBIAS_M  (EFUSE_DSLP_DBIAS_V << EFUSE_DSLP_DBIAS_S)
+#define EFUSE_DSLP_DBIAS_V  0x0000000FU
+#define EFUSE_DSLP_DBIAS_S  27
+/** EFUSE_DBIAS_VOL_GAP_VALUE1 : RO; bitpos: [31]; default: 0;
+ *  Stores the low 1 bit of dbias_vol_gap.
+ */
+#define EFUSE_DBIAS_VOL_GAP_VALUE1    (BIT(31))
+#define EFUSE_DBIAS_VOL_GAP_VALUE1_M  (EFUSE_DBIAS_VOL_GAP_VALUE1_V << EFUSE_DBIAS_VOL_GAP_VALUE1_S)
+#define EFUSE_DBIAS_VOL_GAP_VALUE1_V  0x00000001U
+#define EFUSE_DBIAS_VOL_GAP_VALUE1_S  31
 
 /** EFUSE_RD_MAC_SYS_3_REG register
  *  BLOCK1 data register $n.
  */
 #define EFUSE_RD_MAC_SYS_3_REG (DR_REG_EFUSE_BASE + 0x50)
-/** EFUSE_MAC_RESERVED_2 : RO; bitpos: [17:0]; default: 0;
+/** EFUSE_DBIAS_VOL_GAP_VALUE2 : RO; bitpos: [2:0]; default: 0;
+ *  Stores the high 3 bits of dbias_vol_gap.
+ */
+#define EFUSE_DBIAS_VOL_GAP_VALUE2    0x00000007U
+#define EFUSE_DBIAS_VOL_GAP_VALUE2_M  (EFUSE_DBIAS_VOL_GAP_VALUE2_V << EFUSE_DBIAS_VOL_GAP_VALUE2_S)
+#define EFUSE_DBIAS_VOL_GAP_VALUE2_V  0x00000007U
+#define EFUSE_DBIAS_VOL_GAP_VALUE2_S  0
+/** EFUSE_DBIAS_VOL_GAP_SIGN : RO; bitpos: [3]; default: 0;
+ *  Stores the sign bit of dbias_vol_gap.
+ */
+#define EFUSE_DBIAS_VOL_GAP_SIGN    (BIT(3))
+#define EFUSE_DBIAS_VOL_GAP_SIGN_M  (EFUSE_DBIAS_VOL_GAP_SIGN_V << EFUSE_DBIAS_VOL_GAP_SIGN_S)
+#define EFUSE_DBIAS_VOL_GAP_SIGN_V  0x00000001U
+#define EFUSE_DBIAS_VOL_GAP_SIGN_S  3
+/** EFUSE_MAC_RESERVED_2 : RO; bitpos: [17:4]; default: 0;
  *  Reserved.
  */
-#define EFUSE_MAC_RESERVED_2    0x0003FFFFU
+#define EFUSE_MAC_RESERVED_2    0x00003FFFU
 #define EFUSE_MAC_RESERVED_2_M  (EFUSE_MAC_RESERVED_2_V << EFUSE_MAC_RESERVED_2_S)
-#define EFUSE_MAC_RESERVED_2_V  0x0003FFFFU
-#define EFUSE_MAC_RESERVED_2_S  0
-/** EFUSE_WAFER_VERSION_MINOR : R; bitpos: [20:18]; default: 0; */
+#define EFUSE_MAC_RESERVED_2_V  0x00003FFFU
+#define EFUSE_MAC_RESERVED_2_S  4
+/** EFUSE_WAFER_VERSION_MINOR : RO; bitpos: [20:18]; default: 0;
+ *  Stores the wafer version minor.
+ */
 #define EFUSE_WAFER_VERSION_MINOR    0x00000007U
 #define EFUSE_WAFER_VERSION_MINOR_M  (EFUSE_WAFER_VERSION_MINOR_V << EFUSE_WAFER_VERSION_MINOR_S)
 #define EFUSE_WAFER_VERSION_MINOR_V  0x00000007U
 #define EFUSE_WAFER_VERSION_MINOR_S  18
-/** EFUSE_WAFER_VERSION_MAJOR : R; bitpos: [22:21]; default: 0; */
+/** EFUSE_WAFER_VERSION_MAJOR : RO; bitpos: [22:21]; default: 0;
+ *  Stores the wafer version major.
+ */
 #define EFUSE_WAFER_VERSION_MAJOR    0x00000003U
 #define EFUSE_WAFER_VERSION_MAJOR_M  (EFUSE_WAFER_VERSION_MAJOR_V << EFUSE_WAFER_VERSION_MAJOR_S)
 #define EFUSE_WAFER_VERSION_MAJOR_V  0x00000003U
 #define EFUSE_WAFER_VERSION_MAJOR_S  21
-/** EFUSE_DISABLE_WAFER_VERSION_MAJOR : R; bitpos: [23]; default: 0;
- *  Disables check of wafer version major
+/** EFUSE_DISABLE_WAFER_VERSION_MAJOR : RO; bitpos: [23]; default: 0;
+ *  Disables check of wafer version major.
  */
 #define EFUSE_DISABLE_WAFER_VERSION_MAJOR    (BIT(23))
 #define EFUSE_DISABLE_WAFER_VERSION_MAJOR_M  (EFUSE_DISABLE_WAFER_VERSION_MAJOR_V << EFUSE_DISABLE_WAFER_VERSION_MAJOR_S)
 #define EFUSE_DISABLE_WAFER_VERSION_MAJOR_V  0x00000001U
 #define EFUSE_DISABLE_WAFER_VERSION_MAJOR_S  23
-/** EFUSE_FLASH_CAP : R; bitpos: [26:24]; default: 0; */
+/** EFUSE_FLASH_CAP : RO; bitpos: [26:24]; default: 0;
+ *  Stores the flash cap.
+ */
 #define EFUSE_FLASH_CAP    0x00000007U
 #define EFUSE_FLASH_CAP_M  (EFUSE_FLASH_CAP_V << EFUSE_FLASH_CAP_S)
 #define EFUSE_FLASH_CAP_V  0x00000007U
 #define EFUSE_FLASH_CAP_S  24
-/** EFUSE_FLASH_TEMP : R; bitpos: [28:27]; default: 0; */
+/** EFUSE_FLASH_TEMP : RO; bitpos: [28:27]; default: 0;
+ *  Stores the flash temp.
+ */
 #define EFUSE_FLASH_TEMP    0x00000003U
 #define EFUSE_FLASH_TEMP_M  (EFUSE_FLASH_TEMP_V << EFUSE_FLASH_TEMP_S)
 #define EFUSE_FLASH_TEMP_V  0x00000003U
 #define EFUSE_FLASH_TEMP_S  27
-/** EFUSE_FLASH_VENDOR : R; bitpos: [31:29]; default: 0; */
+/** EFUSE_FLASH_VENDOR : RO; bitpos: [31:29]; default: 0;
+ *  Stores the flash vendor.
+ */
 #define EFUSE_FLASH_VENDOR    0x00000007U
 #define EFUSE_FLASH_VENDOR_M  (EFUSE_FLASH_VENDOR_V << EFUSE_FLASH_VENDOR_S)
 #define EFUSE_FLASH_VENDOR_V  0x00000007U
@@ -762,7 +821,7 @@ extern "C" {
 #define EFUSE_RESERVED_2_128_V  0x00000003U
 #define EFUSE_RESERVED_2_128_S  0
 /** EFUSE_BLK_VERSION_MINOR : R; bitpos: [4:2]; default: 0;
- *  BLK_VERSION_MINOR of BLOCK2
+ *  BLK_VERSION_MINOR of BLOCK2. 1: RF Calibration data in BLOCK1
  */
 #define EFUSE_BLK_VERSION_MINOR    0x00000007U
 #define EFUSE_BLK_VERSION_MINOR_M  (EFUSE_BLK_VERSION_MINOR_V << EFUSE_BLK_VERSION_MINOR_S)
diff --git a/components/soc/esp32h2/include/soc/efuse_struct.h b/components/soc/esp32h2/include/soc/efuse_struct.h
index 9abf1cc2cc28..c64eaa140c8d 100644
--- a/components/soc/esp32h2/include/soc/efuse_struct.h
+++ b/components/soc/esp32h2/include/soc/efuse_struct.h
@@ -1,5 +1,5 @@
 /**
- * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
  *
  *  SPDX-License-Identifier: Apache-2.0
  */
@@ -486,14 +486,34 @@ typedef union {
  */
 typedef union {
     struct {
-        /** mac_reserved_1 : RO; bitpos: [13:0]; default: 0;
-         *  Reserved.
+        /** rxiq_version : RO; bitpos: [2:0]; default: 0;
+         *  Stores RF Calibration data. RXIQ version.
          */
-        uint32_t mac_reserved_1:14;
-        /** mac_reserved_0 : RO; bitpos: [31:14]; default: 0;
-         *  Reserved.
+        uint32_t rxiq_version:3;
+        /** rxiq_0 : RO; bitpos: [9:3]; default: 0;
+         *  Stores RF Calibration data. RXIQ data 0.
+         */
+        uint32_t rxiq_0:7;
+        /** rxiq_1 : RO; bitpos: [16:10]; default: 0;
+         *  Stores RF Calibration data. RXIQ data 1.
+         */
+        uint32_t rxiq_1:7;
+        /** active_hp_dbias : RO; bitpos: [21:17]; default: 0;
+         *  Stores the PMU active hp dbias.
+         */
+        uint32_t active_hp_dbias:5;
+        /** active_lp_dbias : RO; bitpos: [26:22]; default: 0;
+         *  Stores the PMU active lp dbias.
+         */
+        uint32_t active_lp_dbias:5;
+        /** dslp_dbias : RO; bitpos: [30:27]; default: 0;
+         *  Stores the PMU sleep dbias.
+         */
+        uint32_t dslp_dbias:4;
+        /** dbias_vol_gap_value1 : RO; bitpos: [31]; default: 0;
+         *  Stores the low 1 bit of dbias_vol_gap.
          */
-        uint32_t mac_reserved_0:18;
+        uint32_t dbias_vol_gap_value1:1;
     };
     uint32_t val;
 } efuse_rd_mac_sys_2_reg_t;
@@ -503,23 +523,41 @@ typedef union {
  */
 typedef union {
     struct {
-        /** mac_reserved_2 : RO; bitpos: [17:0]; default: 0;
+        /** dbias_vol_gap_value2 : RO; bitpos: [2:0]; default: 0;
+         *  Stores the high 3 bits of dbias_vol_gap.
+         */
+        uint32_t dbias_vol_gap_value2:3;
+        /** dbias_vol_gap_sign : RO; bitpos: [3]; default: 0;
+         *  Stores the sign bit of dbias_vol_gap.
+         */
+        uint32_t dbias_vol_gap_sign:1;
+        /** mac_reserved_2 : RO; bitpos: [17:4]; default: 0;
          *  Reserved.
          */
-        uint32_t mac_reserved_2:18;
-        /** wafer_version_minor : R; bitpos: [20:18]; default: 0; */
+        uint32_t mac_reserved_2:14;
+        /** wafer_version_minor : RO; bitpos: [20:18]; default: 0;
+         *  Stores the wafer version minor.
+         */
         uint32_t wafer_version_minor:3;
-        /** wafer_version_major : R; bitpos: [22:21]; default: 0; */
+        /** wafer_version_major : RO; bitpos: [22:21]; default: 0;
+         *  Stores the wafer version major.
+         */
         uint32_t wafer_version_major:2;
-        /** disable_wafer_version_major : R; bitpos: [23]; default: 0;
-         *  Disables check of wafer version major
+        /** disable_wafer_version_major : RO; bitpos: [23]; default: 0;
+         *  Disables check of wafer version major.
          */
         uint32_t disable_wafer_version_major:1;
-        /** flash_cap : R; bitpos: [26:24]; default: 0; */
+        /** flash_cap : RO; bitpos: [26:24]; default: 0;
+         *  Stores the flash cap.
+         */
         uint32_t flash_cap:3;
-        /** flash_temp : R; bitpos: [28:27]; default: 0; */
+        /** flash_temp : RO; bitpos: [28:27]; default: 0;
+         *  Stores the flash temp.
+         */
         uint32_t flash_temp:2;
-        /** flash_vendor : R; bitpos: [31:29]; default: 0; */
+        /** flash_vendor : RO; bitpos: [31:29]; default: 0;
+         *  Stores the flash vendor.
+         */
         uint32_t flash_vendor:3;
     };
     uint32_t val;
@@ -617,7 +655,7 @@ typedef union {
          */
         uint32_t reserved_2_128:2;
         /** blk_version_minor : R; bitpos: [4:2]; default: 0;
-         *  BLK_VERSION_MINOR of BLOCK2
+         *  BLK_VERSION_MINOR of BLOCK2. 1: RF Calibration data in BLOCK1
          */
         uint32_t blk_version_minor:3;
         /** blk_version_major : R; bitpos: [6:5]; default: 0;