diff --git a/components/driver/i2s/i2s_common.c b/components/driver/i2s/i2s_common.c
index 1ac9c7dc9d95..2d2b52419198 100644
--- a/components/driver/i2s/i2s_common.c
+++ b/components/driver/i2s/i2s_common.c
@@ -52,17 +52,6 @@
  * Set 4092 here to align with 4-byte, so that the position of the slot data in the buffer will be relatively fixed */
 #define I2S_DMA_BUFFER_MAX_SIZE     (4092)
 
-// If ISR handler is allowed to run whilst cache is disabled,
-// Make sure all the code and related variables used by the handler are in the SRAM
-#if CONFIG_I2S_ISR_IRAM_SAFE
-#define I2S_INTR_ALLOC_FLAGS    (ESP_INTR_FLAG_IRAM | ESP_INTR_FLAG_INTRDISABLED | ESP_INTR_FLAG_SHARED | ESP_INTR_FLAG_LOWMED)
-#define I2S_MEM_ALLOC_CAPS      (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT)
-#else
-#define I2S_INTR_ALLOC_FLAGS    (ESP_INTR_FLAG_INTRDISABLED | ESP_INTR_FLAG_SHARED | ESP_INTR_FLAG_LOWMED)
-#define I2S_MEM_ALLOC_CAPS      MALLOC_CAP_DEFAULT
-#endif //CONFIG_I2S_ISR_IRAM_SAFE
-#define I2S_DMA_ALLOC_CAPS      (MALLOC_CAP_INTERNAL | MALLOC_CAP_DMA)
-
 /**
  * @brief Global i2s platform object
  * @note  For saving all the I2S related information
diff --git a/components/driver/i2s/i2s_pdm.c b/components/driver/i2s/i2s_pdm.c
index bf9ab352acf8..63b793f75c44 100644
--- a/components/driver/i2s/i2s_pdm.c
+++ b/components/driver/i2s/i2s_pdm.c
@@ -184,7 +184,7 @@ esp_err_t i2s_channel_init_pdm_tx_mode(i2s_chan_handle_t handle, const i2s_pdm_t
     }
 #endif
     ESP_GOTO_ON_ERROR(i2s_pdm_tx_set_clock(handle, &pdm_tx_cfg->clk_cfg), err, TAG, "initialize channel failed while setting clock");
-    ESP_GOTO_ON_ERROR(i2s_init_dma_intr(handle, ESP_INTR_FLAG_LEVEL1), err, TAG, "initialize dma interrupt failed");
+    ESP_GOTO_ON_ERROR(i2s_init_dma_intr(handle, I2S_INTR_ALLOC_FLAGS), err, TAG, "initialize dma interrupt failed");
 
     i2s_ll_tx_enable_pdm(handle->controller->hal.dev);
 #if SOC_I2S_HW_VERSION_2
diff --git a/components/driver/i2s/i2s_private.h b/components/driver/i2s/i2s_private.h
index 3665542cdb92..08db03abc16e 100644
--- a/components/driver/i2s/i2s_private.h
+++ b/components/driver/i2s/i2s_private.h
@@ -23,6 +23,17 @@
 extern "C" {
 #endif
 
+// If ISR handler is allowed to run whilst cache is disabled,
+// Make sure all the code and related variables used by the handler are in the SRAM
+#if CONFIG_I2S_ISR_IRAM_SAFE
+#define I2S_INTR_ALLOC_FLAGS    (ESP_INTR_FLAG_IRAM | ESP_INTR_FLAG_INTRDISABLED | ESP_INTR_FLAG_SHARED | ESP_INTR_FLAG_LOWMED)
+#define I2S_MEM_ALLOC_CAPS      (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT)
+#else
+#define I2S_INTR_ALLOC_FLAGS    (ESP_INTR_FLAG_INTRDISABLED | ESP_INTR_FLAG_SHARED | ESP_INTR_FLAG_LOWMED)
+#define I2S_MEM_ALLOC_CAPS      MALLOC_CAP_DEFAULT
+#endif //CONFIG_I2S_ISR_IRAM_SAFE
+#define I2S_DMA_ALLOC_CAPS      (MALLOC_CAP_INTERNAL | MALLOC_CAP_DMA)
+
 #define I2S_NULL_POINTER_CHECK(tag, p)          ESP_RETURN_ON_FALSE((p), ESP_ERR_INVALID_ARG, tag, "input parameter '"#p"' is NULL")
 
 /**
diff --git a/components/driver/i2s/i2s_std.c b/components/driver/i2s/i2s_std.c
index 905132d4b52c..9939891509e0 100644
--- a/components/driver/i2s/i2s_std.c
+++ b/components/driver/i2s/i2s_std.c
@@ -221,7 +221,7 @@ esp_err_t i2s_channel_init_std_mode(i2s_chan_handle_t handle, const i2s_std_conf
     }
 #endif
     ESP_GOTO_ON_ERROR(i2s_std_set_clock(handle, &std_cfg->clk_cfg), err, TAG, "initialize channel failed while setting clock");
-    ESP_GOTO_ON_ERROR(i2s_init_dma_intr(handle, ESP_INTR_FLAG_LEVEL1), err, TAG, "initialize dma interrupt failed");
+    ESP_GOTO_ON_ERROR(i2s_init_dma_intr(handle, I2S_INTR_ALLOC_FLAGS), err, TAG, "initialize dma interrupt failed");
 #if SOC_I2S_HW_VERSION_2
     /* Enable clock to start outputting mclk signal. Some codecs will reset once mclk stop */
     if (handle->dir == I2S_DIR_TX) {
diff --git a/components/driver/i2s/i2s_tdm.c b/components/driver/i2s/i2s_tdm.c
index c8bb0ca5ea6d..18ef408a1123 100644
--- a/components/driver/i2s/i2s_tdm.c
+++ b/components/driver/i2s/i2s_tdm.c
@@ -223,7 +223,7 @@ esp_err_t i2s_channel_init_tdm_mode(i2s_chan_handle_t handle, const i2s_tdm_conf
     }
 #endif
     ESP_GOTO_ON_ERROR(i2s_tdm_set_clock(handle, &tdm_cfg->clk_cfg), err, TAG, "initialize channel failed while setting clock");
-    ESP_GOTO_ON_ERROR(i2s_init_dma_intr(handle, ESP_INTR_FLAG_LEVEL1), err, TAG, "initialize dma interrupt failed");
+    ESP_GOTO_ON_ERROR(i2s_init_dma_intr(handle, I2S_INTR_ALLOC_FLAGS), err, TAG, "initialize dma interrupt failed");
 
 #if SOC_I2S_HW_VERSION_2
     /* Enable clock to start outputting mclk signal. Some codecs will reset once mclk stop */