From 29076a43f626f372d9e4fba03dce62120b091576 Mon Sep 17 00:00:00 2001 From: wuzhenghui Date: Thu, 23 Nov 2023 19:53:54 +0800 Subject: [PATCH 1/5] bringup esp32c5beta3 modem clock --- components/esp_hw_support/modem_clock.c | 6 ++++-- .../hal/esp32c5/include/hal/modem_syscon_ll.h | 18 ++++++++++++++++++ components/hal/esp32c5/modem_clock_hal.c | 3 +++ .../hal/esp32c6/include/hal/modem_syscon_ll.h | 5 +++++ .../hal/esp32h2/include/hal/modem_syscon_ll.h | 5 +++++ 5 files changed, 35 insertions(+), 2 deletions(-) diff --git a/components/esp_hw_support/modem_clock.c b/components/esp_hw_support/modem_clock.c index 901163dd7f32..ca7cae34d08d 100644 --- a/components/esp_hw_support/modem_clock.c +++ b/components/esp_hw_support/modem_clock.c @@ -75,6 +75,7 @@ static void IRAM_ATTR modem_clock_wifi_bb_configure(modem_clock_context_t *ctx, #if SOC_BT_SUPPORTED static void IRAM_ATTR modem_clock_ble_mac_configure(modem_clock_context_t *ctx, bool enable) { + modem_syscon_ll_enable_bt_mac_clock(ctx->hal->syscon_dev, enable); modem_syscon_ll_enable_modem_sec_clock(ctx->hal->syscon_dev, enable); modem_syscon_ll_enable_ble_timer_clock(ctx->hal->syscon_dev, enable); } @@ -309,6 +310,7 @@ static const DRAM_ATTR uint32_t initial_gating_mode[MODEM_CLOCK_DOMAIN_MAX] = { [MODEM_CLOCK_DOMAIN_WIFIPWR] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, }; +#if !CONFIG_IDF_TARGET_ESP32H2 //TODO: PM-92 static IRAM_ATTR void modem_clock_module_icg_map_init_all(void) { portENTER_CRITICAL_SAFE(&MODEM_CLOCK_instance()->lock); @@ -318,12 +320,12 @@ static IRAM_ATTR void modem_clock_module_icg_map_init_all(void) } portEXIT_CRITICAL_SAFE(&MODEM_CLOCK_instance()->lock); } -#endif // SOC_PM_SUPPORT_PMU_MODEM_STATE +#endif void IRAM_ATTR modem_clock_module_enable(periph_module_t module) { assert(IS_MODEM_MODULE(module)); -#if SOC_PM_SUPPORT_PMU_MODEM_STATE +#if !CONFIG_IDF_TARGET_ESP32H2 modem_clock_module_icg_map_init_all(); #endif uint32_t deps = modem_clock_get_module_deps(module); diff --git a/components/hal/esp32c5/include/hal/modem_syscon_ll.h b/components/hal/esp32c5/include/hal/modem_syscon_ll.h index f16b6f939d86..d6a910e5748e 100644 --- a/components/hal/esp32c5/include/hal/modem_syscon_ll.h +++ b/components/hal/esp32c5/include/hal/modem_syscon_ll.h @@ -412,6 +412,24 @@ static inline void modem_syscon_ll_enable_fe_apb_clock(modem_syscon_dev_t *hw, b hw->clk_conf1.clk_fe_apb_en = en; } +__attribute__((always_inline)) +static inline void modem_syscon_ll_enable_fe_adc_clock(modem_syscon_dev_t *hw, bool en) +{ + hw->clk_conf1.clk_fe_adc_en = en; +} + +__attribute__((always_inline)) +static inline void modem_syscon_ll_enable_fe_dac_clock(modem_syscon_dev_t *hw, bool en) +{ + hw->clk_conf1.clk_fe_dac_en = en; +} + +__attribute__((always_inline)) +static inline void modem_syscon_ll_enable_fe_pwdet_clock(modem_syscon_dev_t *hw, bool en) +{ + hw->clk_conf1.clk_fe_pwdet_adc_en = en; +} + __attribute__((always_inline)) static inline void modem_syscon_ll_enable_bt_apb_clock(modem_syscon_dev_t *hw, bool en) { diff --git a/components/hal/esp32c5/modem_clock_hal.c b/components/hal/esp32c5/modem_clock_hal.c index 2d917b62d25e..b2ea28106c98 100644 --- a/components/hal/esp32c5/modem_clock_hal.c +++ b/components/hal/esp32c5/modem_clock_hal.c @@ -104,6 +104,9 @@ uint32_t modem_clock_hal_get_clock_domain_icg_bitmap(modem_clock_hal_context_t * void IRAM_ATTR modem_clock_hal_enable_modem_adc_common_fe_clock(modem_clock_hal_context_t *hal, bool enable) { if (enable) { + modem_syscon_ll_enable_fe_adc_clock(hal->syscon_dev, enable); + modem_syscon_ll_enable_fe_dac_clock(hal->syscon_dev, enable); + modem_syscon_ll_enable_fe_pwdet_clock(hal->syscon_dev, enable); modem_syscon_ll_enable_fe_apb_clock(hal->syscon_dev, enable); modem_syscon_ll_enable_fe_80m_clock(hal->syscon_dev, enable); } diff --git a/components/hal/esp32c6/include/hal/modem_syscon_ll.h b/components/hal/esp32c6/include/hal/modem_syscon_ll.h index 6574e6ead43d..169f8b4022f3 100644 --- a/components/hal/esp32c6/include/hal/modem_syscon_ll.h +++ b/components/hal/esp32c6/include/hal/modem_syscon_ll.h @@ -412,6 +412,11 @@ static inline void modem_syscon_ll_enable_bt_apb_clock(modem_syscon_dev_t *hw, b hw->clk_conf1.clk_bt_apb_en = en; } +__attribute__((always_inline)) +static inline void modem_syscon_ll_enable_bt_mac_clock(modem_syscon_dev_t *hw, bool en) +{ +} + __attribute__((always_inline)) static inline void modem_syscon_ll_enable_bt_clock(modem_syscon_dev_t *hw, bool en) { diff --git a/components/hal/esp32h2/include/hal/modem_syscon_ll.h b/components/hal/esp32h2/include/hal/modem_syscon_ll.h index 5d1329d30aa9..9f214db8eee7 100644 --- a/components/hal/esp32h2/include/hal/modem_syscon_ll.h +++ b/components/hal/esp32h2/include/hal/modem_syscon_ll.h @@ -233,6 +233,11 @@ static inline void modem_syscon_ll_enable_bt_apb_clock(modem_syscon_dev_t *hw, b hw->clk_conf1.clk_bt_apb_en = en; } +__attribute__((always_inline)) +static inline void modem_syscon_ll_enable_bt_mac_clock(modem_syscon_dev_t *hw, bool en) +{ +} + __attribute__((always_inline)) static inline void modem_syscon_ll_enable_bt_clock(modem_syscon_dev_t *hw, bool en) { From f5487c72ab427f47d463b54ae3ac67c4bd2f2883 Mon Sep 17 00:00:00 2001 From: Lou Tianhao Date: Wed, 13 Mar 2024 20:52:56 +0800 Subject: [PATCH 2/5] change(pm): move the modem_clock-related code outside SOC_PM_SUPPORT_PMU_MODEM_STATE --- .../include/esp_private/esp_modem_clock.h | 2 +- .../esp_hw_support/include/esp_private/esp_pmu.h | 2 ++ components/esp_hw_support/modem_clock.c | 13 ++++++++----- components/hal/include/hal/modem_clock_hal.h | 2 +- 4 files changed, 12 insertions(+), 7 deletions(-) diff --git a/components/esp_hw_support/include/esp_private/esp_modem_clock.h b/components/esp_hw_support/include/esp_private/esp_modem_clock.h index a09d450ac37e..953bbf1bf21a 100644 --- a/components/esp_hw_support/include/esp_private/esp_modem_clock.h +++ b/components/esp_hw_support/include/esp_private/esp_modem_clock.h @@ -70,7 +70,7 @@ void modem_clock_module_disable(periph_module_t module); */ void modem_clock_module_mac_reset(periph_module_t module); -#if SOC_PMU_SUPPORTED +#if SOC_BLE_USE_WIFI_PWR_CLK_WORKAROUND /** * @brief Enable modem clock domain clock gate to gate it's output * diff --git a/components/esp_hw_support/include/esp_private/esp_pmu.h b/components/esp_hw_support/include/esp_private/esp_pmu.h index 5661db987435..0d01e17f5a3e 100644 --- a/components/esp_hw_support/include/esp_private/esp_pmu.h +++ b/components/esp_hw_support/include/esp_private/esp_pmu.h @@ -29,7 +29,9 @@ extern "C" { */ typedef enum { PMU_HP_ICG_MODEM_CODE_SLEEP = 0, +#if SOC_PM_SUPPORT_PMU_MODEM_STATE PMU_HP_ICG_MODEM_CODE_MODEM = 1, +#endif PMU_HP_ICG_MODEM_CODE_ACTIVE = 2, } pmu_hp_icg_modem_mode_t; diff --git a/components/esp_hw_support/modem_clock.c b/components/esp_hw_support/modem_clock.c index ca7cae34d08d..4f0dc0c8b3f7 100644 --- a/components/esp_hw_support/modem_clock.c +++ b/components/esp_hw_support/modem_clock.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -157,7 +157,7 @@ modem_clock_context_t * __attribute__((weak)) IRAM_ATTR MODEM_CLOCK_instance(voi return &modem_clock_context; } -#if SOC_PM_SUPPORT_PMU_MODEM_STATE +#if SOC_BLE_USE_WIFI_PWR_CLK_WORKAROUND esp_err_t modem_clock_domain_clk_gate_enable(modem_clock_domain_t domain, pmu_hp_icg_modem_mode_t mode) { if (domain >= MODEM_CLOCK_DOMAIN_MAX || domain < MODEM_CLOCK_DOMAIN_MODEM_APB) { @@ -189,7 +189,7 @@ esp_err_t modem_clock_domain_clk_gate_disable(modem_clock_domain_t domain, pmu_h portEXIT_CRITICAL_SAFE(&MODEM_CLOCK_instance()->lock); return ESP_OK; } -#endif // #if SOC_PM_SUPPORT_PMU_MODEM_STATE +#endif // #if SOC_BLE_USE_WIFI_PWR_CLK_WORKAROUND static void IRAM_ATTR modem_clock_device_enable(modem_clock_context_t *ctx, uint32_t dev_map) { @@ -290,12 +290,13 @@ static IRAM_ATTR uint32_t modem_clock_get_module_deps(periph_module_t module) return deps; } -#if SOC_PM_SUPPORT_PMU_MODEM_STATE /* the ICG code's bit 0, 1 and 2 indicates the ICG state * of pmu SLEEP, MODEM and ACTIVE mode respectively */ +#define ICG_NOGATING_ACTIVE (BIT(PMU_HP_ICG_MODEM_CODE_ACTIVE)) #define ICG_NOGATING_SLEEP (BIT(PMU_HP_ICG_MODEM_CODE_SLEEP)) +#if SOC_PM_SUPPORT_PMU_MODEM_STATE #define ICG_NOGATING_MODEM (BIT(PMU_HP_ICG_MODEM_CODE_MODEM)) -#define ICG_NOGATING_ACTIVE (BIT(PMU_HP_ICG_MODEM_CODE_ACTIVE)) +#endif static const DRAM_ATTR uint32_t initial_gating_mode[MODEM_CLOCK_DOMAIN_MAX] = { [MODEM_CLOCK_DOMAIN_MODEM_APB] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, @@ -315,8 +316,10 @@ static IRAM_ATTR void modem_clock_module_icg_map_init_all(void) { portENTER_CRITICAL_SAFE(&MODEM_CLOCK_instance()->lock); for (int domain = 0; domain < MODEM_CLOCK_DOMAIN_MAX; domain++) { +#if !CONFIG_IDF_TARGET_ESP32H2 //TODO: ESP32H2 need icg uint32_t code = modem_clock_hal_get_clock_domain_icg_bitmap(MODEM_CLOCK_instance()->hal, domain); modem_clock_hal_set_clock_domain_icg_bitmap(MODEM_CLOCK_instance()->hal, domain, initial_gating_mode[domain] | code); +#endif } portEXIT_CRITICAL_SAFE(&MODEM_CLOCK_instance()->lock); } diff --git a/components/hal/include/hal/modem_clock_hal.h b/components/hal/include/hal/modem_clock_hal.h index a898feb63e6f..ae34a5fa250d 100644 --- a/components/hal/include/hal/modem_clock_hal.h +++ b/components/hal/include/hal/modem_clock_hal.h @@ -23,7 +23,7 @@ typedef struct { modem_lpcon_dev_t *lpcon_dev; } modem_clock_hal_context_t; -#if MAC_SUPPORT_PMU_MODEM_STATE +#if !CONFIG_IDF_TARGET_ESP32H2 //TODO: PM- void modem_clock_hal_set_clock_domain_icg_bitmap(modem_clock_hal_context_t *hal, modem_clock_domain_t domain, uint32_t bitmap); uint32_t modem_clock_hal_get_clock_domain_icg_bitmap(modem_clock_hal_context_t *hal, modem_clock_domain_t domain); #endif From bd4147b5ef5726fada04eea118dc5ad3c42b9135 Mon Sep 17 00:00:00 2001 From: Lou Tianhao Date: Thu, 14 Mar 2024 11:29:19 +0800 Subject: [PATCH 3/5] fix(ci): add sdkconfig head and change some macro --- components/esp_hw_support/include/esp_private/esp_pmu.h | 2 -- components/esp_hw_support/modem_clock.c | 6 ++---- components/hal/include/hal/modem_clock_hal.h | 3 ++- 3 files changed, 4 insertions(+), 7 deletions(-) diff --git a/components/esp_hw_support/include/esp_private/esp_pmu.h b/components/esp_hw_support/include/esp_private/esp_pmu.h index 0d01e17f5a3e..5661db987435 100644 --- a/components/esp_hw_support/include/esp_private/esp_pmu.h +++ b/components/esp_hw_support/include/esp_private/esp_pmu.h @@ -29,9 +29,7 @@ extern "C" { */ typedef enum { PMU_HP_ICG_MODEM_CODE_SLEEP = 0, -#if SOC_PM_SUPPORT_PMU_MODEM_STATE PMU_HP_ICG_MODEM_CODE_MODEM = 1, -#endif PMU_HP_ICG_MODEM_CODE_ACTIVE = 2, } pmu_hp_icg_modem_mode_t; diff --git a/components/esp_hw_support/modem_clock.c b/components/esp_hw_support/modem_clock.c index 4f0dc0c8b3f7..3f089170aed7 100644 --- a/components/esp_hw_support/modem_clock.c +++ b/components/esp_hw_support/modem_clock.c @@ -294,10 +294,9 @@ static IRAM_ATTR uint32_t modem_clock_get_module_deps(periph_module_t module) * of pmu SLEEP, MODEM and ACTIVE mode respectively */ #define ICG_NOGATING_ACTIVE (BIT(PMU_HP_ICG_MODEM_CODE_ACTIVE)) #define ICG_NOGATING_SLEEP (BIT(PMU_HP_ICG_MODEM_CODE_SLEEP)) -#if SOC_PM_SUPPORT_PMU_MODEM_STATE #define ICG_NOGATING_MODEM (BIT(PMU_HP_ICG_MODEM_CODE_MODEM)) -#endif +#if !CONFIG_IDF_TARGET_ESP32H2 static const DRAM_ATTR uint32_t initial_gating_mode[MODEM_CLOCK_DOMAIN_MAX] = { [MODEM_CLOCK_DOMAIN_MODEM_APB] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, [MODEM_CLOCK_DOMAIN_MODEM_PERIPH] = ICG_NOGATING_ACTIVE, @@ -310,16 +309,15 @@ static const DRAM_ATTR uint32_t initial_gating_mode[MODEM_CLOCK_DOMAIN_MAX] = { [MODEM_CLOCK_DOMAIN_COEX] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, [MODEM_CLOCK_DOMAIN_WIFIPWR] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, }; +#endif #if !CONFIG_IDF_TARGET_ESP32H2 //TODO: PM-92 static IRAM_ATTR void modem_clock_module_icg_map_init_all(void) { portENTER_CRITICAL_SAFE(&MODEM_CLOCK_instance()->lock); for (int domain = 0; domain < MODEM_CLOCK_DOMAIN_MAX; domain++) { -#if !CONFIG_IDF_TARGET_ESP32H2 //TODO: ESP32H2 need icg uint32_t code = modem_clock_hal_get_clock_domain_icg_bitmap(MODEM_CLOCK_instance()->hal, domain); modem_clock_hal_set_clock_domain_icg_bitmap(MODEM_CLOCK_instance()->hal, domain, initial_gating_mode[domain] | code); -#endif } portEXIT_CRITICAL_SAFE(&MODEM_CLOCK_instance()->lock); } diff --git a/components/hal/include/hal/modem_clock_hal.h b/components/hal/include/hal/modem_clock_hal.h index ae34a5fa250d..910d0809f6b2 100644 --- a/components/hal/include/hal/modem_clock_hal.h +++ b/components/hal/include/hal/modem_clock_hal.h @@ -9,6 +9,7 @@ #pragma once #include "soc/soc_caps.h" +#include "sdkconfig.h" #if SOC_MODEM_CLOCK_IS_INDEPENDENT && SOC_MODEM_CLOCK_SUPPORTED #include "hal/modem_syscon_ll.h" #include "hal/modem_lpcon_ll.h" @@ -23,7 +24,7 @@ typedef struct { modem_lpcon_dev_t *lpcon_dev; } modem_clock_hal_context_t; -#if !CONFIG_IDF_TARGET_ESP32H2 //TODO: PM- +#if !CONFIG_IDF_TARGET_ESP32H2 //TODO: PM-92 void modem_clock_hal_set_clock_domain_icg_bitmap(modem_clock_hal_context_t *hal, modem_clock_domain_t domain, uint32_t bitmap); uint32_t modem_clock_hal_get_clock_domain_icg_bitmap(modem_clock_hal_context_t *hal, modem_clock_domain_t domain); #endif From 4535dfdd494606b0d1bc8a690b592cb4de34997a Mon Sep 17 00:00:00 2001 From: Lou Tianhao Date: Tue, 26 Mar 2024 17:33:31 +0800 Subject: [PATCH 4/5] change(pm): esp32c5 hardware does not have clk_fe_cal_160m_en --- components/hal/esp32c5/include/hal/modem_syscon_ll.h | 7 ------- components/hal/esp32c5/modem_clock_hal.c | 1 - 2 files changed, 8 deletions(-) diff --git a/components/hal/esp32c5/include/hal/modem_syscon_ll.h b/components/hal/esp32c5/include/hal/modem_syscon_ll.h index d6a910e5748e..7cf686ba0356 100644 --- a/components/hal/esp32c5/include/hal/modem_syscon_ll.h +++ b/components/hal/esp32c5/include/hal/modem_syscon_ll.h @@ -399,13 +399,6 @@ static inline void modem_syscon_ll_enable_fe_160m_clock(modem_syscon_dev_t *hw, hw->clk_conf1.clk_fe_160m_en = en; } -__attribute__((always_inline)) -static inline void modem_syscon_ll_enable_fe_cal_160m_clock(modem_syscon_dev_t *hw, bool en) -{ - HAL_ASSERT(0 && "not implemented yet"); - // hw->clk_conf1.clk_fe_cal_160m_en = en; -} - __attribute__((always_inline)) static inline void modem_syscon_ll_enable_fe_apb_clock(modem_syscon_dev_t *hw, bool en) { diff --git a/components/hal/esp32c5/modem_clock_hal.c b/components/hal/esp32c5/modem_clock_hal.c index b2ea28106c98..142b9f46e868 100644 --- a/components/hal/esp32c5/modem_clock_hal.c +++ b/components/hal/esp32c5/modem_clock_hal.c @@ -115,7 +115,6 @@ void IRAM_ATTR modem_clock_hal_enable_modem_adc_common_fe_clock(modem_clock_hal_ void IRAM_ATTR modem_clock_hal_enable_modem_private_fe_clock(modem_clock_hal_context_t *hal, bool enable) { if (enable) { - modem_syscon_ll_enable_fe_cal_160m_clock(hal->syscon_dev, enable); modem_syscon_ll_enable_fe_160m_clock(hal->syscon_dev, enable); } } From 85e803ded451af7c71022ea407af6415404536c2 Mon Sep 17 00:00:00 2001 From: Lou Tianhao Date: Wed, 27 Mar 2024 11:38:04 +0800 Subject: [PATCH 5/5] docs(pm): add description for newly added filed in modem_syscon --- components/hal/esp32c5/include/hal/modem_syscon_ll.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/components/hal/esp32c5/include/hal/modem_syscon_ll.h b/components/hal/esp32c5/include/hal/modem_syscon_ll.h index 7cf686ba0356..17cbaa457f53 100644 --- a/components/hal/esp32c5/include/hal/modem_syscon_ll.h +++ b/components/hal/esp32c5/include/hal/modem_syscon_ll.h @@ -405,18 +405,21 @@ static inline void modem_syscon_ll_enable_fe_apb_clock(modem_syscon_dev_t *hw, b hw->clk_conf1.clk_fe_apb_en = en; } +// The modem_syscon of esp32c5beta3 adds the enablement of the adc clock on the analog front end compared to esp32h2 and esp32c6. __attribute__((always_inline)) static inline void modem_syscon_ll_enable_fe_adc_clock(modem_syscon_dev_t *hw, bool en) { hw->clk_conf1.clk_fe_adc_en = en; } +// The modem_syscon of esp32c5beta3 adds the enablement of the dac clock on the analog front end compared to esp32h2 and esp32c6. __attribute__((always_inline)) static inline void modem_syscon_ll_enable_fe_dac_clock(modem_syscon_dev_t *hw, bool en) { hw->clk_conf1.clk_fe_dac_en = en; } +// The modem_syscon of esp32c5beta3 adds the enablement of the analog power detect clock on the analog front end compared to esp32h2 and esp32c6. __attribute__((always_inline)) static inline void modem_syscon_ll_enable_fe_pwdet_clock(modem_syscon_dev_t *hw, bool en) {