From 57a5c4684c9f0e9b351fec6efa3fbdc5e03dab6f Mon Sep 17 00:00:00 2001 From: gaoxu Date: Fri, 24 Nov 2023 15:52:59 +0800 Subject: [PATCH 1/2] fix(adc): fix adc continuous get less results beacuse do not reset apb clk --- components/esp_adc/adc_continuous.c | 3 +++ components/hal/esp32c6/include/hal/clk_gate_ll.h | 2 +- components/hal/esp32h2/include/hal/clk_gate_ll.h | 2 +- 3 files changed, 5 insertions(+), 2 deletions(-) diff --git a/components/esp_adc/adc_continuous.c b/components/esp_adc/adc_continuous.c index 2e86afaeed0c..12af5c05c39b 100644 --- a/components/esp_adc/adc_continuous.c +++ b/components/esp_adc/adc_continuous.c @@ -331,6 +331,9 @@ esp_err_t adc_continuous_start(adc_continuous_handle_t handle) ESP_RETURN_ON_FALSE(handle, ESP_ERR_INVALID_STATE, ADC_TAG, "The driver isn't initialised"); ESP_RETURN_ON_FALSE(handle->fsm == ADC_FSM_INIT, ESP_ERR_INVALID_STATE, ADC_TAG, "ADC continuous mode isn't in the init state, it's started already"); + //reset ADC digital part to reset ADC sampling EOF counter + periph_module_reset(PERIPH_SARADC_MODULE); + if (handle->pm_lock) { ESP_RETURN_ON_ERROR(esp_pm_lock_acquire(handle->pm_lock), ADC_TAG, "acquire pm_lock failed"); } diff --git a/components/hal/esp32c6/include/hal/clk_gate_ll.h b/components/hal/esp32c6/include/hal/clk_gate_ll.h index c8f9f87e1957..4e7be2030113 100644 --- a/components/hal/esp32c6/include/hal/clk_gate_ll.h +++ b/components/hal/esp32c6/include/hal/clk_gate_ll.h @@ -93,7 +93,7 @@ static inline uint32_t periph_ll_get_rst_en_mask(periph_module_t periph, bool en switch (periph) { case PERIPH_SARADC_MODULE: - return PCR_SARADC_RST_EN; + return PCR_SARADC_REG_RST_EN; case PERIPH_RMT_MODULE: return PCR_RMT_RST_EN; case PERIPH_PCNT_MODULE: diff --git a/components/hal/esp32h2/include/hal/clk_gate_ll.h b/components/hal/esp32h2/include/hal/clk_gate_ll.h index 964754cdc3db..64fb1475b7c2 100644 --- a/components/hal/esp32h2/include/hal/clk_gate_ll.h +++ b/components/hal/esp32h2/include/hal/clk_gate_ll.h @@ -101,7 +101,7 @@ static inline uint32_t periph_ll_get_rst_en_mask(periph_module_t periph, bool en switch (periph) { case PERIPH_SARADC_MODULE: - return PCR_SARADC_RST_EN; + return PCR_SARADC_REG_RST_EN; case PERIPH_RMT_MODULE: return PCR_RMT_RST_EN; case PERIPH_PCNT_MODULE: From 98ec583690f9030d58018690ea2a71464e62bb32 Mon Sep 17 00:00:00 2001 From: gaoxu Date: Wed, 29 Nov 2023 14:30:25 +0800 Subject: [PATCH 2/2] ci(adc): add a test that adc continuous read after restarting --- .../test_apps/adc/main/test_adc_driver.c | 62 +++++++++++++++++++ 1 file changed, 62 insertions(+) diff --git a/components/esp_adc/test_apps/adc/main/test_adc_driver.c b/components/esp_adc/test_apps/adc/main/test_adc_driver.c index e646019ac199..d4284ce2daea 100644 --- a/components/esp_adc/test_apps/adc/main/test_adc_driver.c +++ b/components/esp_adc/test_apps/adc/main/test_adc_driver.c @@ -131,6 +131,68 @@ TEST_CASE("ADC oneshot fast work with ISR", "[adc_oneshot]") } #if SOC_ADC_DMA_SUPPORTED + +#if (SOC_ADC_DIGI_RESULT_BYTES == 2) +#define ADC_DRIVER_TEST_OUTPUT_TYPE ADC_DIGI_OUTPUT_FORMAT_TYPE1 +#define ADC_DRIVER_TEST_GET_CHANNEL(p_data) ((p_data)->type1.channel) +#define ADC_DRIVER_TEST_GET_DATA(p_data) ((p_data)->type1.data) +#else +#define ADC_DRIVER_TEST_OUTPUT_TYPE ADC_DIGI_OUTPUT_FORMAT_TYPE2 +#define ADC_DRIVER_TEST_GET_CHANNEL(p_data) ((p_data)->type2.channel) +#define ADC_DRIVER_TEST_GET_DATA(p_data) ((p_data)->type2.data) +#endif + +#if !CONFIG_IDF_TARGET_ESP32C3 //TODO: DIG-270 + +#define ADC_RESTART_TEST_SIZE 4096 +#define ADC_READ_TEST_COUNT 10 + +TEST_CASE("ADC continuous test after restarting", "[adc_continuous]") +{ + adc_continuous_handle_t handle = NULL; + adc_continuous_handle_cfg_t adc_config = { + .max_store_buf_size = ADC_RESTART_TEST_SIZE, + .conv_frame_size = ADC_RESTART_TEST_SIZE, + }; + TEST_ESP_OK(adc_continuous_new_handle(&adc_config, &handle)); + + adc_continuous_config_t dig_cfg = { + .sample_freq_hz = 50 * 1000, + .conv_mode = ADC_CONV_SINGLE_UNIT_1, + .format = ADC_DRIVER_TEST_OUTPUT_TYPE, + }; + adc_digi_pattern_config_t adc_pattern[SOC_ADC_PATT_LEN_MAX] = {0}; + adc_pattern[0].atten = ADC_ATTEN_DB_12; + adc_pattern[0].channel = ADC1_TEST_CHAN0; + adc_pattern[0].unit = ADC_UNIT_1; + adc_pattern[0].bit_width = SOC_ADC_DIGI_MAX_BITWIDTH; + dig_cfg.adc_pattern = adc_pattern; + dig_cfg.pattern_num = 1; + TEST_ESP_OK(adc_continuous_config(handle, &dig_cfg)); + + uint8_t* result = malloc(ADC_RESTART_TEST_SIZE); + TEST_ASSERT(result); + + test_adc_set_io_level(ADC_UNIT_1, ADC1_TEST_CHAN0, 0); + + for (int i = 0; i < ADC_READ_TEST_COUNT; i++) { + uint32_t ret_num = 0; + TEST_ESP_OK(adc_continuous_start(handle)); + TEST_ESP_OK(adc_continuous_read(handle, result, ADC_RESTART_TEST_SIZE, &ret_num, ADC_MAX_DELAY)); + TEST_ASSERT_EQUAL(ADC_RESTART_TEST_SIZE, ret_num); + for (int i = 0; i < ret_num; i += SOC_ADC_DIGI_RESULT_BYTES) { + adc_digi_output_data_t *p = (void*)&result[i]; + uint32_t chan_num = ADC_DRIVER_TEST_GET_CHANNEL(p); + TEST_ASSERT(chan_num < SOC_ADC_CHANNEL_NUM(ADC_UNIT_1)); + } + TEST_ESP_OK(adc_continuous_stop(handle)); + } + + TEST_ESP_OK(adc_continuous_deinit(handle)); + free(result); +} +#endif //!CONFIG_IDF_TARGET_ESP32C3 + #if SOC_ADC_DIG_IIR_FILTER_SUPPORTED TEST_CASE("ADC filter exhausted allocation", "[adc_oneshot]") {