diff --git a/components/esp_system/test_apps/esp_system_unity_tests/main/test_task_wdt.c b/components/esp_system/test_apps/esp_system_unity_tests/main/test_task_wdt.c
index a3c41d0b139..08fbb40a4f4 100644
--- a/components/esp_system/test_apps/esp_system_unity_tests/main/test_task_wdt.c
+++ b/components/esp_system/test_apps/esp_system_unity_tests/main/test_task_wdt.c
@@ -13,10 +13,11 @@
 #include "esp_rom_sys.h"
 #include "esp_task_wdt.h"
 #include "test_utils.h"
+#include "soc/rtc.h"
 
 #define TASK_WDT_TIMEOUT_MS     1000
 
-static bool timeout_flag;
+static volatile bool timeout_flag;
 
 void esp_task_wdt_isr_user_handler(void)
 {
@@ -40,6 +41,41 @@ TEST_CASE("Task WDT task timeout", "[task_wdt]")
     TEST_ASSERT_EQUAL(ESP_OK, esp_task_wdt_deinit());
 }
 
+#if SOC_MWDT_SUPPORT_XTAL
+
+#if CONFIG_IDF_TARGET_ESP32H2
+#define TEST_CPU_FREQUENCY_MHZ 48
+#else
+#define TEST_CPU_FREQUENCY_MHZ 40
+#endif
+
+TEST_CASE("Task WDT task timeout - CPU Frequency changed", "[task_wdt]")
+{
+    rtc_cpu_freq_config_t old_config, new_config;
+    rtc_clk_cpu_freq_get_config(&old_config);
+
+    TEST_ASSERT(rtc_clk_cpu_freq_mhz_to_config(TEST_CPU_FREQUENCY_MHZ, &new_config));
+    rtc_clk_cpu_freq_set_config(&new_config);
+
+    timeout_flag = false;
+    esp_task_wdt_config_t twdt_config = {
+        .timeout_ms = TASK_WDT_TIMEOUT_MS,
+        .idle_core_mask = 0,
+        .trigger_panic = false,
+    };
+    TEST_ASSERT_EQUAL(ESP_OK, esp_task_wdt_init(&twdt_config));
+    TEST_ASSERT_EQUAL(ESP_OK, esp_task_wdt_add(NULL));
+    /* Short delay to allow timeout to occur, if WDT depends on any of the clocks changed
+       then the timeout should be slower and test will fail */
+    esp_rom_delay_us(TASK_WDT_TIMEOUT_MS * 1000);
+    TEST_ASSERT_EQUAL(true, timeout_flag);
+    TEST_ASSERT_EQUAL(ESP_OK, esp_task_wdt_delete(NULL));
+    TEST_ASSERT_EQUAL(ESP_OK, esp_task_wdt_deinit());
+
+    rtc_clk_cpu_freq_set_config(&old_config);
+}
+#endif //SOC_MWDT_SUPPORT_XTAL
+
 TEST_CASE("Task WDT inactive when no task to watch", "[task_wdt]")
 {
     /* Make sure a timeout is NOT trigger when we have no task to watch */
diff --git a/components/hal/esp32c3/include/hal/mwdt_ll.h b/components/hal/esp32c3/include/hal/mwdt_ll.h
index de2e795f04c..264a59951fc 100644
--- a/components/hal/esp32c3/include/hal/mwdt_ll.h
+++ b/components/hal/esp32c3/include/hal/mwdt_ll.h
@@ -24,7 +24,7 @@ extern "C" {
 #include "hal/misc.h"
 
 /* Pre-calculated prescaler to achieve 500 ticks/us (MWDT1_TICKS_PER_US) when using default clock (MWDT_CLK_SRC_DEFAULT ) */
-#define MWDT_LL_DEFAULT_CLK_PRESCALER 40000
+#define MWDT_LL_DEFAULT_CLK_PRESCALER 20000
 
 /* The value that needs to be written to TIMG_WDT_WKEY to write-enable the wdt registers */
 #define TIMG_WDT_WKEY_VALUE 0x50D83AA1
diff --git a/components/hal/esp32c6/include/hal/mwdt_ll.h b/components/hal/esp32c6/include/hal/mwdt_ll.h
index aad994a1f81..45194cd881c 100644
--- a/components/hal/esp32c6/include/hal/mwdt_ll.h
+++ b/components/hal/esp32c6/include/hal/mwdt_ll.h
@@ -25,7 +25,7 @@ extern "C" {
 #include "hal/misc.h"
 
 /* Pre-calculated prescaler to achieve 500 ticks/us (MWDT1_TICKS_PER_US) when using default clock (MWDT_CLK_SRC_DEFAULT ) */
-#define MWDT_LL_DEFAULT_CLK_PRESCALER 40000
+#define MWDT_LL_DEFAULT_CLK_PRESCALER 20000
 
 /* The value that needs to be written to TIMG_WDT_WKEY to write-enable the wdt registers */
 #define TIMG_WDT_WKEY_VALUE 0x50D83AA1
diff --git a/components/hal/esp32h2/include/hal/mwdt_ll.h b/components/hal/esp32h2/include/hal/mwdt_ll.h
index a09f16d6a82..ba7f5b048bc 100644
--- a/components/hal/esp32h2/include/hal/mwdt_ll.h
+++ b/components/hal/esp32h2/include/hal/mwdt_ll.h
@@ -24,7 +24,7 @@ extern "C" {
 #include "hal/misc.h"
 
 /* Pre-calculated prescaler to achieve 500 ticks/us (MWDT1_TICKS_PER_US) when using default clock (MWDT_CLK_SRC_DEFAULT ) */
-#define MWDT_LL_DEFAULT_CLK_PRESCALER 24000
+#define MWDT_LL_DEFAULT_CLK_PRESCALER 16000
 
 /* The value that needs to be written to TIMG_WDT_WKEY to write-enable the wdt registers */
 #define TIMG_WDT_WKEY_VALUE 0x50D83AA1
diff --git a/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in
index 47cd6eb57a0..7e543e407a8 100644
--- a/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in
@@ -539,6 +539,10 @@ config SOC_TIMER_GROUP_TOTAL_TIMERS
     int
     default 1
 
+config SOC_MWDT_SUPPORT_XTAL
+    bool
+    default y
+
 config SOC_EFUSE_DIS_DOWNLOAD_ICACHE
     bool
     default y
diff --git a/components/soc/esp32c2/include/soc/soc_caps.h b/components/soc/esp32c2/include/soc/soc_caps.h
index b8e62de0d33..f4134e46a86 100644
--- a/components/soc/esp32c2/include/soc/soc_caps.h
+++ b/components/soc/esp32c2/include/soc/soc_caps.h
@@ -256,6 +256,9 @@
 #define SOC_TIMER_GROUP_SUPPORT_XTAL      (1)
 #define SOC_TIMER_GROUP_TOTAL_TIMERS      (1U)
 
+/*--------------------------- WATCHDOG CAPS ---------------------------------------*/
+#define SOC_MWDT_SUPPORT_XTAL              (1)
+
 /*-------------------------- eFuse CAPS----------------------------*/
 #define SOC_EFUSE_DIS_DOWNLOAD_ICACHE 1
 #define SOC_EFUSE_DIS_PAD_JTAG 1
diff --git a/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in
index 43620505fe4..1752b390113 100644
--- a/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in
@@ -763,6 +763,10 @@ config SOC_TIMER_GROUP_TOTAL_TIMERS
     int
     default 2
 
+config SOC_MWDT_SUPPORT_XTAL
+    bool
+    default y
+
 config SOC_TWAI_CONTROLLER_NUM
     int
     default 1
diff --git a/components/soc/esp32c3/include/soc/clk_tree_defs.h b/components/soc/esp32c3/include/soc/clk_tree_defs.h
index a77af083477..3eb948f3979 100644
--- a/components/soc/esp32c3/include/soc/clk_tree_defs.h
+++ b/components/soc/esp32c3/include/soc/clk_tree_defs.h
@@ -335,7 +335,7 @@ typedef enum {
 typedef enum {
     MWDT_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL,           /*!< Select XTAL as the source clock */
     MWDT_CLK_SRC_APB = SOC_MOD_CLK_APB,             /*!< Select APB as the source clock */
-    MWDT_CLK_SRC_DEFAULT = SOC_MOD_CLK_APB,         /*!< Select APB as the default clock choice */
+    MWDT_CLK_SRC_DEFAULT = SOC_MOD_CLK_XTAL,         /*!< Select APB as the default clock choice */
 } soc_periph_mwdt_clk_src_t;
 
 //////////////////////////////////////////////////LEDC/////////////////////////////////////////////////////////////////
diff --git a/components/soc/esp32c3/include/soc/soc_caps.h b/components/soc/esp32c3/include/soc/soc_caps.h
index 1e8f684cb32..cc8d06657cf 100644
--- a/components/soc/esp32c3/include/soc/soc_caps.h
+++ b/components/soc/esp32c3/include/soc/soc_caps.h
@@ -339,6 +339,9 @@
 #define SOC_TIMER_GROUP_SUPPORT_APB       (1)
 #define SOC_TIMER_GROUP_TOTAL_TIMERS      (2)
 
+/*--------------------------- WATCHDOG CAPS ---------------------------------------*/
+#define SOC_MWDT_SUPPORT_XTAL              (1)
+
 /*-------------------------- TWAI CAPS ---------------------------------------*/
 #define SOC_TWAI_CONTROLLER_NUM         1UL
 #define SOC_TWAI_CLK_SUPPORT_APB        1
diff --git a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in
index c4d6dfef88c..3a0650ca9f0 100644
--- a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in
@@ -1007,6 +1007,10 @@ config SOC_TIMER_SUPPORT_ETM
     bool
     default y
 
+config SOC_MWDT_SUPPORT_XTAL
+    bool
+    default y
+
 config SOC_TWAI_CONTROLLER_NUM
     int
     default 2
diff --git a/components/soc/esp32c6/include/soc/clk_tree_defs.h b/components/soc/esp32c6/include/soc/clk_tree_defs.h
index 59ae3d11ece..97539e63558 100644
--- a/components/soc/esp32c6/include/soc/clk_tree_defs.h
+++ b/components/soc/esp32c6/include/soc/clk_tree_defs.h
@@ -425,7 +425,7 @@ typedef enum {
     MWDT_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL,           /*!< Select XTAL as the source clock */
     MWDT_CLK_SRC_PLL_F80M = SOC_MOD_CLK_PLL_F80M,   /*!< Select PLL fixed 80 MHz as the source clock */
     MWDT_CLK_SRC_RC_FAST = SOC_MOD_CLK_RC_FAST,     /*!< Select RTC fast as the source clock */
-    MWDT_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F80M,    /*!< Select PLL fixed 80 MHz as the default clock choice */
+    MWDT_CLK_SRC_DEFAULT = SOC_MOD_CLK_XTAL,        /*!< Select PLL fixed 80 MHz as the default clock choice */
 } soc_periph_mwdt_clk_src_t;
 
 //////////////////////////////////////////////////LEDC/////////////////////////////////////////////////////////////////
diff --git a/components/soc/esp32c6/include/soc/soc_caps.h b/components/soc/esp32c6/include/soc/soc_caps.h
index c0d60cbded2..60ee051c52f 100644
--- a/components/soc/esp32c6/include/soc/soc_caps.h
+++ b/components/soc/esp32c6/include/soc/soc_caps.h
@@ -418,6 +418,9 @@
 #define SOC_TIMER_GROUP_TOTAL_TIMERS      (2)
 #define SOC_TIMER_SUPPORT_ETM             (1)
 
+/*--------------------------- WATCHDOG CAPS ---------------------------------------*/
+#define SOC_MWDT_SUPPORT_XTAL              (1)
+
 /*-------------------------- TWAI CAPS ---------------------------------------*/
 #define SOC_TWAI_CONTROLLER_NUM         2
 #define SOC_TWAI_CLK_SUPPORT_XTAL       1
diff --git a/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in
index e04779f6e02..11b7544a2c7 100644
--- a/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in
@@ -991,6 +991,10 @@ config SOC_TIMER_SUPPORT_ETM
     bool
     default y
 
+config SOC_MWDT_SUPPORT_XTAL
+    bool
+    default y
+
 config SOC_TWAI_CONTROLLER_NUM
     int
     default 1
diff --git a/components/soc/esp32h2/include/soc/clk_tree_defs.h b/components/soc/esp32h2/include/soc/clk_tree_defs.h
index 9171044a397..b8a91f4dfed 100644
--- a/components/soc/esp32h2/include/soc/clk_tree_defs.h
+++ b/components/soc/esp32h2/include/soc/clk_tree_defs.h
@@ -424,7 +424,7 @@ typedef enum {
     MWDT_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL,           /*!< Select XTAL as the source clock */
     MWDT_CLK_SRC_PLL_F48M = SOC_MOD_CLK_PLL_F48M,   /*!< Select PLL fixed 48 MHz as the source clock */
     MWDT_CLK_SRC_RC_FAST = SOC_MOD_CLK_RC_FAST,     /*!< Select RTC fast as the source clock */
-    MWDT_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F48M,    /*!< Select PLL as the default clock choice */
+    MWDT_CLK_SRC_DEFAULT = SOC_MOD_CLK_XTAL,        /*!< Select PLL as the default clock choice */
 } soc_periph_mwdt_clk_src_t;
 
 //////////////////////////////////////////////////LEDC/////////////////////////////////////////////////////////////////
diff --git a/components/soc/esp32h2/include/soc/soc_caps.h b/components/soc/esp32h2/include/soc/soc_caps.h
index cd5526d9979..4467ab10bf8 100644
--- a/components/soc/esp32h2/include/soc/soc_caps.h
+++ b/components/soc/esp32h2/include/soc/soc_caps.h
@@ -412,6 +412,9 @@
 #define SOC_TIMER_GROUP_TOTAL_TIMERS      (2)
 #define SOC_TIMER_SUPPORT_ETM             (1)
 
+/*--------------------------- WATCHDOG CAPS ---------------------------------------*/
+#define SOC_MWDT_SUPPORT_XTAL              (1)
+
 /*-------------------------- TWAI CAPS ---------------------------------------*/
 #define SOC_TWAI_CONTROLLER_NUM         1UL
 #define SOC_TWAI_CLK_SUPPORT_XTAL       1
diff --git a/components/soc/esp32p4/include/soc/Kconfig.soc_caps.in b/components/soc/esp32p4/include/soc/Kconfig.soc_caps.in
index ed0ff6ae03b..ad2a1624816 100644
--- a/components/soc/esp32p4/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32p4/include/soc/Kconfig.soc_caps.in
@@ -855,6 +855,10 @@ config SOC_TIMER_SUPPORT_ETM
     bool
     default y
 
+config SOC_MWDT_SUPPORT_XTAL
+    bool
+    default y
+
 config SOC_TWAI_CONTROLLER_NUM
     int
     default 2
diff --git a/components/soc/esp32p4/include/soc/soc_caps.h b/components/soc/esp32p4/include/soc/soc_caps.h
index 09105238d22..4b7b21c8e34 100644
--- a/components/soc/esp32p4/include/soc/soc_caps.h
+++ b/components/soc/esp32p4/include/soc/soc_caps.h
@@ -420,6 +420,9 @@
 #define SOC_TIMER_GROUP_TOTAL_TIMERS      4
 #define SOC_TIMER_SUPPORT_ETM             1
 
+/*--------------------------- WATCHDOG CAPS ---------------------------------------*/
+#define SOC_MWDT_SUPPORT_XTAL              (1)
+
 /*-------------------------- TWAI CAPS ---------------------------------------*/
 #define SOC_TWAI_CONTROLLER_NUM         2
 #define SOC_TWAI_CLK_SUPPORT_XTAL       1