From db059b155afeba6d961c9fa06482b0de825114ca Mon Sep 17 00:00:00 2001 From: Marius Vikhammer Date: Mon, 10 Apr 2023 11:10:28 +0800 Subject: [PATCH 1/2] esp-system: move uncessary IRAM functions to flash --- components/esp_system/linker.lf | 2 ++ .../esp_system/port/soc/esp32/cache_err_int.c | 2 +- .../esp_system/port/soc/esp32/reset_reason.c | 20 ++++++------------- .../port/soc/esp32c2/cache_err_int.c | 2 +- .../port/soc/esp32c2/reset_reason.c | 2 +- .../port/soc/esp32c3/cache_err_int.c | 2 +- .../port/soc/esp32c3/reset_reason.c | 2 +- .../port/soc/esp32c6/cache_err_int.c | 2 +- .../port/soc/esp32c6/reset_reason.c | 4 ++-- .../port/soc/esp32h2/cache_err_int.c | 2 +- .../port/soc/esp32h2/reset_reason.c | 2 +- .../port/soc/esp32h4/cache_err_int.c | 2 +- .../port/soc/esp32h4/reset_reason.c | 2 +- .../port/soc/esp32s2/cache_err_int.c | 2 +- .../port/soc/esp32s2/reset_reason.c | 20 ++++++------------- .../port/soc/esp32s3/cache_err_int.c | 2 +- .../port/soc/esp32s3/reset_reason.c | 20 ++++++------------- tools/ci/check_copyright_ignore.txt | 3 --- 18 files changed, 34 insertions(+), 59 deletions(-) diff --git a/components/esp_system/linker.lf b/components/esp_system/linker.lf index 775e4ac76aca..e2fb09cc7815 100644 --- a/components/esp_system/linker.lf +++ b/components/esp_system/linker.lf @@ -5,6 +5,8 @@ entries: panic (noflash) panic_handler (noflash) panic_arch (noflash) + cache_err_int:esp_cache_err_get_cpuid (noflash) + reset_reason:esp_reset_reason_get_hint (noflash) esp_err (noflash) esp_system_chip:esp_system_abort (noflash) diff --git a/components/esp_system/port/soc/esp32/cache_err_int.c b/components/esp_system/port/soc/esp32/cache_err_int.c index 7750f23bf1bc..d8f5bcaadd31 100644 --- a/components/esp_system/port/soc/esp32/cache_err_int.c +++ b/components/esp_system/port/soc/esp32/cache_err_int.c @@ -67,7 +67,7 @@ void esp_cache_err_int_init(void) ESP_INTR_ENABLE(ETS_MEMACCESS_ERR_INUM); } -int IRAM_ATTR esp_cache_err_get_cpuid(void) +int esp_cache_err_get_cpuid(void) { const uint32_t pro_mask = DPORT_PRO_CPU_DISABLED_CACHE_IA_DRAM1 | diff --git a/components/esp_system/port/soc/esp32/reset_reason.c b/components/esp_system/port/soc/esp32/reset_reason.c index 381a3213ca9f..1c1d10e8bf38 100644 --- a/components/esp_system/port/soc/esp32/reset_reason.c +++ b/components/esp_system/port/soc/esp32/reset_reason.c @@ -1,16 +1,8 @@ -// Copyright 2018 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2018-2023 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #include "esp_system.h" #include "esp_rom_sys.h" @@ -103,7 +95,7 @@ void IRAM_ATTR esp_reset_reason_set_hint(esp_reset_reason_t hint) } /* in IRAM, can be called from panic handler */ -esp_reset_reason_t IRAM_ATTR esp_reset_reason_get_hint(void) +esp_reset_reason_t esp_reset_reason_get_hint(void) { uint32_t reset_reason_hint = REG_READ(RTC_RESET_CAUSE_REG); uint32_t high = (reset_reason_hint >> RST_REASON_SHIFT) & RST_REASON_MASK; diff --git a/components/esp_system/port/soc/esp32c2/cache_err_int.c b/components/esp_system/port/soc/esp32c2/cache_err_int.c index 9275926b34e5..4f241e021d2c 100644 --- a/components/esp_system/port/soc/esp32c2/cache_err_int.c +++ b/components/esp_system/port/soc/esp32c2/cache_err_int.c @@ -72,7 +72,7 @@ void esp_cache_err_int_init(void) ESP_INTR_ENABLE(ETS_CACHEERR_INUM); } -int IRAM_ATTR esp_cache_err_get_cpuid(void) +int esp_cache_err_get_cpuid(void) { return 0; } diff --git a/components/esp_system/port/soc/esp32c2/reset_reason.c b/components/esp_system/port/soc/esp32c2/reset_reason.c index 29099e24f8e9..98798860d055 100644 --- a/components/esp_system/port/soc/esp32c2/reset_reason.c +++ b/components/esp_system/port/soc/esp32c2/reset_reason.c @@ -84,7 +84,7 @@ void IRAM_ATTR esp_reset_reason_set_hint(esp_reset_reason_t hint) } /* in IRAM, can be called from panic handler */ -esp_reset_reason_t IRAM_ATTR esp_reset_reason_get_hint(void) +esp_reset_reason_t esp_reset_reason_get_hint(void) { uint32_t reset_reason_hint = REG_READ(RTC_RESET_CAUSE_REG); uint32_t high = (reset_reason_hint >> RST_REASON_SHIFT) & RST_REASON_MASK; diff --git a/components/esp_system/port/soc/esp32c3/cache_err_int.c b/components/esp_system/port/soc/esp32c3/cache_err_int.c index 0124c471ba5a..05b5d6773c8f 100644 --- a/components/esp_system/port/soc/esp32c3/cache_err_int.c +++ b/components/esp_system/port/soc/esp32c3/cache_err_int.c @@ -72,7 +72,7 @@ void esp_cache_err_int_init(void) ESP_INTR_ENABLE(ETS_CACHEERR_INUM); } -int IRAM_ATTR esp_cache_err_get_cpuid(void) +int esp_cache_err_get_cpuid(void) { return 0; } diff --git a/components/esp_system/port/soc/esp32c3/reset_reason.c b/components/esp_system/port/soc/esp32c3/reset_reason.c index 465e8041543e..183c955efeaa 100644 --- a/components/esp_system/port/soc/esp32c3/reset_reason.c +++ b/components/esp_system/port/soc/esp32c3/reset_reason.c @@ -97,7 +97,7 @@ void IRAM_ATTR esp_reset_reason_set_hint(esp_reset_reason_t hint) } /* in IRAM, can be called from panic handler */ -esp_reset_reason_t IRAM_ATTR esp_reset_reason_get_hint(void) +esp_reset_reason_t esp_reset_reason_get_hint(void) { uint32_t reset_reason_hint = REG_READ(RTC_RESET_CAUSE_REG); uint32_t high = (reset_reason_hint >> RST_REASON_SHIFT) & RST_REASON_MASK; diff --git a/components/esp_system/port/soc/esp32c6/cache_err_int.c b/components/esp_system/port/soc/esp32c6/cache_err_int.c index 772df0f616d7..82cf3895e457 100644 --- a/components/esp_system/port/soc/esp32c6/cache_err_int.c +++ b/components/esp_system/port/soc/esp32c6/cache_err_int.c @@ -52,7 +52,7 @@ void esp_cache_err_int_init(void) ESP_INTR_ENABLE(ETS_CACHEERR_INUM); } -int IRAM_ATTR esp_cache_err_get_cpuid(void) +int esp_cache_err_get_cpuid(void) { return 0; } diff --git a/components/esp_system/port/soc/esp32c6/reset_reason.c b/components/esp_system/port/soc/esp32c6/reset_reason.c index bd82c8a3d37a..bc5891f9918f 100644 --- a/components/esp_system/port/soc/esp32c6/reset_reason.c +++ b/components/esp_system/port/soc/esp32c6/reset_reason.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -94,7 +94,7 @@ void IRAM_ATTR esp_reset_reason_set_hint(esp_reset_reason_t hint) } /* in IRAM, can be called from panic handler */ -esp_reset_reason_t IRAM_ATTR esp_reset_reason_get_hint(void) +esp_reset_reason_t esp_reset_reason_get_hint(void) { uint32_t reset_reason_hint = REG_READ(RTC_RESET_CAUSE_REG); uint32_t high = (reset_reason_hint >> RST_REASON_SHIFT) & RST_REASON_MASK; diff --git a/components/esp_system/port/soc/esp32h2/cache_err_int.c b/components/esp_system/port/soc/esp32h2/cache_err_int.c index f6c2a151d667..1997f547da28 100644 --- a/components/esp_system/port/soc/esp32h2/cache_err_int.c +++ b/components/esp_system/port/soc/esp32h2/cache_err_int.c @@ -52,7 +52,7 @@ void esp_cache_err_int_init(void) ESP_INTR_ENABLE(ETS_CACHEERR_INUM); } -int IRAM_ATTR esp_cache_err_get_cpuid(void) +int esp_cache_err_get_cpuid(void) { return 0; } diff --git a/components/esp_system/port/soc/esp32h2/reset_reason.c b/components/esp_system/port/soc/esp32h2/reset_reason.c index 79350c2b3a22..e3b8565b64f8 100644 --- a/components/esp_system/port/soc/esp32h2/reset_reason.c +++ b/components/esp_system/port/soc/esp32h2/reset_reason.c @@ -94,7 +94,7 @@ void IRAM_ATTR esp_reset_reason_set_hint(esp_reset_reason_t hint) } /* in IRAM, can be called from panic handler */ -esp_reset_reason_t IRAM_ATTR esp_reset_reason_get_hint(void) +esp_reset_reason_t esp_reset_reason_get_hint(void) { uint32_t reset_reason_hint = REG_READ(RTC_RESET_CAUSE_REG); uint32_t high = (reset_reason_hint >> RST_REASON_SHIFT) & RST_REASON_MASK; diff --git a/components/esp_system/port/soc/esp32h4/cache_err_int.c b/components/esp_system/port/soc/esp32h4/cache_err_int.c index 7a63521eb990..5c24fed65bcd 100644 --- a/components/esp_system/port/soc/esp32h4/cache_err_int.c +++ b/components/esp_system/port/soc/esp32h4/cache_err_int.c @@ -72,7 +72,7 @@ void esp_cache_err_int_init(void) ESP_INTR_ENABLE(ETS_CACHEERR_INUM); } -int IRAM_ATTR esp_cache_err_get_cpuid(void) +int esp_cache_err_get_cpuid(void) { return 0; } diff --git a/components/esp_system/port/soc/esp32h4/reset_reason.c b/components/esp_system/port/soc/esp32h4/reset_reason.c index 580c52bcb1dc..83d0a2d5d8bd 100644 --- a/components/esp_system/port/soc/esp32h4/reset_reason.c +++ b/components/esp_system/port/soc/esp32h4/reset_reason.c @@ -94,7 +94,7 @@ void IRAM_ATTR esp_reset_reason_set_hint(esp_reset_reason_t hint) } /* in IRAM, can be called from panic handler */ -esp_reset_reason_t IRAM_ATTR esp_reset_reason_get_hint(void) +esp_reset_reason_t esp_reset_reason_get_hint(void) { uint32_t reset_reason_hint = REG_READ(RTC_RESET_CAUSE_REG); uint32_t high = (reset_reason_hint >> RST_REASON_SHIFT) & RST_REASON_MASK; diff --git a/components/esp_system/port/soc/esp32s2/cache_err_int.c b/components/esp_system/port/soc/esp32s2/cache_err_int.c index 1a4a732c015b..36c7e2da45a6 100644 --- a/components/esp_system/port/soc/esp32s2/cache_err_int.c +++ b/components/esp_system/port/soc/esp32s2/cache_err_int.c @@ -67,7 +67,7 @@ void esp_cache_err_int_init(void) ESP_INTR_ENABLE(ETS_MEMACCESS_ERR_INUM); } -int IRAM_ATTR esp_cache_err_get_cpuid(void) +int esp_cache_err_get_cpuid(void) { if (REG_READ(EXTMEM_CACHE_DBG_STATUS0_REG) != 0 || REG_READ(EXTMEM_CACHE_DBG_STATUS1_REG) != 0) { diff --git a/components/esp_system/port/soc/esp32s2/reset_reason.c b/components/esp_system/port/soc/esp32s2/reset_reason.c index 6f7fcf0570e5..9f0bb04716a8 100644 --- a/components/esp_system/port/soc/esp32s2/reset_reason.c +++ b/components/esp_system/port/soc/esp32s2/reset_reason.c @@ -1,16 +1,8 @@ -// Copyright 2018 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2018-2023 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #include "esp_system.h" #include "esp_rom_sys.h" @@ -102,7 +94,7 @@ void IRAM_ATTR esp_reset_reason_set_hint(esp_reset_reason_t hint) } /* in IRAM, can be called from panic handler */ -esp_reset_reason_t IRAM_ATTR esp_reset_reason_get_hint(void) +esp_reset_reason_t esp_reset_reason_get_hint(void) { uint32_t reset_reason_hint = REG_READ(RTC_RESET_CAUSE_REG); uint32_t high = (reset_reason_hint >> RST_REASON_SHIFT) & RST_REASON_MASK; diff --git a/components/esp_system/port/soc/esp32s3/cache_err_int.c b/components/esp_system/port/soc/esp32s3/cache_err_int.c index d075cdc56a5f..d87d1ea3678e 100644 --- a/components/esp_system/port/soc/esp32s3/cache_err_int.c +++ b/components/esp_system/port/soc/esp32s3/cache_err_int.c @@ -70,7 +70,7 @@ void esp_cache_err_int_init(void) ESP_INTR_ENABLE(ETS_CACHEERR_INUM); } -int IRAM_ATTR esp_cache_err_get_cpuid(void) +int esp_cache_err_get_cpuid(void) { if (cache_ll_l1_get_access_error_intr_status(0, CACHE_LL_L1_ACCESS_EVENT_MASK)) { return PRO_CPU_NUM; diff --git a/components/esp_system/port/soc/esp32s3/reset_reason.c b/components/esp_system/port/soc/esp32s3/reset_reason.c index e986f064da16..67bdf6a9abfe 100644 --- a/components/esp_system/port/soc/esp32s3/reset_reason.c +++ b/components/esp_system/port/soc/esp32s3/reset_reason.c @@ -1,16 +1,8 @@ -// Copyright 2018 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2018-2023 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #include "esp_system.h" #include "esp_rom_sys.h" @@ -100,7 +92,7 @@ void IRAM_ATTR esp_reset_reason_set_hint(esp_reset_reason_t hint) } /* in IRAM, can be called from panic handler */ -esp_reset_reason_t IRAM_ATTR esp_reset_reason_get_hint(void) +esp_reset_reason_t esp_reset_reason_get_hint(void) { uint32_t reset_reason_hint = REG_READ(RTC_RESET_CAUSE_REG); uint32_t high = (reset_reason_hint >> RST_REASON_SHIFT) & RST_REASON_MASK; diff --git a/tools/ci/check_copyright_ignore.txt b/tools/ci/check_copyright_ignore.txt index 34e224f7336b..fb10b5fd4238 100644 --- a/tools/ci/check_copyright_ignore.txt +++ b/tools/ci/check_copyright_ignore.txt @@ -561,13 +561,10 @@ components/esp_system/port/public_compat/cache_err_int.h components/esp_system/port/public_compat/trax.h components/esp_system/port/soc/esp32/cache_err_int.h components/esp_system/port/soc/esp32/intr.c -components/esp_system/port/soc/esp32/reset_reason.c components/esp_system/port/soc/esp32c3/apb_backup_dma.c components/esp_system/port/soc/esp32c3/cache_err_int.h components/esp_system/port/soc/esp32s2/cache_err_int.h -components/esp_system/port/soc/esp32s2/reset_reason.c components/esp_system/port/soc/esp32s3/cache_err_int.h -components/esp_system/port/soc/esp32s3/reset_reason.c components/esp_system/test/test_delay.c components/esp_system/test/test_reset_reason.c components/esp_system/test/test_stack_check.c From f7d045ad5c3e5639910928d1b465c2f63063f4b0 Mon Sep 17 00:00:00 2001 From: Marius Vikhammer Date: Mon, 10 Apr 2023 12:20:02 +0800 Subject: [PATCH 2/2] riscv: moved some interrupt functions from IRAM to flash These functions dont need to be in IRAM. --- components/riscv/linker.lf | 2 ++ 1 file changed, 2 insertions(+) diff --git a/components/riscv/linker.lf b/components/riscv/linker.lf index cfcb303cf08d..a32848659ed3 100644 --- a/components/riscv/linker.lf +++ b/components/riscv/linker.lf @@ -2,4 +2,6 @@ archive: libriscv.a entries: interrupt (noflash_text) + interrupt:intr_handler_get (default) + interrupt:intr_handler_set (default) vectors (noflash_text)