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Hardware interrupts are lost while the system writes files to flash (SPIFFS) #5655

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lmarmisa opened this issue Jan 23, 2019 · 4 comments
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waiting for feedback Waiting on additional info. If it's not received, the issue may be closed.

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@lmarmisa
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Basic Infos

  • [* ] This issue complies with the issue POLICY doc.
  • [* ] I have read the documentation at readthedocs and the issue is not addressed there.
  • [* ] I have tested that the issue is present in current master branch (aka latest git).
  • [*] I have searched the issue tracker for a similar issue.
  • [] If there is a stack dump, I have decoded it.
  • [* ] I have filled out all fields below.

Platform

  • Hardware: ESP-12
  • Core Version: all
  • Development Env: Arduino IDE
  • Operating System: Ubuntu

Settings in IDE

  • Module: Nodemcu
  • Flash Mode:
  • Flash Size: 4MB
  • lwip Variant: v2 Lower Memory
  • Reset Method:
  • Flash Frequency: 40Mhz
  • CPU Frequency: 80Mhz
  • Upload Using: both OTA & SERIAL
  • Upload Speed: 115200

Problem Description

I am using the hw timer1 for data sampling purposes. I have configured a 5 ms periodic interrupt. This works fine except while I update/write SPIFFS files. Normally max jitter is about 100/150 usec, but, when the system writes files to flash with spiffs, max jittter reaches 100 ms and even more (!!!). Obviously many periodical interrupts are lost in this case.

My code does not include any noInterrupts() / interrupts() sequence. Therefore, my code is not disabling interrupts in any way.

When spiffs routines write files to flash, interrupts are disable for too long time (about 100 msec) and this time seems completely excessive. This bug should be corrected.

This problem could affect not only to hw timer interrupts but also to any other hw interrupts: i2c, spi, uart, gpio. So, I consider that this is very important.

Debug Messages

I have added some stats to my code related to timer interrupt and jitter.

This example shows good jitter stats:

frc1 interrupts:theoretical:493816:actual:493816:lost:0
f00+++:0000005103
f00+++:0000005099
f00+++:0000005092
f00+++:0000005091
f00+++:0000005089
f00+++:0000005084
f00+++:0000005082
f00+++:0000005081
f00+++:0000005077
f00+++:0000005074
f00+++:0000005073
f00+++:0000005049
f00+++:0000005035
f00+++:0000005032
f00+++:0000005030
f00+++:0000005028
...
f00avg: 5000.00
...
f00---:0000004979
f00---:0000004978
f00---:0000004977
f00---:0000004976
f00---:0000004975
f00---:0000004974
f00---:0000004972
f00---:0000004968
f00---:0000004965
f00---:0000004964
f00---:0000004963
f00---:0000004962
f00---:0000004961
f00---:0000004960
f00---:0000004942
f00---:0000004923

This other example shows stats after 2 files (file1 70KB; file2 42KB) were written to flash:

frc1 interrupts:theoretical:527433:actual:526627:lost:806
f00+++:0000108007
f00+++:0000104761
f00+++:0000103253
f00+++:0000102571
f00+++:0000101300
f00+++:0000100870
f00+++:0000100706
f00+++:0000100487
f00+++:0000100331
f00+++:0000100308
f00+++:0000100277
f00+++:0000100061
f00+++:0000099839
f00+++:0000099651
f00+++:0000099427
f00+++:0000099314
...
f00avg: 5007.65
...
f00---:0000001449
f00---:0000001434
f00---:0000001292
f00---:0000001286
f00---:0000001269
f00---:0000001211
f00---:0000000889
f00---:0000000847
f00---:0000000740
f00---:0000000671
f00---:0000000569
f00---:0000000398
f00---:0000000231
f00---:0000000181
f00---:0000000162
f00---:0000000159

@Zeron
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Zeron commented Jan 23, 2019

Have you tried using a GIT version of the core after Jan 9th when this: #5577 was merged?

@earlephilhower
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Thanks, @Zeron . @lmarmisa, please do try the GIT head as IRQs were stopped around all flash operations on the belief that some IRQ service routines might not be in IRAM. In the core and in apps, we made that a requirement quite a while ago, and with #5577 we dropped the IRQ blocking.

Make sure your timer1 routine is in IRAM and does not access flash in any way (i.e. no PROGMEM reads, no PSTR, etc.) and you should be good to go.

@earlephilhower earlephilhower added the waiting for feedback Waiting on additional info. If it's not received, the issue may be closed. label Jan 23, 2019
@lmarmisa
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lmarmisa commented Jan 24, 2019

Thanks @Zeron and @earlephilhower. The solution you proposed was great.

First of all, I placed my timer1 ISR function in IRAM adding the attribute ICACHE_RAM_ATTR.

I was unable to install the latest GIT version on the Arduino IDE 1.8.5. So I decided to edit manually the file Esp.cpp on the version 2.5.0-beta2.

I tested two options:

  1. I commented out the statements ets_isr_mask(FLASH_INT_MASK) and ets_isr_unmask(FLASH_INT_MASK)

  2. I modified the bit 9 (timer1) of FLASH_INT_MASK to 0:

static const int FLASH_INT_MASK = B00111010;

Both options worked correctly. Now no interrupt is lost, the max jitter is about 170 usec and flash operations have no effect on the jitter.

I suppose that #5577 will be included in the next core version.

Thanks again for your help.

Luis

@devyte
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devyte commented Jan 24, 2019

Closing as resolved per previous comment.

@devyte devyte closed this as completed Jan 24, 2019
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