diff --git a/espflash/src/targets/esp32.rs b/espflash/src/targets/esp32.rs index d54f5223..75acd046 100644 --- a/espflash/src/targets/esp32.rs +++ b/espflash/src/targets/esp32.rs @@ -1,14 +1,13 @@ use std::ops::Range; +#[cfg(feature = "serialport")] +use crate::{connection::Connection, targets::bytes_to_mac_addr}; use crate::{ - connection::Connection, elf::FirmwareImage, error::{Error, UnsupportedImageFormatError}, flasher::{FlashData, FlashFrequency}, image_format::{IdfBootloaderFormat, ImageFormat, ImageFormatKind}, - targets::{ - bytes_to_mac_addr, Chip, Esp32Params, ReadEFuse, SpiRegisters, Target, XtalFrequency, - }, + targets::{Chip, Esp32Params, ReadEFuse, SpiRegisters, Target, XtalFrequency}, }; const CHIP_DETECT_MAGIC_VALUES: &[u32] = &[0x00f0_1d83]; @@ -32,6 +31,7 @@ impl Esp32 { CHIP_DETECT_MAGIC_VALUES.contains(&value) } + #[cfg(feature = "serialport")] /// Return the package version based on the eFuses fn package_version(&self, connection: &mut Connection) -> Result { let word3 = self.read_efuse(connection, 3)?; @@ -54,6 +54,7 @@ impl Target for Esp32 { FLASH_RANGES.iter().any(|range| range.contains(&addr)) } + #[cfg(feature = "serialport")] fn chip_features(&self, connection: &mut Connection) -> Result, Error> { let word3 = self.read_efuse(connection, 3)?; let word4 = self.read_efuse(connection, 4)?; @@ -112,6 +113,7 @@ impl Target for Esp32 { Ok(features) } + #[cfg(feature = "serialport")] fn major_chip_version(&self, connection: &mut Connection) -> Result { let apb_ctl_date = connection.read_reg(0x3FF6_607C)?; @@ -129,10 +131,12 @@ impl Target for Esp32 { } } + #[cfg(feature = "serialport")] fn minor_chip_version(&self, connection: &mut Connection) -> Result { Ok((self.read_efuse(connection, 5)? >> 24) & 0x3) } + #[cfg(feature = "serialport")] fn crystal_freq(&self, connection: &mut Connection) -> Result { let uart_div = connection.read_reg(UART_CLKDIV_REG)? & UART_CLKDIV_MASK; let est_xtal = (connection.get_baud()? * uart_div) / 1_000_000 / XTAL_CLK_DIVIDER; @@ -196,6 +200,7 @@ impl Target for Esp32 { } } + #[cfg(feature = "serialport")] fn mac_address(&self, connection: &mut Connection) -> Result { let word1 = self.read_efuse(connection, 1)?; let word2 = self.read_efuse(connection, 2)?; diff --git a/espflash/src/targets/esp32c2.rs b/espflash/src/targets/esp32c2.rs index 9ba7ae8c..ff707d53 100644 --- a/espflash/src/targets/esp32c2.rs +++ b/espflash/src/targets/esp32c2.rs @@ -1,14 +1,13 @@ use std::{collections::HashMap, ops::Range}; +#[cfg(feature = "serialport")] +use crate::{connection::Connection, targets::bytes_to_mac_addr}; use crate::{ - connection::Connection, elf::FirmwareImage, error::Error, flasher::{FlashData, FlashFrequency}, image_format::{DirectBootFormat, IdfBootloaderFormat, ImageFormat, ImageFormatKind}, - targets::{ - bytes_to_mac_addr, Chip, Esp32Params, ReadEFuse, SpiRegisters, Target, XtalFrequency, - }, + targets::{Chip, Esp32Params, ReadEFuse, SpiRegisters, Target, XtalFrequency}, }; const CHIP_DETECT_MAGIC_VALUES: &[u32] = &[ @@ -47,18 +46,22 @@ impl Target for Esp32c2 { FLASH_RANGES.iter().any(|range| range.contains(&addr)) } + #[cfg(feature = "serialport")] fn chip_features(&self, _connection: &mut Connection) -> Result, Error> { Ok(vec!["WiFi", "BLE"]) } + #[cfg(feature = "serialport")] fn major_chip_version(&self, connection: &mut Connection) -> Result { Ok(self.read_efuse(connection, 17)? >> 20 & 0x3) } + #[cfg(feature = "serialport")] fn minor_chip_version(&self, connection: &mut Connection) -> Result { Ok(self.read_efuse(connection, 17)? >> 16 & 0xf) } + #[cfg(feature = "serialport")] fn crystal_freq(&self, connection: &mut Connection) -> Result { let uart_div = connection.read_reg(UART_CLKDIV_REG)? & UART_CLKDIV_MASK; let est_xtal = (connection.get_baud()? * uart_div) / 1_000_000 / XTAL_CLK_DIVIDER; @@ -132,6 +135,7 @@ impl Target for Esp32c2 { } } + #[cfg(feature = "serialport")] /// What is the MAC address? fn mac_address(&self, connection: &mut Connection) -> Result { let word5 = self.read_efuse(connection, 16)?; diff --git a/espflash/src/targets/esp32c3.rs b/espflash/src/targets/esp32c3.rs index 0feb9b11..5a62d033 100644 --- a/espflash/src/targets/esp32c3.rs +++ b/espflash/src/targets/esp32c3.rs @@ -1,7 +1,8 @@ use std::ops::Range; +#[cfg(feature = "serialport")] +use crate::connection::Connection; use crate::{ - connection::Connection, elf::FirmwareImage, error::{Error, UnsupportedImageFormatError}, flasher::{FlashData, FlashFrequency}, @@ -51,14 +52,17 @@ impl Target for Esp32c3 { FLASH_RANGES.iter().any(|range| range.contains(&addr)) } + #[cfg(feature = "serialport")] fn chip_features(&self, _connection: &mut Connection) -> Result, Error> { Ok(vec!["WiFi", "BLE"]) } + #[cfg(feature = "serialport")] fn major_chip_version(&self, connection: &mut Connection) -> Result { Ok(self.read_efuse(connection, 22)? >> 24 & 0x3) } + #[cfg(feature = "serialport")] fn minor_chip_version(&self, connection: &mut Connection) -> Result { let hi = self.read_efuse(connection, 22)? >> 23 & 0x1; let lo = self.read_efuse(connection, 20)? >> 18 & 0x7; @@ -66,6 +70,7 @@ impl Target for Esp32c3 { Ok((hi << 3) + lo) } + #[cfg(feature = "serialport")] fn crystal_freq(&self, _connection: &mut Connection) -> Result { // The ESP32-C3's XTAL has a fixed frequency of 40MHz. Ok(XtalFrequency::_40Mhz) diff --git a/espflash/src/targets/esp32c6.rs b/espflash/src/targets/esp32c6.rs index b6b3bd53..4b0587ba 100644 --- a/espflash/src/targets/esp32c6.rs +++ b/espflash/src/targets/esp32c6.rs @@ -1,7 +1,8 @@ use std::ops::Range; +#[cfg(feature = "serialport")] +use crate::connection::Connection; use crate::{ - connection::Connection, elf::FirmwareImage, error::Error, flasher::{FlashData, FlashFrequency}, @@ -46,14 +47,17 @@ impl Target for Esp32c6 { FLASH_RANGES.iter().any(|range| range.contains(&addr)) } + #[cfg(feature = "serialport")] fn chip_features(&self, _connection: &mut Connection) -> Result, Error> { Ok(vec!["WiFi 6", "BT 5"]) } + #[cfg(feature = "serialport")] fn major_chip_version(&self, connection: &mut Connection) -> Result { Ok((self.read_efuse(connection, 22)? >> 24) & 0x3) } + #[cfg(feature = "serialport")] fn minor_chip_version(&self, connection: &mut Connection) -> Result { let hi = (self.read_efuse(connection, 22)? >> 23) & 0x1; let lo = (self.read_efuse(connection, 20)? >> 18) & 0x7; @@ -61,6 +65,7 @@ impl Target for Esp32c6 { Ok((hi << 3) + lo) } + #[cfg(feature = "serialport")] fn crystal_freq(&self, _connection: &mut Connection) -> Result { // The ESP32-C6's XTAL has a fixed frequency of 40MHz. Ok(XtalFrequency::_40Mhz) diff --git a/espflash/src/targets/esp32h2.rs b/espflash/src/targets/esp32h2.rs index 7f1adb18..f62f60f7 100644 --- a/espflash/src/targets/esp32h2.rs +++ b/espflash/src/targets/esp32h2.rs @@ -1,14 +1,14 @@ use std::collections::HashMap; use std::ops::Range; -use super::{Chip, Esp32Params, ReadEFuse, SpiRegisters, Target}; +#[cfg(feature = "serialport")] +use crate::connection::Connection; use crate::{ - connection::Connection, elf::FirmwareImage, error::Error, flasher::{FlashData, FlashFrequency}, image_format::{DirectBootFormat, IdfBootloaderFormat, ImageFormat, ImageFormatKind}, - targets::XtalFrequency, + targets::{Chip, Esp32Params, ReadEFuse, SpiRegisters, Target, XtalFrequency}, }; const CHIP_DETECT_MAGIC_VALUES: &[u32] = &[0xD7B7_3E80]; @@ -47,14 +47,17 @@ impl Target for Esp32h2 { FLASH_RANGES.iter().any(|range| range.contains(&addr)) } + #[cfg(feature = "serialport")] fn chip_features(&self, _connection: &mut Connection) -> Result, Error> { Ok(vec!["BLE"]) } + #[cfg(feature = "serialport")] fn major_chip_version(&self, connection: &mut Connection) -> Result { Ok((self.read_efuse(connection, 22)? >> 24) & 0x3) } + #[cfg(feature = "serialport")] fn minor_chip_version(&self, connection: &mut Connection) -> Result { let hi = (self.read_efuse(connection, 22)? >> 23) & 0x1; let lo = (self.read_efuse(connection, 20)? >> 18) & 0x7; @@ -62,6 +65,7 @@ impl Target for Esp32h2 { Ok((hi << 3) + lo) } + #[cfg(feature = "serialport")] fn crystal_freq(&self, _connection: &mut Connection) -> Result { // The ESP32-H2's XTAL has a fixed frequency of 32MHz. Ok(XtalFrequency::_32Mhz) diff --git a/espflash/src/targets/esp32p4.rs b/espflash/src/targets/esp32p4.rs index 0baa7bcd..7c93efdf 100644 --- a/espflash/src/targets/esp32p4.rs +++ b/espflash/src/targets/esp32p4.rs @@ -1,13 +1,13 @@ use std::ops::Range; -use super::{Chip, Esp32Params, ReadEFuse, SpiRegisters, Target}; +#[cfg(feature = "serialport")] +use crate::connection::Connection; use crate::{ - connection::Connection, elf::FirmwareImage, error::Error, flasher::{FlashData, FlashFrequency}, image_format::{DirectBootFormat, IdfBootloaderFormat, ImageFormat, ImageFormatKind}, - targets::XtalFrequency, + targets::{Chip, Esp32Params, ReadEFuse, SpiRegisters, Target, XtalFrequency}, }; const CHIP_DETECT_MAGIC_VALUES: &[u32] = &[0x0]; @@ -46,20 +46,24 @@ impl Target for Esp32p4 { FLASH_RANGES.iter().any(|range| range.contains(&addr)) } + #[cfg(feature = "serialport")] fn chip_features(&self, _connection: &mut Connection) -> Result, Error> { Ok(vec!["High-Performance MCU"]) } + #[cfg(feature = "serialport")] fn major_chip_version(&self, _connection: &mut Connection) -> Result { // TODO: https://github.com/espressif/esptool/blob/master/esptool/targets/esp32p4.py#L96 Ok(0) } + #[cfg(feature = "serialport")] fn minor_chip_version(&self, _connection: &mut Connection) -> Result { // TODO: https://github.com/espressif/esptool/blob/master/esptool/targets/esp32p4.py#L92 Ok(0) } + #[cfg(feature = "serialport")] fn crystal_freq(&self, _connection: &mut Connection) -> Result { // The ESP32-P4's XTAL has a fixed frequency of 40MHz. Ok(XtalFrequency::_40Mhz) diff --git a/espflash/src/targets/esp32s2.rs b/espflash/src/targets/esp32s2.rs index 215486cf..9179993c 100644 --- a/espflash/src/targets/esp32s2.rs +++ b/espflash/src/targets/esp32s2.rs @@ -1,7 +1,8 @@ use std::ops::Range; +#[cfg(feature = "serialport")] +use crate::connection::Connection; use crate::{ - connection::Connection, elf::FirmwareImage, error::{Error, UnsupportedImageFormatError}, flasher::{FlashData, FlashFrequency, FLASH_WRITE_SIZE}, @@ -33,6 +34,7 @@ const PARAMS: Esp32Params = Esp32Params::new( pub struct Esp32s2; impl Esp32s2 { + #[cfg(feature = "serialport")] /// Return if the connection is USB OTG fn connection_is_usb_otg(&self, connection: &mut Connection) -> Result { const UARTDEV_BUF_NO: u32 = 0x3fff_fd14; // Address which indicates OTG in use @@ -41,6 +43,7 @@ impl Esp32s2 { Ok(connection.read_reg(UARTDEV_BUF_NO)? == UARTDEV_BUF_NO_USB_OTG) } + #[cfg(feature = "serialport")] /// Return the block2 version based on eFuses fn get_block2_version(&self, connection: &mut Connection) -> Result { let blk2_word4 = self.read_efuse(connection, 27)?; @@ -49,6 +52,7 @@ impl Esp32s2 { Ok(block2_version) } + #[cfg(feature = "serialport")] /// Return the flash version based on eFuses fn get_flash_version(&self, connection: &mut Connection) -> Result { let blk1_word3 = self.read_efuse(connection, 20)?; @@ -57,6 +61,7 @@ impl Esp32s2 { Ok(flash_version) } + #[cfg(feature = "serialport")] /// Return the PSRAM version based on eFuses fn get_psram_version(&self, connection: &mut Connection) -> Result { let blk1_word3 = self.read_efuse(connection, 20)?; @@ -82,6 +87,7 @@ impl Target for Esp32s2 { FLASH_RANGES.iter().any(|range| range.contains(&addr)) } + #[cfg(feature = "serialport")] fn chip_features(&self, connection: &mut Connection) -> Result, Error> { let mut features = vec!["WiFi"]; @@ -112,10 +118,12 @@ impl Target for Esp32s2 { Ok(features) } + #[cfg(feature = "serialport")] fn major_chip_version(&self, connection: &mut Connection) -> Result { Ok(self.read_efuse(connection, 20)? >> 18 & 0x3) } + #[cfg(feature = "serialport")] fn minor_chip_version(&self, connection: &mut Connection) -> Result { let hi = self.read_efuse(connection, 20)? >> 20 & 0x1; let lo = self.read_efuse(connection, 21)? >> 4 & 0x7; @@ -123,11 +131,13 @@ impl Target for Esp32s2 { Ok((hi << 3) + lo) } + #[cfg(feature = "serialport")] fn crystal_freq(&self, _connection: &mut Connection) -> Result { // The ESP32-S2's XTAL has a fixed frequency of 40MHz. Ok(XtalFrequency::_40Mhz) } + #[cfg(feature = "serialport")] fn flash_write_size(&self, connection: &mut Connection) -> Result { Ok(if self.connection_is_usb_otg(connection)? { MAX_USB_BLOCK_SIZE @@ -170,6 +180,7 @@ impl Target for Esp32s2 { } } + #[cfg(feature = "serialport")] fn max_ram_block_size(&self, connection: &mut Connection) -> Result { Ok(if self.connection_is_usb_otg(connection)? { MAX_USB_BLOCK_SIZE diff --git a/espflash/src/targets/esp32s3.rs b/espflash/src/targets/esp32s3.rs index 79937c78..54396e14 100644 --- a/espflash/src/targets/esp32s3.rs +++ b/espflash/src/targets/esp32s3.rs @@ -1,7 +1,8 @@ use std::ops::Range; +#[cfg(feature = "serialport")] +use crate::connection::Connection; use crate::{ - connection::Connection, elf::FirmwareImage, error::Error, flasher::{FlashData, FlashFrequency}, @@ -29,11 +30,13 @@ const PARAMS: Esp32Params = Esp32Params::new( pub struct Esp32s3; impl Esp32s3 { + #[cfg(feature = "serialport")] /// Return the major BLK version based on eFuses fn blk_version_major(&self, connection: &mut Connection) -> Result { Ok(self.read_efuse(connection, 96)? & 0x3) } + #[cfg(feature = "serialport")] /// Return the minor BLK version based on eFuses fn blk_version_minor(&self, connection: &mut Connection) -> Result { Ok(self.read_efuse(connection, 20)? >> 24 & 0x7) @@ -56,10 +59,12 @@ impl Target for Esp32s3 { FLASH_RANGES.iter().any(|range| range.contains(&addr)) } + #[cfg(feature = "serialport")] fn chip_features(&self, _connection: &mut Connection) -> Result, Error> { Ok(vec!["WiFi", "BLE"]) } + #[cfg(feature = "serialport")] fn major_chip_version(&self, connection: &mut Connection) -> Result { let major = self.read_efuse(connection, 22)? >> 24 & 0x3; @@ -76,6 +81,7 @@ impl Target for Esp32s3 { } } + #[cfg(feature = "serialport")] fn minor_chip_version(&self, connection: &mut Connection) -> Result { let hi = self.read_efuse(connection, 22)? >> 23 & 0x1; let lo = self.read_efuse(connection, 20)? >> 18 & 0x7; @@ -83,6 +89,7 @@ impl Target for Esp32s3 { Ok((hi << 3) + lo) } + #[cfg(feature = "serialport")] fn crystal_freq(&self, _connection: &mut Connection) -> Result { // The ESP32-S3's XTAL has a fixed frequency of 40MHz. Ok(XtalFrequency::_40Mhz) diff --git a/espflash/src/targets/esp8266.rs b/espflash/src/targets/esp8266.rs index 9f054fd6..5f5ffeed 100644 --- a/espflash/src/targets/esp8266.rs +++ b/espflash/src/targets/esp8266.rs @@ -1,12 +1,13 @@ use std::ops::Range; +#[cfg(feature = "serialport")] +use crate::{connection::Connection, targets::bytes_to_mac_addr}; use crate::{ - connection::Connection, elf::FirmwareImage, error::{Error, UnsupportedImageFormatError}, flasher::FlashData, image_format::{Esp8266Format, ImageFormat, ImageFormatKind}, - targets::{bytes_to_mac_addr, Chip, ReadEFuse, SpiRegisters, Target, XtalFrequency}, + targets::{Chip, ReadEFuse, SpiRegisters, Target, XtalFrequency}, }; const CHIP_DETECT_MAGIC_VALUES: &[u32] = &[0xfff0_c101]; @@ -42,10 +43,12 @@ impl Target for Esp8266 { FLASH_RANGES.iter().any(|range| range.contains(&addr)) } + #[cfg(feature = "serialport")] fn chip_features(&self, _connection: &mut Connection) -> Result, Error> { Ok(vec!["WiFi"]) } + #[cfg(feature = "serialport")] fn major_chip_version(&self, _connection: &mut Connection) -> Result { Err(Error::UnsupportedFeature { chip: Chip::Esp8266, @@ -53,6 +56,7 @@ impl Target for Esp8266 { }) } + #[cfg(feature = "serialport")] fn minor_chip_version(&self, _connection: &mut Connection) -> Result { Err(Error::UnsupportedFeature { chip: Chip::Esp8266, @@ -60,6 +64,7 @@ impl Target for Esp8266 { }) } + #[cfg(feature = "serialport")] fn crystal_freq(&self, connection: &mut Connection) -> Result { let uart_div = connection.read_reg(UART_CLKDIV_REG)? & UART_CLKDIV_MASK; let est_xtal = (connection.get_baud()? * uart_div) / 1_000_000 / XTAL_CLK_DIVIDER; @@ -92,6 +97,7 @@ impl Target for Esp8266 { } } + #[cfg(feature = "serialport")] fn mac_address(&self, connection: &mut Connection) -> Result { let word0 = self.read_efuse(connection, 0)?; let word1 = self.read_efuse(connection, 1)?; diff --git a/espflash/src/targets/mod.rs b/espflash/src/targets/mod.rs index f1170f4d..dc871dda 100644 --- a/espflash/src/targets/mod.rs +++ b/espflash/src/targets/mod.rs @@ -45,6 +45,7 @@ mod esp32p4; mod esp32s2; mod esp32s3; mod esp8266; +#[cfg(feature = "serialport")] mod flash_target; /// Supported crystal frequencies @@ -305,6 +306,7 @@ pub trait ReadEFuse { /// Returns the base address of the eFuse register fn efuse_reg(&self) -> u32; + #[cfg(feature = "serialport")] /// Given an active connection, read the nth word of the eFuse region fn read_efuse(&self, connection: &mut Connection, n: u32) -> Result { let reg = self.efuse_reg() + (n * 0x4); @@ -317,9 +319,11 @@ pub trait Target: ReadEFuse { /// Is the provided address `addr` in flash? fn addr_is_flash(&self, addr: u32) -> bool; + #[cfg(feature = "serialport")] /// Enumerate the chip's features, read from eFuse fn chip_features(&self, connection: &mut Connection) -> Result, Error>; + #[cfg(feature = "serialport")] /// Determine the chip's revision number fn chip_revision(&self, connection: &mut Connection) -> Result<(u32, u32), Error> { let major = self.major_chip_version(connection)?; @@ -328,10 +332,13 @@ pub trait Target: ReadEFuse { Ok((major, minor)) } + #[cfg(feature = "serialport")] fn major_chip_version(&self, connection: &mut Connection) -> Result; + #[cfg(feature = "serialport")] fn minor_chip_version(&self, connection: &mut Connection) -> Result; + #[cfg(feature = "serialport")] /// What is the crystal frequency? fn crystal_freq(&self, connection: &mut Connection) -> Result; @@ -344,6 +351,7 @@ pub trait Target: ReadEFuse { HashMap::from(encodings) } + #[cfg(feature = "serialport")] /// Write size for flashing operations fn flash_write_size(&self, _connection: &mut Connection) -> Result { Ok(FLASH_WRITE_SIZE) @@ -358,6 +366,7 @@ pub trait Target: ReadEFuse { xtal_freq: XtalFrequency, ) -> Result + 'a>, Error>; + #[cfg(feature = "serialport")] /// What is the MAC address? fn mac_address(&self, connection: &mut Connection) -> Result { let word5 = self.read_efuse(connection, 17)?; @@ -370,6 +379,7 @@ pub trait Target: ReadEFuse { Ok(bytes_to_mac_addr(bytes)) } + #[cfg(feature = "serialport")] /// Maximum RAM block size for writing fn max_ram_block_size(&self, _connection: &mut Connection) -> Result { Ok(MAX_RAM_BLOCK_SIZE) @@ -392,6 +402,7 @@ pub trait Target: ReadEFuse { } } +#[cfg(feature = "serialport")] fn bytes_to_mac_addr(bytes: &[u8]) -> String { bytes .iter()