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Use latest published HALs and Xtensa toolchain #112

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Jan 30, 2023
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6 changes: 6 additions & 0 deletions .cargo/config.toml
Original file line number Diff line number Diff line change
Expand Up @@ -12,6 +12,8 @@ rustflags = [
runner = "espflash flash --monitor"

rustflags = [
#"-C", "linker=rust-lld",

"-C", "link-arg=-Tlinkall.x",
"-C", "link-arg=-Tesp32_rom_functions.x",
]
Expand All @@ -20,6 +22,8 @@ rustflags = [
runner = "espflash flash --monitor"

rustflags = [
#"-C", "linker=rust-lld",

"-C", "link-arg=-Tlinkall.x",
"-C", "link-arg=-Tesp32s3_rom_functions.x",
]
Expand All @@ -28,6 +32,8 @@ rustflags = [
runner = "espflash flash --monitor"

rustflags = [
#"-C", "linker=rust-lld",

"-C", "link-arg=-Tlinkall.x",
"-C", "link-arg=-Tesp32s2_rom_functions.x",

Expand Down
24 changes: 11 additions & 13 deletions Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -11,13 +11,15 @@ opt-level = 3
embedded-hal = "0.2.3"
nb = "1.0.0"
void = { version = "1.0.2", default-features = false }
esp32c3-hal = { version = "0.4.0", optional = true }
esp32c2-hal = { version = "0.2.0", optional = true }
esp32-hal = { version = "0.7.0", optional = true, features = [ "rt" ] }
esp32s3-hal = { version = "0.4.0", optional = true, features = [ "rt" ] }
esp32s2-hal = { version = "0.4.0", optional = true, features = [ "rt" ] }
riscv-rt = { version = "0.10.0", optional = true }
riscv = { version = "0.10.0", optional = true }
esp32c3-hal = { version = "0.5.0", optional = true }
esp32c2-hal = { version = "0.3.0", optional = true }
esp32-hal = { version = "0.8.0", optional = true, features = [ "rt" ] }
esp32s3-hal = { version = "0.5.0", optional = true, features = [ "rt" ] }
esp32s2-hal = { version = "0.5.0", optional = true, features = [ "rt" ] }
esp32c3 = { version = "0.9.1", features = ["critical-section"], optional = true }
esp32c2 = { version = "0.6.1", features = ["critical-section"], optional = true }
riscv-rt = { version = "0.11.0", optional = true }
riscv = { version = "0.10.1", optional = true }
xtensa-lx-rt = { version = "0.14.0", optional = true }
xtensa-lx = { version = "0.7.0", optional = true }
smoltcp = { version = "0.8.2", default-features=false, features = ["proto-igmp", "proto-ipv4", "socket-tcp", "socket-icmp", "socket-udp", "medium-ethernet", "proto-dhcpv4", "socket-raw", "socket-dhcpv4"] }
Expand Down Expand Up @@ -58,8 +60,8 @@ xtensa-atomic-emulation-trap = "0.3.0"

[features]
default = [ "utils" ]
esp32c3 = [ "riscv-target", "riscv", "riscv-rt", "esp32c3-hal" ]
esp32c2 = [ "riscv-target", "riscv", "riscv-rt", "esp32c2-hal" ]
esp32c3 = [ "riscv-target", "riscv", "riscv-rt", "esp32c3-hal", "dep:esp32c3" ]
esp32c2 = [ "riscv-target", "riscv", "riscv-rt", "esp32c2-hal", "dep:esp32c2" ]
esp32 = [ "esp32-hal", "xtensa-lx-rt/esp32", "xtensa-lx/esp32" ]
esp32s3 = [ "esp32s3-hal", "xtensa-lx-rt/esp32s3", "xtensa-lx/esp32s3" ]
esp32s2 = [ "esp32s2-hal", "xtensa-lx-rt/esp32s2", "xtensa-lx/esp32s2" ]
Expand All @@ -72,7 +74,3 @@ wifi = []
ble = [ "esp32-hal?/bluetooth" ]
phy_enable_usb = []
ps_min_modem = []

# for now esp32c2 PAC is missing some interrupts
[patch.crates-io]
esp32c2 = { git = "https://github.com/esp-rs/esp-pacs", package = "esp32c2", rev = "1f7aee9" }
14 changes: 7 additions & 7 deletions README.md
Original file line number Diff line number Diff line change
Expand Up @@ -53,12 +53,12 @@ https://github.com/esp-rs/esp-wireless-drivers-3rdparty/ (commit f4caebff200e8f6
| `cargo "+esp" run --example ble --release --target xtensa-esp32-none-elf --features "esp32,ble"` | ESP32 |
| `cargo "+esp" run --example dhcp --release --target xtensa-esp32-none-elf --features "esp32,embedded-svc,wifi"` | ESP32 |
| `cargo "+esp" run --example static_ip --release --target xtensa-esp32-none-elf --features "esp32,embedded-svc,wifi"` | ESP32 |
| `CARGO_PROFILE_RELEASE_OPT_LEVEL=1 cargo "+esp" run --example ble --release --target xtensa-esp32s3-none-elf --features "esp32s3,ble"` | ESP32-S3 |
| `CARGO_PROFILE_RELEASE_OPT_LEVEL=1 cargo "+esp" run --example dhcp --release --target xtensa-esp32s3-none-elf --features "esp32s3,embedded-svc,wifi"` | ESP32-S3|
| `CARGO_PROFILE_RELEASE_OPT_LEVEL=1 cargo "+esp" run --example static_ip --release --target xtensa-esp32s3-none-elf --features "esp32s3,embedded-svc,wifi"` | ESP32-S3|
| `CARGO_PROFILE_RELEASE_OPT_LEVEL=1 cargo "+esp" run --example coex --release --target xtensa-esp32s3-none-elf --features "esp32s3,embedded-svc,wifi,ble"` | ESP32-S3|
| `cargo "+esp" run --example dhcp --release --target xtensa-esp32s2-none-elf --features "esp32s2,embedded-svc,wifi"` | ESP32-S2|
| `cargo "+esp" run --example static_ip --release --target xtensa-esp32s2-none-elf --features "esp32s2,embedded-svc,wifi"` | ESP32-S2|
| `cargo "+esp" run --example ble --release --target xtensa-esp32s3-none-elf --features "esp32s3,ble"` | ESP32-S3 |
| `cargo "+esp" run --example dhcp --release --target xtensa-esp32s3-none-elf --features "esp32s3,embedded-svc,wifi"` | ESP32-S3|
| `cargo "+esp" run --example static_ip --release --target xtensa-esp32s3-none-elf --features "esp32s3,embedded-svc,wifi"` | ESP32-S3|
| `cargo "+esp" run --example coex --release --target xtensa-esp32s3-none-elf --features "esp32s3,embedded-svc,wifi,ble"` | ESP32-S3|
| `CARGO_PROFILE_RELEASE_OPT_LEVEL=2 cargo "+esp" run --example dhcp --release --target xtensa-esp32s2-none-elf --features "esp32s2,embedded-svc,wifi"` | ESP32-S2|
| `CARGO_PROFILE_RELEASE_OPT_LEVEL=2 cargo "+esp" run --example static_ip --release --target xtensa-esp32s2-none-elf --features "esp32s2,embedded-svc,wifi"` | ESP32-S2|
| `cargo "+nightly" run --example ble --release --target riscv32imc-unknown-none-elf --features "esp32c2,ble"` | ESP32-C2|
| `cargo "+nightly" run --example dhcp --release --target riscv32imc-unknown-none-elf --features "esp32c2,embedded-svc,wifi"` | ESP32-C2|
| `cargo "+nightly" run --example static_ip --release --target riscv32imc-unknown-none-elf --features "esp32c2,embedded-svc,wifi"`| ESP32-C2|
Expand All @@ -79,7 +79,7 @@ Additionally you can specify these features

It is necessary to build with optimization level 2 or 3 since otherwise it might not even be able to connect or advertise.

On ESP32-S3 you need to use optimization level 1 for now.
On ESP32-S2 you need to use optimization level 2 for now.

To make it work also for your debug builds add this to your `Cargo.toml`

Expand Down
10 changes: 5 additions & 5 deletions build.rs
Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,7 @@ use std::path::PathBuf;
fn main() -> Result<(), String> {
match std::env::var("OPT_LEVEL") {
Ok(level) => {
#[cfg(not(feature = "esp32s3"))]
#[cfg(not(feature = "esp32s2"))]
if level != "2" && level != "3" {
let message = format!(
"esp-wifi should be built with optimization level 2 or 3 - yours is {}.
Expand All @@ -24,11 +24,11 @@ fn main() -> Result<(), String> {
println!("cargo:warning={}", message);
}

// on ESP32-S3 we currently need opt-level 1 because of mis-optimizations
#[cfg(feature = "esp32s3")]
if level != "1" {
// on ESP32-S2 we currently need opt-level 2 because of mis-optimizations
#[cfg(feature = "esp32s2")]
if level != "2" {
let message = format!(
"esp-wifi should be built with optimization level 1 for ESP32-S3 for now - yours is {}.
"esp-wifi should be built with optimization level 1 for ESP32-S2 for now - yours is {}.
See https://github.com/esp-rs/esp-wifi",
level
)
Expand Down
4 changes: 2 additions & 2 deletions examples/ble.rs
Original file line number Diff line number Diff line change
Expand Up @@ -26,7 +26,7 @@ use esp_println::{logger::init_logger, println};
use esp_wifi::{ble::controller::BleConnector, initialize};
use hal::{
clock::{ClockControl, CpuClock},
pac::Peripherals,
peripherals::*,
prelude::*,
Rng, Rtc,
};
Expand All @@ -44,7 +44,7 @@ fn main() -> ! {
init_logger(log::LevelFilter::Info);
esp_wifi::init_heap();

let peripherals = Peripherals::take().unwrap();
let peripherals = Peripherals::take();

#[cfg(not(feature = "esp32"))]
let system = peripherals.SYSTEM.split();
Expand Down
4 changes: 2 additions & 2 deletions examples/coex.rs
Original file line number Diff line number Diff line change
Expand Up @@ -34,7 +34,7 @@ use hal::{
clock::{ClockControl, CpuClock},
Rng,
};
use hal::{pac::Peripherals, prelude::*, Rtc};
use hal::{peripherals::Peripherals, prelude::*, Rtc};
use smoltcp::wire::Ipv4Address;

#[cfg(feature = "esp32c3")]
Expand All @@ -53,7 +53,7 @@ fn main() -> ! {
init_logger(log::LevelFilter::Info);
esp_wifi::init_heap();

let peripherals = Peripherals::take().unwrap();
let peripherals = Peripherals::take();

#[cfg(not(feature = "esp32"))]
let system = peripherals.SYSTEM.split();
Expand Down
4 changes: 2 additions & 2 deletions examples/dhcp.rs
Original file line number Diff line number Diff line change
Expand Up @@ -27,7 +27,7 @@ use esp_wifi::{create_network_stack_storage, network_stack_storage};
use esp_wifi::{current_millis, initialize};
use hal::clock::{ClockControl, CpuClock};
use hal::Rng;
use hal::{pac::Peripherals, prelude::*, Rtc};
use hal::{peripherals::Peripherals, prelude::*, Rtc};
use smoltcp::wire::Ipv4Address;

#[cfg(any(feature = "esp32c3", feature = "esp32c2"))]
Expand All @@ -46,7 +46,7 @@ fn main() -> ! {
init_logger(log::LevelFilter::Info);
esp_wifi::init_heap();

let peripherals = Peripherals::take().unwrap();
let peripherals = Peripherals::take();

#[cfg(not(feature = "esp32"))]
let system = peripherals.SYSTEM.split();
Expand Down
4 changes: 2 additions & 2 deletions examples/static_ip.rs
Original file line number Diff line number Diff line change
Expand Up @@ -27,7 +27,7 @@ use esp_wifi::{create_network_stack_storage, network_stack_storage};
use esp_wifi::{current_millis, initialize};
use hal::clock::{ClockControl, CpuClock};
use hal::Rng;
use hal::{pac::Peripherals, prelude::*, Rtc};
use hal::{peripherals::Peripherals, prelude::*, Rtc};

#[cfg(any(feature = "esp32c3", feature = "esp32c2"))]
use hal::system::SystemExt;
Expand All @@ -47,7 +47,7 @@ fn main() -> ! {
init_logger(log::LevelFilter::Info);
esp_wifi::init_heap();

let peripherals = Peripherals::take().unwrap();
let peripherals = Peripherals::take();

#[cfg(not(feature = "esp32"))]
let system = peripherals.SYSTEM.split();
Expand Down
4 changes: 2 additions & 2 deletions smoketest.bat
Original file line number Diff line number Diff line change
Expand Up @@ -22,7 +22,7 @@ cargo "+esp" run --example ble --release --target xtensa-esp32-none-elf --featur
cargo "+esp" run --example dhcp --release --target xtensa-esp32-none-elf --features "esp32,embedded-svc,wifi"
cargo "+esp" run --example static_ip --release --target xtensa-esp32-none-elf --features "esp32,embedded-svc,wifi"

set CARGO_PROFILE_RELEASE_OPT_LEVEL=1
set CARGO_PROFILE_RELEASE_OPT_LEVEL=3
echo.
echo Connect ESP32-S3
pause
Expand All @@ -31,7 +31,7 @@ cargo "+esp" run --example dhcp --release --target xtensa-esp32s3-none-elf --fea
cargo "+esp" run --example static_ip --release --target xtensa-esp32s3-none-elf --features "esp32s3,embedded-svc,wifi"
cargo "+esp" run --example coex --release --target xtensa-esp32s3-none-elf --features "esp32s3,embedded-svc,wifi,ble"

set CARGO_PROFILE_RELEASE_OPT_LEVEL=3
set CARGO_PROFILE_RELEASE_OPT_LEVEL=2
echo.
echo Connect ESP32-S2
pause
Expand Down
3 changes: 1 addition & 2 deletions src/ble/os_adapter_esp32c3.rs
Original file line number Diff line number Diff line change
@@ -1,6 +1,5 @@
use super::*;
use crate::binary::include::esp_bt_controller_config_t;
use esp32c3_hal as hal;
use log::trace;

pub(crate) static mut BT_INTERRUPT_FUNCTION5: (
Expand Down Expand Up @@ -180,7 +179,7 @@ pub(crate) fn create_ble_config() -> esp_bt_controller_config_t {
pub(crate) unsafe extern "C" fn interrupt_on(intr_num: i32) {
trace!("interrupt_on {}", intr_num);

(*hal::pac::INTERRUPT_CORE0::PTR)
(*esp32c3::INTERRUPT_CORE0::PTR)
.cpu_int_enable
.modify(|r, w| w.bits(r.bits() | 1 << intr_num));
}
Expand Down
2 changes: 1 addition & 1 deletion src/common_adapter/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -40,7 +40,7 @@ pub(crate) static mut RANDOM_GENERATOR: Option<Rng> = None;

pub fn init_rng(rng: hal::Rng) {
unsafe {
crate::common_adapter::RANDOM_GENERATOR = Some(rng);
crate::common_adapter::RANDOM_GENERATOR = Some(core::mem::transmute(rng));
}
}

Expand Down
4 changes: 3 additions & 1 deletion src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -22,6 +22,8 @@ use esp32s2_hal as hal;
#[cfg(feature = "esp32s3")]
use esp32s3_hal as hal;

use hal::*;

use fugit::MegahertzU32;
use hal::clock::Clocks;
use linked_list_allocator::Heap;
Expand Down Expand Up @@ -165,7 +167,7 @@ pub enum InitializationError {
/// Initialize for using WiFi / BLE
/// This will initialize internals and also initialize WiFi and BLE
pub fn initialize(
timg1_timer0: hal::timer::Timer<hal::timer::Timer0<hal::pac::TIMG1>>,
timg1_timer0: hal::timer::Timer<hal::timer::Timer0<hal::peripherals::TIMG1>>,
rng: hal::Rng,
clocks: &Clocks,
) -> Result<(), InitializationError> {
Expand Down
28 changes: 22 additions & 6 deletions src/timer_esp32.rs
Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@ use atomic_polyfill::{AtomicU64, Ordering};
use critical_section::Mutex;
use esp32_hal::{
interrupt,
pac::{self, TIMG1},
peripherals::{self, TIMG1},
prelude::*,
timer::{Timer, Timer0},
};
Expand Down Expand Up @@ -39,18 +39,34 @@ fn read_timer_value() -> u64 {

pub fn setup_timer_isr(timg1_timer0: Timer<Timer0<TIMG1>>) {
let mut timer1 = timg1_timer0;
interrupt::enable(pac::Interrupt::TG1_T0_LEVEL, interrupt::Priority::Priority2).unwrap();
interrupt::enable(
peripherals::Interrupt::TG1_T0_LEVEL,
interrupt::Priority::Priority2,
)
.unwrap();

#[cfg(feature = "wifi")]
interrupt::enable(pac::Interrupt::WIFI_MAC, interrupt::Priority::Priority1).unwrap();
interrupt::enable(
peripherals::Interrupt::WIFI_MAC,
interrupt::Priority::Priority1,
)
.unwrap();

#[cfg(feature = "wifi")]
interrupt::enable(pac::Interrupt::WIFI_BB, interrupt::Priority::Priority1).unwrap();
interrupt::enable(
peripherals::Interrupt::WIFI_BB,
interrupt::Priority::Priority1,
)
.unwrap();

#[cfg(feature = "ble")]
{
interrupt::enable(pac::Interrupt::RWBT, interrupt::Priority::Priority1).unwrap();
interrupt::enable(pac::Interrupt::BT_BB, interrupt::Priority::Priority1).unwrap();
interrupt::enable(peripherals::Interrupt::RWBT, interrupt::Priority::Priority1).unwrap();
interrupt::enable(
peripherals::Interrupt::BT_BB,
interrupt::Priority::Priority1,
)
.unwrap();
}

timer1.listen();
Expand Down
8 changes: 4 additions & 4 deletions src/timer_esp32c2.rs
Original file line number Diff line number Diff line change
@@ -1,11 +1,11 @@
use core::cell::RefCell;

use critical_section::Mutex;
use esp32c2 as pac;
use esp32c2_hal as hal;
use esp32c2_hal::interrupt::TrapFrame;
use esp32c2_hal::prelude::*;
use hal::pac;
use hal::pac::Interrupt;
use hal::peripherals::Interrupt;
use hal::systimer::{Alarm, Periodic, Target};

use crate::{binary, preempt::preempt::task_switch};
Expand Down Expand Up @@ -158,7 +158,7 @@ fn SYSTIMER_TARGET0(trap_frame: &mut TrapFrame) {
fn SW_INTR_3(trap_frame: &mut TrapFrame) {
unsafe {
// clear SW_INTR_3
(&*esp32c2_hal::pac::SYSTEM::PTR)
(&*pac::SYSTEM::PTR)
.cpu_intr_from_cpu_3
.modify(|_, w| w.cpu_intr_from_cpu_3().clear_bit());
}
Expand All @@ -176,7 +176,7 @@ fn SW_INTR_3(trap_frame: &mut TrapFrame) {

pub fn yield_task() {
unsafe {
(&*esp32c2_hal::pac::SYSTEM::PTR)
(&*pac::SYSTEM::PTR)
.cpu_intr_from_cpu_3
.modify(|_, w| w.cpu_intr_from_cpu_3().set_bit());
}
Expand Down
8 changes: 4 additions & 4 deletions src/timer_esp32c3.rs
Original file line number Diff line number Diff line change
@@ -1,11 +1,11 @@
use core::cell::RefCell;

use critical_section::Mutex;
use esp32c3 as pac;
use esp32c3_hal as hal;
use esp32c3_hal::interrupt::TrapFrame;
use esp32c3_hal::prelude::*;
use hal::pac;
use hal::pac::Interrupt;
use hal::peripherals::Interrupt;
use hal::systimer::{Alarm, Periodic, Target};

use crate::{binary, preempt::preempt::task_switch};
Expand Down Expand Up @@ -176,7 +176,7 @@ fn SYSTIMER_TARGET0(trap_frame: &mut TrapFrame) {
fn SW_INTR_3(trap_frame: &mut TrapFrame) {
unsafe {
// clear SW_INTR_3
(&*esp32c3_hal::pac::SYSTEM::PTR)
(&*pac::SYSTEM::PTR)
.cpu_intr_from_cpu_3
.modify(|_, w| w.cpu_intr_from_cpu_3().clear_bit());
}
Expand All @@ -194,7 +194,7 @@ fn SW_INTR_3(trap_frame: &mut TrapFrame) {

pub fn yield_task() {
unsafe {
(&*esp32c3_hal::pac::SYSTEM::PTR)
(&*pac::SYSTEM::PTR)
.cpu_intr_from_cpu_3
.modify(|_, w| w.cpu_intr_from_cpu_3().set_bit());
}
Expand Down
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