From 09e000c910b669d8869cd3bdfe0c88e20f99d0fa Mon Sep 17 00:00:00 2001 From: Anthony Grondin <104731965+AnthonyGrondin@users.noreply.github.com> Date: Sat, 4 Mar 2023 01:36:09 -0500 Subject: [PATCH] add `software_reset`, `software_reset_cpu` and `rtc_get_wakeup_cause` --- esp-hal-common/src/lib.rs | 1 + esp-hal-common/src/reset.rs | 17 +++++++++++++++++ esp-hal-common/src/rtc_cntl/mod.rs | 10 +++++++++- esp32-hal/ld/rom-functions.x | 3 +++ esp32-hal/src/lib.rs | 1 + esp32c2-hal/ld/rom-functions.x | 3 +++ esp32c2-hal/src/lib.rs | 1 + esp32c3-hal/ld/rom-functions.x | 3 +++ esp32c3-hal/src/lib.rs | 1 + esp32c6-hal/ld/rom-functions.x | 3 +++ esp32c6-hal/src/lib.rs | 1 + esp32s2-hal/ld/rom-functions.x | 3 +++ esp32s2-hal/src/lib.rs | 1 + esp32s3-hal/ld/rom-functions.x | 3 +++ esp32s3-hal/src/lib.rs | 1 + 15 files changed, 51 insertions(+), 1 deletion(-) create mode 100644 esp-hal-common/src/reset.rs diff --git a/esp-hal-common/src/lib.rs b/esp-hal-common/src/lib.rs index 763522ea7ec..ea6f43412df 100644 --- a/esp-hal-common/src/lib.rs +++ b/esp-hal-common/src/lib.rs @@ -88,6 +88,7 @@ pub mod prelude; pub mod pulse_control; #[cfg(radio)] pub mod radio; +pub mod reset; pub mod rng; pub mod rom; pub mod rtc_cntl; diff --git a/esp-hal-common/src/reset.rs b/esp-hal-common/src/reset.rs new file mode 100644 index 00000000000..f45ae940d5d --- /dev/null +++ b/esp-hal-common/src/reset.rs @@ -0,0 +1,17 @@ +use crate::rtc_cntl::SocResetReason; + +pub fn software_reset() { + unsafe { crate::rtc_cntl::software_reset() } + +} +pub fn software_reset_cpu() { + unsafe { crate::rtc_cntl::software_reset_cpu() } +} + +pub fn get_reset_reason() -> Option { + crate::rtc_cntl::get_reset_reason(crate::get_core()) +} + +pub fn get_wakeup_cause() -> u32 { + crate::rtc_cntl::get_wakeup_cause() +} diff --git a/esp-hal-common/src/rtc_cntl/mod.rs b/esp-hal-common/src/rtc_cntl/mod.rs index 2ec0d77dd97..4ee3ebff4cf 100644 --- a/esp-hal-common/src/rtc_cntl/mod.rs +++ b/esp-hal-common/src/rtc_cntl/mod.rs @@ -3,7 +3,7 @@ use embedded_hal::watchdog::{Watchdog, WatchdogDisable, WatchdogEnable}; use fugit::HertzU32; use fugit::MicrosDurationU64; -use self::rtc::SocResetReason; +pub use self::rtc::SocResetReason; #[cfg(not(esp32c6))] use crate::clock::{Clock, XtalClock}; #[cfg(not(esp32))] @@ -37,6 +37,9 @@ extern "C" { #[allow(dead_code)] fn ets_delay_us(us: u32); fn rtc_get_reset_reason(cpu_num: u32) -> u32; + fn rtc_get_wakeup_cause() -> u32; + pub fn software_reset_cpu(); + pub fn software_reset(); } #[cfg(not(esp32c6))] @@ -810,3 +813,8 @@ pub fn get_reset_reason(cpu: Cpu) -> Option { reason } + +pub fn get_wakeup_cause() -> u32 { + let cause = unsafe { rtc_get_wakeup_cause() }; + cause +} diff --git a/esp32-hal/ld/rom-functions.x b/esp32-hal/ld/rom-functions.x index 510ea2f24d9..e0e585cdb60 100644 --- a/esp32-hal/ld/rom-functions.x +++ b/esp32-hal/ld/rom-functions.x @@ -3,3 +3,6 @@ PROVIDE(ets_update_cpu_frequency_rom = 0x40008550); PROVIDE(rom_i2c_writeReg = 0x400041a4); PROVIDE(rom_i2c_writeReg_Mask = 0x400041fc); PROVIDE(rtc_get_reset_reason = 0x400081d4); +PROVIDE(rtc_get_wakeup_cause = 0x400081f4); +PROVIDE(software_reset = 0x4000824c); +PROVIDE(software_reset_cpu = 0x40008264); diff --git a/esp32-hal/src/lib.rs b/esp32-hal/src/lib.rs index 1421e6cd2c8..a7ce2b544a4 100644 --- a/esp32-hal/src/lib.rs +++ b/esp32-hal/src/lib.rs @@ -25,6 +25,7 @@ pub use esp_hal_common::{ peripherals, prelude, pulse_control, + reset, sha, spi, system, diff --git a/esp32c2-hal/ld/rom-functions.x b/esp32c2-hal/ld/rom-functions.x index e028a6ad3f9..f349eac3938 100644 --- a/esp32c2-hal/ld/rom-functions.x +++ b/esp32c2-hal/ld/rom-functions.x @@ -3,3 +3,6 @@ PROVIDE(ets_update_cpu_frequency_rom = 0x40000774); PROVIDE(rom_i2c_writeReg = 0x400022f4); PROVIDE(rom_i2c_writeReg_Mask = 0x400022fc); PROVIDE(rtc_get_reset_reason = 0x40000018); +PROVIDE(rtc_get_wakeup_cause = 0x40000020); +PROVIDE(software_reset = 0x40000088); +PROVIDE(software_reset_cpu = 0x4000008c); diff --git a/esp32c2-hal/src/lib.rs b/esp32c2-hal/src/lib.rs index af6fd8fc0c8..d2f41a1b125 100644 --- a/esp32c2-hal/src/lib.rs +++ b/esp32c2-hal/src/lib.rs @@ -17,6 +17,7 @@ pub use esp_hal_common::{ macros, peripherals, prelude, + reset, riscv, sha, spi, diff --git a/esp32c3-hal/ld/rom-functions.x b/esp32c3-hal/ld/rom-functions.x index 0c4c3555fb9..56d159e1bae 100644 --- a/esp32c3-hal/ld/rom-functions.x +++ b/esp32c3-hal/ld/rom-functions.x @@ -10,3 +10,6 @@ PROVIDE(ets_update_cpu_frequency_rom = 0x40000588); PROVIDE(rom_i2c_writeReg = 0x4000195c); PROVIDE(rom_i2c_writeReg_Mask = 0x40001960); PROVIDE(rtc_get_reset_reason = 0x40000018); +PROVIDE(rtc_get_wakeup_cause = 0x40000024); +PROVIDE(software_reset = 0x40000090); +PROVIDE(software_reset_cpu = 0x40000094); diff --git a/esp32c3-hal/src/lib.rs b/esp32c3-hal/src/lib.rs index 739e9f30225..65526466664 100644 --- a/esp32c3-hal/src/lib.rs +++ b/esp32c3-hal/src/lib.rs @@ -24,6 +24,7 @@ pub use esp_hal_common::{ peripherals, prelude, pulse_control, + reset, riscv, sha, spi, diff --git a/esp32c6-hal/ld/rom-functions.x b/esp32c6-hal/ld/rom-functions.x index 60f3c118301..1fc840147e4 100644 --- a/esp32c6-hal/ld/rom-functions.x +++ b/esp32c6-hal/ld/rom-functions.x @@ -9,4 +9,7 @@ PROVIDE(cache_resume_icache = 0x4000069c); PROVIDE(ets_delay_us = 0x40000040); PROVIDE(ets_update_cpu_frequency_rom = 0x40000048); PROVIDE(rtc_get_reset_reason = 0x40000018); +PROVIDE(rtc_get_wakeup_cause = 0x40000020); ets_update_cpu_frequency = 0x40000048; +PROVIDE(software_reset = 0x40000090); +PROVIDE(software_reset_cpu = 0x40000094); diff --git a/esp32c6-hal/src/lib.rs b/esp32c6-hal/src/lib.rs index 4b517a16307..8ea19c2f2c6 100644 --- a/esp32c6-hal/src/lib.rs +++ b/esp32c6-hal/src/lib.rs @@ -22,6 +22,7 @@ pub use esp_hal_common::{ peripherals, prelude, pulse_control, + reset, riscv, sha, spi, diff --git a/esp32s2-hal/ld/rom-functions.x b/esp32s2-hal/ld/rom-functions.x index 7c566b6a3c5..23692826f0a 100644 --- a/esp32s2-hal/ld/rom-functions.x +++ b/esp32s2-hal/ld/rom-functions.x @@ -3,3 +3,6 @@ PROVIDE(ets_update_cpu_frequency_rom = 0x4000d8a4); PROVIDE(rom_i2c_writeReg = 0x4000a9a8); PROVIDE(rom_i2c_writeReg_Mask = 0x4000aa00); PROVIDE(rtc_get_reset_reason = 0x4000ff58); +PROVIDE(rtc_get_wakeup_cause = 0x4000ff7c); +PROVIDE(software_reset = 0x40010068); +PROVIDE(software_reset_cpu = 0x40010080); diff --git a/esp32s2-hal/src/lib.rs b/esp32s2-hal/src/lib.rs index c1be136e8ac..8ab9e32eac8 100644 --- a/esp32s2-hal/src/lib.rs +++ b/esp32s2-hal/src/lib.rs @@ -26,6 +26,7 @@ pub use esp_hal_common::{ peripherals, prelude, pulse_control, + reset, sha, spi, system, diff --git a/esp32s3-hal/ld/rom-functions.x b/esp32s3-hal/ld/rom-functions.x index 44328429bc6..fa286927266 100644 --- a/esp32s3-hal/ld/rom-functions.x +++ b/esp32s3-hal/ld/rom-functions.x @@ -3,3 +3,6 @@ PROVIDE(ets_update_cpu_frequency_rom = 0x40043164); PROVIDE(rom_i2c_writeReg = 0x40005d60); PROVIDE(rom_i2c_writeReg_Mask = 0x40005d6c); PROVIDE(rtc_get_reset_reason = 0x4000057c); +PROVIDE(rtc_get_wakeup_cause = 0x400005a0); +PROVIDE(software_reset = 0x400006d8); +PROVIDE(software_reset_cpu = 0x400006e4); diff --git a/esp32s3-hal/src/lib.rs b/esp32s3-hal/src/lib.rs index f6613eb4092..76a60cc17f4 100644 --- a/esp32s3-hal/src/lib.rs +++ b/esp32s3-hal/src/lib.rs @@ -26,6 +26,7 @@ pub use esp_hal_common::{ peripherals, prelude, pulse_control, + reset, sha, spi, system,