From a9a5d9b0b3552f459b018c1346e9ec8a704f686c Mon Sep 17 00:00:00 2001
From: dominaezzz <dominicfischer7@gmail.com>
Date: Thu, 23 May 2024 13:05:04 +0100
Subject: [PATCH] Clear AFIFOs before transfers

---
 esp-hal/src/spi/master.rs | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/esp-hal/src/spi/master.rs b/esp-hal/src/spi/master.rs
index 08c9d7fe747..2d2aead62cb 100644
--- a/esp-hal/src/spi/master.rs
+++ b/esp-hal/src/spi/master.rs
@@ -852,6 +852,15 @@ where
                 .bit(is_high_part)
         });
 
+        self.spi.register_block().dma_conf().modify(|_, w| {
+            w.rx_afifo_rst()
+                .set_bit()
+                .buf_afifo_rst()
+                .set_bit()
+                .dma_afifo_rst()
+                .set_bit()
+        });
+
         self.spi.start_operation();
 
         Ok(FifoTransfer { spi: self, fifo })
@@ -3217,6 +3226,15 @@ pub trait Instance: private::Sealed {
 
         self.configure_datalen(data_len as u32 * 8);
 
+        self.register_block().dma_conf().modify(|_, w| {
+            w.rx_afifo_rst()
+                .set_bit()
+                .buf_afifo_rst()
+                .set_bit()
+                .dma_afifo_rst()
+                .set_bit()
+        });
+
         self.start_operation();
     }