diff --git a/syntaxes/systemverilog.tmLanguage.yaml b/syntaxes/systemverilog.tmLanguage.yaml
index c6b1689..d248e5a 100644
--- a/syntaxes/systemverilog.tmLanguage.yaml
+++ b/syntaxes/systemverilog.tmLanguage.yaml
@@ -30,6 +30,7 @@ patterns:
   - include: '#storage-scope'
   - include: '#attributes'
   - include: '#imports'
+  - include: '#imports-dpi-function'
   - include: '#operators'
   - include: '#constants'
   - include: '#identifiers'
@@ -44,7 +45,7 @@ repository:
         name: storage.type.function.systemverilog
       '3':
         name: storage.modifier.systemverilog
-    end: ;
+    end: (;)
     endCaptures:
       '0':
         name: punctuation.definition.function.end.systemverilog
@@ -759,6 +760,45 @@ repository:
           - include: '#operators'
           - include: '#identifiers'
     name: meta.import.systemverilog
+  imports-dpi-function:
+    begin: '[ \t\r\n]*\b(import|export)[ \t\r\n]+(\"[a-zA-Z_][a-zA-Z0-9_$]*\")[ \t\r\n]+(function)\b'
+    beginCaptures:
+      '1':
+        name: keyword.control.systemverilog
+      '2':
+        name: string.quoted.double.systemverilog
+      '3':
+        name: storage.type.function.systemverilog
+    end: '(;)'
+    endCaptures:
+      '1':
+        name: punctuation.module.instantiation.end.systemverilog
+    patterns:
+      - match: >-
+          [ \t\r\n]*(?:\b([a-zA-Z_][a-zA-Z0-9_$]*)(::))?([a-zA-Z_][a-zA-Z0-9_$]*\b[ \t\r\n]+)?(?:\b(signed|unsigned)\b[ \t\r\n]*)?(?:(\[[a-zA-Z0-9_:$\.\-\+\*/%`' \t\r\n\[\]\(\)]*\])[ \t\r\n]*)?(?:\b([a-zA-Z_][a-zA-Z0-9_$]*)\b[ \t\r\n]*)(?=\(|;)
+        captures:
+          '1':
+            name: support.type.scope.systemverilog
+          '2':
+            name: keyword.operator.scope.systemverilog
+          '3':
+            patterns:
+              - include: '#built-ins'
+              - match: '[a-zA-Z_][a-zA-Z0-9_$]*'
+                name: storage.type.user-defined.systemverilog
+          '4':
+            patterns:
+              - include: '#modifiers'
+          '5':
+            patterns:
+              - include: '#selects'
+          '6':
+            name: entity.name.function.systemverilog
+      - include: '#keywords'
+      - include: '#port-net-parameter'
+      - include: '#base-grammar'
+      - include: '#identifiers'
+    name: meta.import-dpi.systemverilog
   tables:
     begin: '[ \t\r\n]*\b(table)\b'
     beginCaptures: