From 50ec953022f6bc2e4550c7fc4ee3364ba9ab2cad Mon Sep 17 00:00:00 2001
From: Irwin D'Souza <dsouzai@ca.ibm.com>
Date: Mon, 13 May 2019 11:51:52 -0400
Subject: [PATCH] Add Platform Agnostic TM Query

This commit adds a wrapper API around existing Transactional Memory (TM)
queries in order to have a single query that is common across all
platforms.

Signed-off-by: Irwin D'Souza <dsouzai@ca.ibm.com>
---
 compiler/env/OMRCPU.hpp   | 2 ++
 compiler/p/env/OMRCPU.cpp | 6 ++++++
 compiler/p/env/OMRCPU.hpp | 7 +++++++
 compiler/x/env/OMRCPU.cpp | 8 ++++++++
 compiler/x/env/OMRCPU.hpp | 7 +++++++
 compiler/z/env/OMRCPU.cpp | 8 +++++++-
 compiler/z/env/OMRCPU.hpp | 6 ++++++
 7 files changed, 43 insertions(+), 1 deletion(-)

diff --git a/compiler/env/OMRCPU.hpp b/compiler/env/OMRCPU.hpp
index 646a9389e39..0f432f32f19 100644
--- a/compiler/env/OMRCPU.hpp
+++ b/compiler/env/OMRCPU.hpp
@@ -131,6 +131,8 @@ class CPU
    bool isI386() { return _minorArch == TR::m_arch_i386; }
    bool isAMD64() { return _minorArch == TR::m_arch_amd64; }
 
+   bool supportsTM() { return false; }
+
 private:
    TR_Processor _processor;
 
diff --git a/compiler/p/env/OMRCPU.cpp b/compiler/p/env/OMRCPU.cpp
index a5e9469446a..bce48b7ec86 100644
--- a/compiler/p/env/OMRCPU.cpp
+++ b/compiler/p/env/OMRCPU.cpp
@@ -33,6 +33,12 @@ OMR::Power::CPU::getPPCis64bit()
    return (p >= TR_FirstPPC64BitProcessor)? true : false;
    }
 
+bool
+OMR::Power::CPU::supportsTM()
+   {
+   return self()->getPPCSupportsTM();
+   }
+
 bool
 OMR::Power::CPU::isTargetWithinIFormBranchRange(intptrj_t targetAddress, intptrj_t sourceAddress)
    {
diff --git a/compiler/p/env/OMRCPU.hpp b/compiler/p/env/OMRCPU.hpp
index d65e907f3ca..d6565249040 100644
--- a/compiler/p/env/OMRCPU.hpp
+++ b/compiler/p/env/OMRCPU.hpp
@@ -65,6 +65,13 @@ class CPU : public OMR::CPU
    bool getPPCSupportsTM()  { return false; }
    bool getPPCSupportsLM()  { return false; }
 
+   /** @brief Determines whether the Transactional Memory (TM) facility is available on the current processor.
+    *         Alias of getPPCSupportsTM() as a platform agnostic query.
+    *
+    *  @return true if TM is available, false otherwise.
+    */
+   bool supportsTM();
+
    /**
     * @brief Provides the maximum forward branch displacement in bytes reachable
     *        with an I-Form branch instruction.
diff --git a/compiler/x/env/OMRCPU.cpp b/compiler/x/env/OMRCPU.cpp
index b7dc1000895..46deece1cce 100644
--- a/compiler/x/env/OMRCPU.cpp
+++ b/compiler/x/env/OMRCPU.cpp
@@ -24,6 +24,7 @@
 #include "env/CPU.hpp"
 #include "env/JitConfig.hpp"
 #include "env/ProcessorInfo.hpp"
+#include "infra/Flags.hpp"
 #include "x/runtime/X86Runtime.hpp"
 
 
@@ -112,3 +113,10 @@ OMR::X86::CPU::testOSForSSESupport()
    {
    return false;
    }
+
+bool
+OMR::X86::CPU::supportsTM()
+   {
+   flags32_t processorFeatureFlags8(self()->getX86ProcessorFeatureFlags8());
+   return processorFeatureFlags8.testAny(TR_RTM);
+   }
diff --git a/compiler/x/env/OMRCPU.hpp b/compiler/x/env/OMRCPU.hpp
index fb544708936..83834288c14 100644
--- a/compiler/x/env/OMRCPU.hpp
+++ b/compiler/x/env/OMRCPU.hpp
@@ -64,6 +64,13 @@ class CPU : public OMR::CPU
 
    bool testOSForSSESupport();
 
+
+   /** @brief Determines whether the Transactional Memory (TM) facility is available on the current processor.
+    *
+    *  @return true if TM is available, false otherwise.
+    */
+   bool supportsTM();
+
    /**
     * @brief Answers whether the distance between a target and source address
     *        is within the reachable RIP displacement range.
diff --git a/compiler/z/env/OMRCPU.cpp b/compiler/z/env/OMRCPU.cpp
index 2d1b8eae7f3..c7bf2ae0fbd 100644
--- a/compiler/z/env/OMRCPU.cpp
+++ b/compiler/z/env/OMRCPU.cpp
@@ -207,6 +207,12 @@ OMR::Z::CPU::getSupportsTransactionalMemoryFacility()
    return _flags.testAny(S390SupportsTM);
    }
 
+bool
+OMR::Z::CPU::supportsTM()
+   {
+   return self()->getSupportsTransactionalMemoryFacility();
+   }
+
 
 bool
 OMR::Z::CPU::setSupportsTransactionalMemoryFacility(bool value)
@@ -375,4 +381,4 @@ OMR::Z::CPU::isTargetWithinBranchRelativeRILRange(intptrj_t targetAddress, intpt
    {
    return (targetAddress == sourceAddress + ((intptrj_t)((int32_t)((targetAddress - sourceAddress) / 2))) * 2) &&
             (targetAddress % 2 == 0);
-   }
\ No newline at end of file
+   }
diff --git a/compiler/z/env/OMRCPU.hpp b/compiler/z/env/OMRCPU.hpp
index ab9ac23ecf9..16dc1535031 100644
--- a/compiler/z/env/OMRCPU.hpp
+++ b/compiler/z/env/OMRCPU.hpp
@@ -122,6 +122,12 @@ class CPU : public OMR::CPU
     *     Determines whether the Transactional Memory (TM) facility is available on the current processor.
     */
    bool getSupportsTransactionalMemoryFacility();
+
+   /** \brief
+    *     Determines whether the Transactional Memory (TM) facility is available on the current processor.
+    *     Alias of getSupportsTransactionalMemoryFacility() as a platform agnostic query.
+    */
+   bool supportsTM();
    
    /** \brief
     *     Determines whether the Transactional Memory (TM) facility is available on the current processor.