Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Fracture llvm_trunk build issue on OS X #50

Open
agabrielson opened this issue Jan 26, 2015 · 0 comments
Open

Fracture llvm_trunk build issue on OS X #50

agabrielson opened this issue Jan 26, 2015 · 0 comments

Comments

@agabrielson
Copy link

LLVM is at release 36, fracture is not building. Here is the compiler output:

Anthonys-MacBook-Pro:fracture agabriel$ make
llvm[2]: Compiling CodeGenInstruction.cpp for Debug+Asserts build
llvm[2]: Compiling CodeGenMapTable.cpp for Debug+Asserts build
llvm[2]: Compiling CodeGenRegisters.cpp for Debug+Asserts build
llvm[2]: Compiling CodeGenSchedule.cpp for Debug+Asserts build
llvm[2]: Compiling CodeGenTarget.cpp for Debug+Asserts build
llvm[2]: Compiling CodeInvDAGPatterns.cpp for Debug+Asserts build
llvm[2]: Compiling DAGISelMatcher.cpp for Debug+Asserts build
llvm[2]: Compiling DAGISelMatcherEmitter.cpp for Debug+Asserts build
llvm[2]: Compiling FractureInstrMapEmitter.cpp for Debug+Asserts build
llvm[2]: Compiling FracturePatternlessInstrsEmitter.cpp for Debug+Asserts build
llvm[2]: Compiling SDNodeInfo.cpp for Debug+Asserts build
llvm[2]: Compiling TableGen.cpp for Debug+Asserts build
llvm[2]: Linking Debug+Asserts executable fracture-tblgen
ld: warning: directory not found for option '-L/Users/agabriel/builds/fracture/Debug+Asserts/lib'
llvm[2]: ======= Finished Linking Debug+Asserts Executable fracture-tblgen
llvm[3]: Building ARM.td DAG inverse selector implementation with tblgen
zext
xor
win__chkstk
vt
vselect
vector_shuffle
vector_insert
vector_extract_subvec
vector_extract
urem
undef
umullohi
uint_to_fp
udivrem
udiv
trunc
trap
tjumptable
timm
tglobaltlsaddr
tglobaladdr
tframeindex
texternalsym
tconstpool
tblockaddress
sube
subc
sub
st
srl
srem
sra
smullohi
sint_to_fp
shl
sext_inreg
sext
setcc
selectcc
select
sdivrem
sdiv
scalar_to_vector
rotr
rotl
readcyclecounter
prefetch
or
mulhu
mulhs
mul
masked_store
masked_load
ld
jumptable
ist
intrinsic_wo_chain
intrinsic_w_chain
intrinsic_void
insertelt
insert_subvector
imm
globaltlsaddr
globaladdr
ftrunc
fsub
fsqrt
fsin
fround
frnd
frint
frem
frameindex
fpow
fpimm
fp_to_uint
fp_to_sint
fp_to_f16
fneg
fnearbyint
fmul
fminnum
fmaxnum
fma
flog2
fgetsign
ffloor
fextend
fexp2
fdiv
fcos
fcopysign
fceil
fadd
fabs
f16_to_fp
extractelt
extract_subvector
externalsym
debugtrap
cvt
cttz_zero_undef
cttz
ctpop
ctlz_zero_undef
ctlz
constpool
cond
concat_vectors
build_vector
bswap
brind
brcond
brcc
br
blockaddress
bitconvert
bb
atomic_swap
atomic_store
atomic_load_xor
atomic_load_umin
atomic_load_umax
atomic_load_sub
atomic_load_or
atomic_load_nand
atomic_load_min
atomic_load_max
atomic_load_and
atomic_load_add
atomic_load
atomic_fence
atomic_cmp_swap
assertzext
assertsext
arm_uitof
arm_sitof
arm_ftoui
arm_ftosi
arm_fmstat
arm_fmdrr
arm_cmpfp0
arm_cmpfp
anyext
and
adde
addc
add
NEONzip
NEONvtst
NEONvsri
NEONvsli
NEONvshru
NEONvshrs
NEONvshrn
NEONvshl
NEONvrshru
NEONvrshrs
NEONvrshrn
NEONvrev64
NEONvrev32
NEONvrev16
NEONvqshrnu
NEONvqshrnsu
NEONvqshrns
NEONvqshlu
NEONvqshlsu
NEONvqshls
NEONvqrshrnu
NEONvqrshrnsu
NEONvqrshrns
NEONvorrImm
NEONvmvnImm
NEONvmullu
NEONvmulls
NEONvmovImm
NEONvmovFPImm
NEONvgetlaneu
NEONvgetlanes
NEONvext
NEONvduplane
NEONvdup
NEONvcltz
NEONvclez
NEONvcgtz
NEONvcgtu
NEONvcgt
NEONvcgez
NEONvcgeu
NEONvcge
NEONvceqz
NEONvceq
NEONvbsl
NEONvbicImm
NEONuzp
NEONtrn
NEONfmin
NEONfmax
ARMvminnm
ARMvmaxnm
ARMthread_pointer
ARMtcret
ARMtcall
ARMsube
ARMsubc
ARMsrl_flag
ARMsra_flag
ARMrrx
ARMretflag
ARMrbit
ARMpic_add
ARMintretflag
ARMeh_sjlj_setjmp
ARMeh_sjlj_longjmp
ARMcopystructbyval
ARMcmpZ
ARMcmp
ARMcmov
ARMcmn
ARMcallseq_start
ARMcallseq_end
ARMcall_pred
ARMcall_nolink
ARMcall
ARMbrjt
ARMbrcond
ARMbr2jt
ARMbfi
ARMadde
ARMaddc
ARMWrapperPIC
ARMWrapperJT
ARMWrapper
ARMUmlal
ARMSmlal
ARMPreload
ARMMemBarrierMCR
ARMBcci64
Assertion failed: (InstrsByEnum.size() == Insts.size() && "Missing predefined instr"), function ComputeInstrsByEnum, file CodeGenTarget.cpp, line 315.
0 fracture-tblgen 0x00000001071da58e llvm::sys::PrintStackTrace(sFILE) + 46
1 fracture-tblgen 0x00000001071db93b PrintStackTraceSignalHandler(void
) + 27
2 fracture-tblgen 0x00000001071dbd85 SignalHandler(int) + 565
3 libsystem_platform.dylib 0x00007fff958fbf1a _sigtramp + 26
4 libsystem_platform.dylib 0x00007fff6f43a764 sigtramp + 3652446308
5 fracture-tblgen 0x00000001071db96b raise + 27
6 fracture-tblgen 0x00000001071dba22 abort + 18
7 fracture-tblgen 0x00000001071dba01 _assert_rtn + 129
8 fracture-tblgen 0x00000001070a3387 llvm::CodeGenTarget::ComputeInstrsByEnum() const + 1767
9 fracture-tblgen 0x0000000106feb48b llvm::CodeGenTarget::getInstructionsByEnumValue() const + 59
10 fracture-tblgen 0x00000001070c596d llvm::CodeInvDAGPatterns::InferInstructionFlags() + 61
11 fracture-tblgen 0x00000001070c3eba llvm::CodeInvDAGPatterns::CodeInvDAGPatterns(llvm::RecordKeeper&) + 1466
12 fracture-tblgen 0x00000001070c607d llvm::CodeInvDAGPatterns::CodeInvDAGPatterns(llvm::RecordKeeper&) + 29
13 fracture-tblgen 0x00000001070f392f FractureInstrMapEmitter::FractureInstrMapEmitter(llvm::RecordKeeper&) + 47
14 fracture-tblgen 0x00000001070eec2d FractureInstrMapEmitter::FractureInstrMapEmitter(llvm::RecordKeeper&) + 29
15 fracture-tblgen 0x00000001070eb21d fracture::EmitInstrMap(llvm::RecordKeeper&, llvm::raw_ostream&) + 61
16 fracture-tblgen 0x00000001070f7481 (anonymous namespace)::FractureTableGenMain(llvm::raw_ostream&, llvm::RecordKeeper&) + 97
17 fracture-tblgen 0x00000001070fb514 llvm::TableGenMain(char
, bool (
)(llvm::raw_ostream&, llvm::RecordKeeper&)) + 1828
18 fracture-tblgen 0x00000001070f7404 main + 84
19 libdyld.dylib 0x00007fff91a645c9 start + 1
20 libdyld.dylib 0x000000000000000d start + 1851374149
Stack dump:
0. Program arguments: /Users/agabriel/builds/fracture/Debug+Asserts/bin/fracture-tblgen -I /Users/agabriel/builds/llvm -I /Users/agabriel/builds/llvm/include -I /Users/agabriel/builds/llvm/lib/Target -I /Users/agabriel/builds/llvm/lib/Target/ARM -gen-instr-map -o /Users/agabriel/builds/fracture/lib/Target/ARM/Debug+Asserts/ARMGenInvISel.inc.tmp /Users/agabriel/builds/llvm/lib/Target/ARM/ARM.td
make[3]: *** [/Users/agabriel/builds/fracture/lib/Target/ARM/Debug+Asserts/ARMGenInvISel.inc.tmp] Illegal instruction: 4
make[2]: *** [ARM/.makeall] Error 2
make[1]: *** [all] Error 1
make: *** [all] Error 1

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

No branches or pull requests

1 participant