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Add Arm64 encodings for IF_SVE_AA_3A to IF_SVE_HL_3A #95127

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merged 33 commits into from
Nov 27, 2023
Merged

Add Arm64 encodings for IF_SVE_AA_3A to IF_SVE_HL_3A #95127

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55731b4
Add insEncodeReg* methods
a74nh Nov 22, 2023
90fb3de
Add Arm64 encodings for 3A groups
a74nh Nov 20, 2023
15ee2fc
Remove isSveRegister
a74nh Nov 22, 2023
b7490a0
Split ALL_ARM64_EMITTER_UNIT_TESTS into subsets
a74nh Nov 22, 2023
473483c
AD, AE, AN
a74nh Nov 22, 2023
b4687d4
Merge remote-tracking branch 'origin' into SVE_AA_3A_4_github
a74nh Nov 23, 2023
c5d82cd
Remove REG_PREDICATE_LOW_FIRST
a74nh Nov 23, 2023
4461ecb
Fix sve_ins_offset
a74nh Nov 23, 2023
f93a4f6
Add IF_SVE_AO_3A, including INS_OPTS_SCALABLE_WIDE_
a74nh Nov 23, 2023
d755ab7
Add IF_SVE_CM_3A
a74nh Nov 23, 2023
2dcd8e6
Add IF_SVE_CN_3A, including INS_OPTS_SCALABLE_TO_SIMD_
a74nh Nov 23, 2023
ba57782
IF_SVE_CO_3A and INS_OPTS_SCALABLE_n_TO_SCALAR
a74nh Nov 23, 2023
0d958e0
Rename INS_OPTS_SCALABLE_TO_SIMD_
a74nh Nov 23, 2023
f0bf5ca
Add IF_SVE_EP_3A
a74nh Nov 23, 2023
0477f12
Add IF_SVE_ER_3A
a74nh Nov 23, 2023
64ac5a6
Add IF_SVE_ET_3A
a74nh Nov 23, 2023
d88891a
Fix formatting
a74nh Nov 24, 2023
89e8ccd
Add IF_SVE_EU_3A
a74nh Nov 24, 2023
947e76c
IF_SVE_EU_3A
a74nh Nov 24, 2023
6056790
Add IF_SVE_HJ_3A
a74nh Nov 24, 2023
af7b818
Add IF_SVE_HJ_3A
a74nh Nov 24, 2023
819ff13
Add PredicateType
a74nh Nov 24, 2023
9c06fe7
Remove tests unsupported by capstone
a74nh Nov 24, 2023
7b74dc6
Fix formatting
a74nh Nov 24, 2023
5e9dad8
Comment out unit test define
a74nh Nov 24, 2023
889c909
Add parentheses
a74nh Nov 24, 2023
1e3e98e
Fix fadda predicate and comment typos
a74nh Nov 27, 2023
f2c714b
Fix formatting
a74nh Nov 27, 2023
96271ae
Better commenting + fix up errors found
a74nh Nov 27, 2023
2f763f1
Better descriptions for insOpts functions
a74nh Nov 27, 2023
11d38ba
Add latencies
a74nh Nov 27, 2023
cffafad
Fix formatting
a74nh Nov 27, 2023
15a5fe8
Add emitDispLowPredicateReg
a74nh Nov 27, 2023
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30 changes: 27 additions & 3 deletions src/coreclr/jit/codegenarm64.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -5433,7 +5433,7 @@ void CodeGen::genProfilingLeaveCallback(unsigned helper)

// Uncomment "#define ALL_ARM64_EMITTER_UNIT_TESTS" to run all the unit tests here.
// After adding a unit test, and verifying it works, put it under this #ifdef, so we don't see it run every time.
//#define ALL_ARM64_EMITTER_UNIT_TESTS
#define ALL_ARM64_EMITTER_UNIT_TESTS

#if defined(DEBUG)
void CodeGen::genArm64EmitterUnitTests()
Expand Down Expand Up @@ -7304,8 +7304,8 @@ void CodeGen::genArm64EmitterUnitTests()

genDefineTempLabel(genCreateTempLabel());

theEmitter->emitIns_I(INS_brk, EA_PTRSIZE, 0);
theEmitter->emitIns_I(INS_brk, EA_PTRSIZE, 65535);
// theEmitter->emitIns_I(INS_brk, EA_PTRSIZE, 0);
// theEmitter->emitIns_I(INS_brk, EA_PTRSIZE, 65535);

theEmitter->emitIns_BARR(INS_dsb, INS_BARRIER_OSHLD);
theEmitter->emitIns_BARR(INS_dmb, INS_BARRIER_OSHST);
Expand Down Expand Up @@ -10104,6 +10104,30 @@ void CodeGen::genArm64EmitterUnitTests()

#endif

#ifdef ALL_ARM64_EMITTER_UNIT_TESTS
//
// R_R_R SVE operations, one dest, two source
//

// TODO-SVE: Fix once we add Z and predicate registers

theEmitter->emitIns_R_R_R(INS_sve_and, EA_SCALABLE, REG_V0, REG_V1, REG_V2, INS_OPTS_SCALABLE_B); // AND <Zdn>.<T>, <Pg>/M, <Zdn>.<T>, <Zm>.<T>
theEmitter->emitIns_R_R_R(INS_sve_bic, EA_SCALABLE, REG_V3, REG_V4, REG_V5, INS_OPTS_SCALABLE_H); // BIC <Zdn>.<T>, <Pg>/M, <Zdn>.<T>, <Zm>.<T>
theEmitter->emitIns_R_R_R(INS_sve_eor, EA_SCALABLE, REG_V14, REG_V5, REG_V16, INS_OPTS_SCALABLE_S); // EOR <Zdn>.<T>, <Pg>/M, <Zdn>.<T>, <Zm>.<T>
theEmitter->emitIns_R_R_R(INS_sve_orr, EA_SCALABLE, REG_V29, REG_V7, REG_V31, INS_OPTS_SCALABLE_D); // ORR <Zdn>.<T>, <Pg>/M, <Zdn>.<T>, <Zm>.<T>

theEmitter->emitIns_R_R_R(INS_sve_add, EA_SCALABLE, REG_V5, REG_V6, REG_V7, INS_OPTS_SCALABLE_B); // ADD <Zdn>.<T>, <Pg>/M, <Zdn>.<T>, <Zm>.<T>
theEmitter->emitIns_R_R_R(INS_sve_sub, EA_SCALABLE, REG_V15, REG_V7, REG_V29, INS_OPTS_SCALABLE_H); // SUB <Zdn>.<T>, <Pg>/M, <Zdn>.<T>, <Zm>.<T>
theEmitter->emitIns_R_R_R(INS_sve_subr, EA_SCALABLE, REG_V2, REG_V0, REG_V13, INS_OPTS_SCALABLE_S); // SUBR <Zdn>.<T>, <Pg>/M, <Zdn>.<T>, <Zm>.<T>

theEmitter->emitIns_R_R_R(INS_sve_sdiv, EA_SCALABLE, REG_V3, REG_V2, REG_V9, INS_OPTS_SCALABLE_S); // SDIV <Zdn>.<T>, <Pg>/M, <Zdn>.<T>, <Zm>.<T>
theEmitter->emitIns_R_R_R(INS_sve_sdivr, EA_SCALABLE, REG_V31, REG_V3, REG_V29, INS_OPTS_SCALABLE_D); // SDIVR <Zdn>.<T>, <Pg>/M, <Zdn>.<T>, <Zm>.<T>
theEmitter->emitIns_R_R_R(INS_sve_udiv, EA_SCALABLE, REG_V1, REG_V0, REG_V0, INS_OPTS_SCALABLE_S); // UDIV <Zdn>.<T>, <Pg>/M, <Zdn>.<T>, <Zm>.<T>
theEmitter->emitIns_R_R_R(INS_sve_udivr, EA_SCALABLE, REG_V13, REG_V7, REG_V15, INS_OPTS_SCALABLE_D); // UDIVR <Zdn>.<T>, <Pg>/M, <Zdn>.<T>, <Zm>.<T>


#endif // ALL_ARM64_EMITTER_UNIT_TESTS

#ifdef ALL_ARM64_EMITTER_UNIT_TESTS

BasicBlock* label = genCreateTempLabel();
Expand Down
2 changes: 2 additions & 0 deletions src/coreclr/jit/emit.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -2730,6 +2730,8 @@ const emitAttr emitter::emitSizeDecode[emitter::OPSZ_COUNT] = {
EA_1BYTE, EA_2BYTE, EA_4BYTE, EA_8BYTE, EA_16BYTE,
#if defined(TARGET_XARCH)
EA_32BYTE, EA_64BYTE,
#elif defined(TARGET_ARM64)
EA_SCALABLE,
#endif // TARGET_XARCH
};

Expand Down
3 changes: 3 additions & 0 deletions src/coreclr/jit/emit.h
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Original file line number Diff line number Diff line change
Expand Up @@ -505,6 +505,9 @@ class emitter
OPSZ32 = 5,
OPSZ64 = 6,
OPSZ_COUNT = 7,
#elif defined(TARGET_ARM64)
OPSZ_SCALABLE = 5,
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I don't think we are using it anywhere. can we revert this change?

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This is used indirectly. When setting idOpSize, the emitattr is converted into opSize:

        void idOpSize(emitAttr opsz)
        {
            _idOpSize = emitEncodeSize(opsz);
        }

/* static */ inline emitter::opSize emitter::emitEncodeSize(emitAttr size)
{
    assert((size != EA_UNKNOWN) && ((size & EA_SIZE_MASK) == size));
    return static_cast<emitter::opSize>(genLog2(size));
}

/* static */ inline emitAttr emitter::emitDecodeSize(emitter::opSize ensz)
{
    assert(static_cast<unsigned>(ensz) < OPSZ_COUNT);
    return emitSizeDecode[ensz];
}

Without the changes, a value of EA_SCALABLE becomes OPSZ_COUNT, and then asserts inside emitDecodeSize()

OPSZ_COUNT = 6,
#else
OPSZ_COUNT = 5,
#endif
Expand Down
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