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Test failure JIT\\Regression\\JitBlue\\Runtime_63354\\Runtime_63354\\Runtime_63354.cmd #78898

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v-wenyuxu opened this issue Nov 28, 2022 · 8 comments · Fixed by #79182
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arch-x86 area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI blocking-clean-ci-optional Blocking optional rolling runs in-pr There is an active PR which will close this issue when it is merged JitStress CLR JIT issues involving JIT internal stress modes os-windows
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@v-wenyuxu
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Run: runtime-coreclr jitstress 20221126.2

Failed test:

coreclr windows x86 Checked jitstress1 @ Windows.10.Amd64.Open

- JIT\\Regression\\JitBlue\\Runtime_63354\\Runtime_63354\\Runtime_63354.cmd

coreclr windows x86 Checked jitstress1_tiered @ Windows.10.Amd64.Open

- JIT\\Regression\\JitBlue\\Runtime_63354\\Runtime_63354\\Runtime_63354.cmd

coreclr windows x86 Checked jitstress2 @ Windows.10.Amd64.Open

- JIT\\Regression\\JitBlue\\Runtime_63354\\Runtime_63354\\Runtime_63354.cmd

coreclr windows x86 Checked jitstress2_tiered @ Windows.10.Amd64.Open

- JIT\\Regression\\JitBlue\\Runtime_63354\\Runtime_63354\\Runtime_63354.cmd

Error message:

Assert failure(PID 2576 [0x00000a10], Thread: 5528 [0x1598]): Assertion failed '!m_VariableLiveRanges->back().m_EndEmitLocation.Valid()' in 'Runtime_63354:Test2(System.Numerics.Vector3):System.Numerics.Vector3' during 'Generate code' (IL size 52; hash 0x3273ce14; FullOpts)

File: D:\a\_work\1\s\src\coreclr\jit\codegencommon.cpp Line: 8795
Image: C:\h\w\9B6408B0\p\corerun.exe
Return code:      1
Raw output file:      C:\h\w\9B6408B0\w\A9090942\uploads\Reports\JIT.Regression\JitBlue\Runtime_63354\Runtime_63354\Runtime_63354.output.txt
Raw output:
BEGIN EXECUTION
"C:\h\w\9B6408B0\p\corerun.exe" -p "System.Reflection.Metadata.MetadataUpdater.IsSupported=false"  Runtime_63354.dll
Expected: 100
Actual: -1073740286
END EXECUTION - FAILED
FAILED
Test Harness Exitcode is : 1
To run the test:

set CORE_ROOT=C:\h\w\9B6408B0\p
C:\h\w\9B6408B0\w\A9090942\e\JIT\Regression\JitBlue\Runtime_63354\Runtime_63354\Runtime_63354.cmd
Expected: True
Actual:   False


Stack trace
   at JIT_Regression._JitBlue_Runtime_63354_Runtime_63354_Runtime_63354_._JitBlue_Runtime_63354_Runtime_63354_Runtime_63354_cmd()
   at System.RuntimeMethodHandle.InvokeMethod(Object target, Void** arguments, Signature sig, Boolean isConstructor)
   at System.Reflection.MethodInvoker.Invoke(Object obj, IntPtr* args, BindingFlags invokeAttr)
@v-wenyuxu v-wenyuxu added arch-x86 os-windows JitStress CLR JIT issues involving JIT internal stress modes blocking-clean-ci-optional Blocking optional rolling runs labels Nov 28, 2022
@dotnet-issue-labeler dotnet-issue-labeler bot added the area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI label Nov 28, 2022
@ghost ghost added the untriaged New issue has not been triaged by the area owner label Nov 28, 2022
@ghost
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ghost commented Nov 28, 2022

Tagging subscribers to this area: @JulieLeeMSFT, @jakobbotsch
See info in area-owners.md if you want to be subscribed.

Issue Details

Run: runtime-coreclr jitstress 20221126.2

Failed test:

coreclr windows x86 Checked jitstress1 @ Windows.10.Amd64.Open

- JIT\\Regression\\JitBlue\\Runtime_63354\\Runtime_63354\\Runtime_63354.cmd

coreclr windows x86 Checked jitstress1_tiered @ Windows.10.Amd64.Open

- JIT\\Regression\\JitBlue\\Runtime_63354\\Runtime_63354\\Runtime_63354.cmd

coreclr windows x86 Checked jitstress2 @ Windows.10.Amd64.Open

- JIT\\Regression\\JitBlue\\Runtime_63354\\Runtime_63354\\Runtime_63354.cmd

coreclr windows x86 Checked jitstress2_tiered @ Windows.10.Amd64.Open

- JIT\\Regression\\JitBlue\\Runtime_63354\\Runtime_63354\\Runtime_63354.cmd

Error message:

Assert failure(PID 2576 [0x00000a10], Thread: 5528 [0x1598]): Assertion failed '!m_VariableLiveRanges->back().m_EndEmitLocation.Valid()' in 'Runtime_63354:Test2(System.Numerics.Vector3):System.Numerics.Vector3' during 'Generate code' (IL size 52; hash 0x3273ce14; FullOpts)

File: D:\a\_work\1\s\src\coreclr\jit\codegencommon.cpp Line: 8795
Image: C:\h\w\9B6408B0\p\corerun.exe
Return code:      1
Raw output file:      C:\h\w\9B6408B0\w\A9090942\uploads\Reports\JIT.Regression\JitBlue\Runtime_63354\Runtime_63354\Runtime_63354.output.txt
Raw output:
BEGIN EXECUTION
"C:\h\w\9B6408B0\p\corerun.exe" -p "System.Reflection.Metadata.MetadataUpdater.IsSupported=false"  Runtime_63354.dll
Expected: 100
Actual: -1073740286
END EXECUTION - FAILED
FAILED
Test Harness Exitcode is : 1
To run the test:

set CORE_ROOT=C:\h\w\9B6408B0\p
C:\h\w\9B6408B0\w\A9090942\e\JIT\Regression\JitBlue\Runtime_63354\Runtime_63354\Runtime_63354.cmd
Expected: True
Actual:   False


Stack trace
   at JIT_Regression._JitBlue_Runtime_63354_Runtime_63354_Runtime_63354_._JitBlue_Runtime_63354_Runtime_63354_Runtime_63354_cmd()
   at System.RuntimeMethodHandle.InvokeMethod(Object target, Void** arguments, Signature sig, Boolean isConstructor)
   at System.Reflection.MethodInvoker.Invoke(Object obj, IntPtr* args, BindingFlags invokeAttr)
Author: v-wenyuxu
Assignees: -
Labels:

arch-x86, os-windows, JitStress, area-CodeGen-coreclr, blocking-clean-ci-optional

Milestone: -

@BruceForstall BruceForstall added this to the 8.0.0 milestone Nov 29, 2022
@ghost ghost removed the untriaged New issue has not been triaged by the area owner label Nov 29, 2022
@BruceForstall
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Lots more cases: https://dev.azure.com/dnceng-public/public/_build/results?buildId=94140&view=ms.vss-test-web.build-test-results-tab

@BrianBohe
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I bisected this bug. It was introduced on #76491.

@BrianBohe
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What is happening is we start a block with V01 arg0 in stack (ebp+08). It is copied to xmm1, indicating live and death. And then reporting the death again of the same variable in xmm1 for a second time without begin alive first.

@BrianBohe
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We are reporting a variable as dying in xmm1, although previously saying the same. The first change of liveness happens after HWINSTRINSIC:

Generating: N063 (  3,  2) [000050] ----------z                   t50 =    LCL_VAR   simd12<System.Numerics.Vector3> V01 arg0         u:3 mm1 (last use) REG mm1 $181
Generating: N065 (???,???) [000104] -----------                  t104 =    CNS_VEC   simd16<0x00000000, 0x00000000, 0x00000000, 0x00000000> REG mm0
IN0013:        vxorps   xmm0, xmm0, xmm0
Generating: N067 (???,???) [000105] -c---------                  t105 =    CNS_INT   int    0 REG NA
                                                                        /--*  t50    simd12 
                                                                        +--*  t104   simd16 
                                                                        +--*  t105   int    
Generating: N069 (  6,  6) [000052] -----------                   t52 = *  HWINTRINSIC simd16 float Insert REG mm1 $c1
IN0014:        vmovupd  xmm1, xmmword ptr [V01 ebp+08H]
							V01 in reg mm1 is becoming live  [000050]
							Live regs: 000000C0 {esi edi} => 000000C0 {esi edi xmm1}
							V01 in reg mm1 is becoming dead  [000050]
							Live regs: 000000C0 {esi edi xmm1} => 000000C0 {esi edi}
							Live vars: {V00 V01 V02} => {V00 V02}
IN0015:        vinsertps xmm1, xmm1, xmm0, 0
                                                                        /--*  t52    simd16 
Generating: N071 ( 10,  9) [000039] DA---------                         *  STORE_LCL_VAR simd12<System.Numerics.Vector3> V01 arg0         d:4 mm1 REG mm1
IN0016:        vmovsd   qword ptr [V01 ebp+08H], xmm1 // Brian: Why not alive?
IN0017:        vpshufd  xmm0, xmm1, 2
IN0018:        vmovss   dword ptr [V01+0x8 ebp+10H], xmm0

where before we modified the variable directly on stack:

Generating: N063 (  1,  2) [000037] -----------                   t37 =    CNS_INT   int    0 REG eax
IN0017:        xor      eax, eax
                                                                        /--*  t37    int    
Generating: N065 (  5,  7) [000039] UA---------                         *  STORE_LCL_FLD int    V01 arg0         ud:3->4[+0] NA REG NA
IN0018:        mov      dword ptr [V01 ebp+08H], eax

@SingleAccretion
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It looks suspect to me that genStoreLclTypeSIMD12 does not call genUpdateLife.

@BrianBohe
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Calling to genProduceReg (which triggers genUpdateLife) after treenode 39 seems to solved it. What I don't get is, it is a store, and flags indicate it is becoming alive, but we are not updating varDsc with the stack position. It is still there the offset and the lvIsOnFrame set, but the register doesn't change back to STK and keeps XMM1. So reporting life change after that would say v01 is becoming alive in XMM1. The next instruction that triggers the assert is a load from the stack to xmm1 of the same variable, which indicates first it is dying

@SingleAccretion
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but we are not updating varDsc with the stack position

That also looks like a bug in genStoreLclTypeSIMD12. It should do varDsc->SetRegNum(REG_STK);.

@BrianBohe BrianBohe added the in-pr There is an active PR which will close this issue when it is merged label Dec 5, 2022
@ghost ghost locked as resolved and limited conversation to collaborators Jan 9, 2023
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Labels
arch-x86 area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI blocking-clean-ci-optional Blocking optional rolling runs in-pr There is an active PR which will close this issue when it is merged JitStress CLR JIT issues involving JIT internal stress modes os-windows
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4 participants