-
Notifications
You must be signed in to change notification settings - Fork 4.8k
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
Assertion failed 'genIsValidDoubleReg(regRec->regNum)' #53322
Labels
arch-arm32
area-CodeGen-coreclr
CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
blocking-outerloop
Blocking the 'runtime-coreclr outerloop' and 'runtime-libraries-coreclr outerloop' runs
os-linux
Linux OS (any supported distro)
Milestone
Comments
BruceForstall
added
arch-arm32
os-linux
Linux OS (any supported distro)
area-CodeGen-coreclr
CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
blocking-outerloop
Blocking the 'runtime-coreclr outerloop' and 'runtime-libraries-coreclr outerloop' runs
labels
May 26, 2021
dotnet-issue-labeler
bot
added
the
untriaged
New issue has not been triaged by the area owner
label
May 26, 2021
BruceForstall
removed
the
untriaged
New issue has not been triaged by the area owner
label
May 26, 2021
Failed again in runtime-coreclr crossgen2 20210525.1 Failed test:
Error message:
|
Historical failures of this test:
|
@VincentBu it is great to see the history, was it hard to fetch? |
ghost
added
the
in-pr
There is an active PR which will close this issue when it is merged
label
May 28, 2021
ghost
removed
the
in-pr
There is an active PR which will close this issue when it is merged
label
May 28, 2021
ghost
locked as resolved and limited conversation to collaborators
Jun 27, 2021
Sign up for free
to subscribe to this conversation on GitHub.
Already have an account?
Sign in.
Labels
arch-arm32
area-CodeGen-coreclr
CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
blocking-outerloop
Blocking the 'runtime-coreclr outerloop' and 'runtime-libraries-coreclr outerloop' runs
os-linux
Linux OS (any supported distro)
Test: JIT/SIMD/VectorConvert_ro_Target_32Bit/VectorConvert_ro_Target_32Bit.sh
Linux/arm
JitStress2 + JitStressRegs1/JitStressRegs8
fwiw, the failure occurred after this LSRA change: #52832
@kunalspathak PTAL
cc @dotnet/jit-contrib
The text was updated successfully, but these errors were encountered: