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inv_mpu.c
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inv_mpu.c
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/*
$License:
Copyright (C) 2011-2012 InvenSense Corporation, All Rights Reserved.
$
*/
/**
* @addtogroup DRIVERS Sensor Driver Layer
* @brief Hardware drivers to communicate with sensors via I2C.
*
* @{
* @file inv_mpu.c
* @brief An I2C-based driver for Invensense gyroscopes.
* @details This driver currently works for the following devices:
* MPU6050
* MPU6500
* MPU9150 (or MPU6050 w/ AK8975 on the auxiliary bus)
* MPU9250 (or MPU6500 w/ AK8963 on the auxiliary bus)
*/
#include <avr/pgmspace.h>
#include <util/delay.h>
#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
#include "twi.h"
#include "inv_mpu.h"
/* The following functions must be defined for this platform:
* i2c_write(uint8_t slave_addr, uint8_t reg_addr, uint8_t length, uint8_t const *data)
* i2c_read(uint8_t slave_addr, uint8_t reg_addr, uint8_t length, uint8_t *data)
* delay_ms(uint32_t num_ms)
* min(int a, int b)
*/
#define min(a,b) ((a)<(b)?(a):(b))
#define i2c_write TwiWriteBytes
#define i2c_read TwiReadBytes
#define delay_ms _delay_ms
#define MPU_DEBUG // print some debug messages
#define MPU9150
#if !defined MPU6050 && !defined MPU9150 && !defined MPU6500 && !defined MPU9250
#error Which gyro are you using? Define MPUxxxx in your compiler options.
#endif
/* Time for some messy macro work. =]
* #define MPU9150
* is equivalent to..
* #define MPU6050
* #define AK8975_SECONDARY
*
* #define MPU9250
* is equivalent to..
* #define MPU6500
* #define AK8963_SECONDARY
*/
#if defined MPU9150
#ifndef MPU6050
#define MPU6050
#endif /* #ifndef MPU6050 */
#if defined AK8963_SECONDARY
#error "MPU9150 and AK8963_SECONDARY cannot both be defined."
#elif !defined AK8975_SECONDARY /* #if defined AK8963_SECONDARY */
#define AK8975_SECONDARY
#endif /* #if defined AK8963_SECONDARY */
#elif defined MPU9250 /* #if defined MPU9150 */
#ifndef MPU6500
#define MPU6500
#endif /* #ifndef MPU6500 */
#if defined AK8975_SECONDARY
#error "MPU9250 and AK8975_SECONDARY cannot both be defined."
#elif !defined AK8963_SECONDARY /* #if defined AK8975_SECONDARY */
#define AK8963_SECONDARY
#endif /* #if defined AK8975_SECONDARY */
#endif /* #if defined MPU9150 */
#if defined AK8975_SECONDARY || defined AK8963_SECONDARY
#define AK89xx_SECONDARY
#else
/* #warning "No compass = less profit for Invensense. Lame." */
#endif
static int set_int_enable(uint8_t enable);
/* Hardware registers needed by driver. */
struct gyro_reg_s
{
uint8_t who_am_i;
uint8_t rate_div;
uint8_t lpf;
uint8_t prod_id;
uint8_t user_ctrl;
uint8_t fifo_en;
uint8_t gyro_cfg;
uint8_t accel_cfg;
uint8_t accel_cfg2;
uint8_t lp_accel_odr;
uint8_t motion_thr;
uint8_t motion_dur;
uint8_t fifo_count_h;
uint8_t fifo_r_w;
uint8_t raw_gyro;
uint8_t raw_accel;
uint8_t temp;
uint8_t int_enable;
uint8_t dmp_int_status;
uint8_t int_status;
uint8_t accel_intel;
uint8_t pwr_mgmt_1;
uint8_t pwr_mgmt_2;
uint8_t int_pin_cfg;
uint8_t mem_r_w;
uint8_t accel_offs;
uint8_t i2c_mst;
uint8_t bank_sel;
uint8_t mem_start_addr;
uint8_t prgm_start_h;
#if defined AK89xx_SECONDARY
uint8_t s0_addr;
uint8_t s0_reg;
uint8_t s0_ctrl;
uint8_t s1_addr;
uint8_t s1_reg;
uint8_t s1_ctrl;
uint8_t s4_ctrl;
uint8_t s0_do;
uint8_t s1_do;
uint8_t i2c_delay_ctrl;
uint8_t raw_compass;
/* The I2C_MST_VDDIO bit is in this register. */
uint8_t yg_offs_tc;
#endif
};
/* Information specific to a particular device. */
struct hw_s
{
uint8_t addr;
uint16_t max_fifo;
uint8_t num_reg;
uint16_t temp_sens;
int16_t temp_offset;
uint16_t bank_size;
#if defined AK89xx_SECONDARY
uint16_t compass_fsr;
#endif
};
/* When entering motion interrupt mode, the driver keeps track of the
* previous state so that it can be restored at a later time.
* TODO: This is tacky. Fix it.
*/
struct motion_int_cache_s
{
uint16_t gyro_fsr;
uint8_t accel_fsr;
uint16_t lpf;
uint16_t sample_rate;
uint8_t sensors_on;
uint8_t fifo_sensors;
uint8_t dmp_on;
};
/* Cached chip configuration data.
* TODO: A lot of these can be handled with a bitmask.
*/
struct chip_cfg_s
{
/* Matches gyro_cfg >> 3 & 0x03 */
uint8_t gyro_fsr;
/* Matches accel_cfg >> 3 & 0x03 */
uint8_t accel_fsr;
/* Enabled sensors. Uses same masks as fifo_en, NOT pwr_mgmt_2. */
uint8_t sensors;
/* Matches config register. */
uint8_t lpf;
uint8_t clk_src;
/* Sample rate, NOT rate divider. */
uint16_t sample_rate;
/* Matches fifo_en register. */
uint8_t fifo_enable;
/* Matches int enable register. */
uint8_t int_enable;
/* 1 if devices on auxiliary I2C bus appear on the primary. */
uint8_t bypass_mode;
/* 1 if half-sensitivity.
* NOTE: This doesn't beint32_t here, but everything else in hw_s is const,
* and this allows us to save some precious RAM.
*/
uint8_t accel_half;
/* 1 if device in low-power accel-only mode. */
uint8_t lp_accel_mode;
/* 1 if interrupts are only triggered on motion events. */
uint8_t int_motion_only;
struct motion_int_cache_s cache;
/* 1 for active low interrupts. */
uint8_t active_low_int;
/* 1 for latched interrupts. */
uint8_t latched_int;
/* 1 if DMP is enabled. */
uint8_t dmp_on;
/* Ensures that DMP will only be loaded once. */
uint8_t dmp_loaded;
/* Sampling rate used when DMP is enabled. */
uint16_t dmp_sample_rate;
#ifdef AK89xx_SECONDARY
/* Compass sample rate. */
uint16_t compass_sample_rate;
uint8_t compass_addr;
int16_t mag_sens_adj[3];
#endif
};
/* Information for self-test. */
struct test_s
{
uint32_t gyro_sens;
uint32_t accel_sens;
uint8_t reg_rate_div;
uint8_t reg_lpf;
uint8_t reg_gyro_fsr;
uint8_t reg_accel_fsr;
uint16_t wait_ms;
uint8_t packet_thresh;
float min_dps;
float max_dps;
float max_gyro_var;
float min_g;
float max_g;
float max_accel_var;
};
/* Gyro driver state variables. */
struct gyro_state_s
{
const struct gyro_reg_s *reg;
const struct hw_s *hw;
struct chip_cfg_s chip_cfg;
const struct test_s *test;
};
/* Filter configurations. */
enum lpf_e
{
INV_FILTER_256HZ_NOLPF2 = 0,
INV_FILTER_188HZ,
INV_FILTER_98HZ,
INV_FILTER_42HZ,
INV_FILTER_20HZ,
INV_FILTER_10HZ,
INV_FILTER_5HZ,
INV_FILTER_2100HZ_NOLPF,
NUM_FILTER
};
/* Full scale ranges. */
enum gyro_fsr_e
{
INV_FSR_250DPS = 0,
INV_FSR_500DPS,
INV_FSR_1000DPS,
INV_FSR_2000DPS,
NUM_GYRO_FSR
};
/* Full scale ranges. */
enum accel_fsr_e
{
INV_FSR_2G = 0,
INV_FSR_4G,
INV_FSR_8G,
INV_FSR_16G,
NUM_ACCEL_FSR
};
/* Clock sources. */
enum clock_sel_e
{
INV_CLK_INTERNAL = 0,
INV_CLK_PLL,
NUM_CLK
};
/* Low-power accel wakeup rates. */
enum lp_accel_rate_e
{
#if defined MPU6050
INV_LPA_1_25HZ,
INV_LPA_5HZ,
INV_LPA_20HZ,
INV_LPA_40HZ
#elif defined MPU6500
INV_LPA_0_3125HZ,
INV_LPA_0_625HZ,
INV_LPA_1_25HZ,
INV_LPA_2_5HZ,
INV_LPA_5HZ,
INV_LPA_10HZ,
INV_LPA_20HZ,
INV_LPA_40HZ,
INV_LPA_80HZ,
INV_LPA_160HZ,
INV_LPA_320HZ,
INV_LPA_640HZ
#endif
};
#define BIT_I2C_MST_VDDIO (0x80)
#define BIT_FIFO_EN (0x40)
#define BIT_DMP_EN (0x80)
#define BIT_FIFO_RST (0x04)
#define BIT_DMP_RST (0x08)
#define BIT_FIFO_OVERFLOW (0x10)
#define BIT_DATA_RDY_EN (0x01)
#define BIT_DMP_INT_EN (0x02)
#define BIT_MOT_INT_EN (0x40)
#define BITS_FSR (0x18)
#define BITS_LPF (0x07)
#define BITS_HPF (0x07)
#define BITS_CLK (0x07)
#define BIT_FIFO_SIZE_1024 (0x40)
#define BIT_FIFO_SIZE_2048 (0x80)
#define BIT_FIFO_SIZE_4096 (0xC0)
#define BIT_RESET (0x80)
#define BIT_SLEEP (0x40)
#define BIT_S0_DELAY_EN (0x01)
#define BIT_S2_DELAY_EN (0x04)
#define BITS_SLAVE_LENGTH (0x0F)
#define BIT_SLAVE_BYTE_SW (0x40)
#define BIT_SLAVE_GROUP (0x10)
#define BIT_SLAVE_EN (0x80)
#define BIT_I2C_READ (0x80)
#define BITS_I2C_MASTER_DLY (0x1F)
#define BIT_AUX_IF_EN (0x20)
#define BIT_ACTL (0x80)
#define BIT_LATCH_EN (0x20)
#define BIT_ANY_RD_CLR (0x10)
#define BIT_BYPASS_EN (0x02)
#define BITS_WOM_EN (0xC0)
#define BIT_LPA_CYCLE (0x20)
#define BIT_STBY_XA (0x20)
#define BIT_STBY_YA (0x10)
#define BIT_STBY_ZA (0x08)
#define BIT_STBY_XG (0x04)
#define BIT_STBY_YG (0x02)
#define BIT_STBY_ZG (0x01)
#define BIT_STBY_XYZA (BIT_STBY_XA | BIT_STBY_YA | BIT_STBY_ZA)
#define BIT_STBY_XYZG (BIT_STBY_XG | BIT_STBY_YG | BIT_STBY_ZG)
#if defined AK8975_SECONDARY
#define SUPPORTS_AK89xx_HIGH_SENS (0x00)
#define AK89xx_FSR (9830)
#elif defined AK8963_SECONDARY
#define SUPPORTS_AK89xx_HIGH_SENS (0x10)
#define AK89xx_FSR (4915)
#endif
#ifdef AK89xx_SECONDARY
#define AKM_REG_WHOAMI (0x00)
#define AKM_REG_ST1 (0x02)
#define AKM_REG_HXL (0x03)
#define AKM_REG_ST2 (0x09)
#define AKM_REG_CNTL (0x0A)
#define AKM_REG_ASTC (0x0C)
#define AKM_REG_ASAX (0x10)
#define AKM_REG_ASAY (0x11)
#define AKM_REG_ASAZ (0x12)
#define AKM_DATA_READY (0x01)
#define AKM_DATA_OVERRUN (0x02)
#define AKM_OVERFLOW (0x80)
#define AKM_DATA_ERROR (0x40)
#define AKM_BIT_SELF_TEST (0x40)
#define AKM_POWER_DOWN (0x00 | SUPPORTS_AK89xx_HIGH_SENS)
#define AKM_SINGLE_MEASUREMENT (0x01 | SUPPORTS_AK89xx_HIGH_SENS)
#define AKM_FUSE_ROM_ACCESS (0x0F | SUPPORTS_AK89xx_HIGH_SENS)
#define AKM_MODE_SELF_TEST (0x08 | SUPPORTS_AK89xx_HIGH_SENS)
#define AKM_WHOAMI (0x48)
#endif
#if defined MPU6050
const struct gyro_reg_s reg =
{
.who_am_i = 0x75,
.rate_div = 0x19,
.lpf = 0x1A,
.prod_id = 0x0C,
.user_ctrl = 0x6A,
.fifo_en = 0x23,
.gyro_cfg = 0x1B,
.accel_cfg = 0x1C,
.motion_thr = 0x1F,
.motion_dur = 0x20,
.fifo_count_h = 0x72,
.fifo_r_w = 0x74,
.raw_gyro = 0x43,
.raw_accel = 0x3B,
.temp = 0x41,
.int_enable = 0x38,
.dmp_int_status = 0x39,
.int_status = 0x3A,
.pwr_mgmt_1 = 0x6B,
.pwr_mgmt_2 = 0x6C,
.int_pin_cfg = 0x37,
.mem_r_w = 0x6F,
.accel_offs = 0x06,
.i2c_mst = 0x24,
.bank_sel = 0x6D,
.mem_start_addr = 0x6E,
.prgm_start_h = 0x70
#ifdef AK89xx_SECONDARY
,.raw_compass = 0x49,
.yg_offs_tc = 0x01,
.s0_addr = 0x25,
.s0_reg = 0x26,
.s0_ctrl = 0x27,
.s1_addr = 0x28,
.s1_reg = 0x29,
.s1_ctrl = 0x2A,
.s4_ctrl = 0x34,
.s0_do = 0x63,
.s1_do = 0x64,
.i2c_delay_ctrl = 0x67
#endif
};
const struct hw_s hw =
{
.addr = 0x68,
.max_fifo = 1024,
.num_reg = 118,
.temp_sens = 340,
.temp_offset = -521,
.bank_size = 256
#if defined AK89xx_SECONDARY
,.compass_fsr = AK89xx_FSR
#endif
};
const struct test_s test =
{
.gyro_sens = 32768/250,
.accel_sens = 32768/16,
.reg_rate_div = 0, /* 1kHz. */
.reg_lpf = 1, /* 188Hz. */
.reg_gyro_fsr = 0, /* 250dps. */
.reg_accel_fsr = 0x18, /* 16g. */
.wait_ms = 50,
.packet_thresh = 5, /* 5% */
.min_dps = 10.f,
.max_dps = 105.f,
.max_gyro_var = 0.14f,
.min_g = 0.3f,
.max_g = 0.95f,
.max_accel_var = 0.14f
};
static struct gyro_state_s st =
{
.reg = ®,
.hw = &hw,
.test = &test
};
#elif defined MPU6500
const struct gyro_reg_s reg =
{
.who_am_i = 0x75,
.rate_div = 0x19,
.lpf = 0x1A,
.prod_id = 0x0C,
.user_ctrl = 0x6A,
.fifo_en = 0x23,
.gyro_cfg = 0x1B,
.accel_cfg = 0x1C,
.accel_cfg2 = 0x1D,
.lp_accel_odr = 0x1E,
.motion_thr = 0x1F,
.motion_dur = 0x20,
.fifo_count_h = 0x72,
.fifo_r_w = 0x74,
.raw_gyro = 0x43,
.raw_accel = 0x3B,
.temp = 0x41,
.int_enable = 0x38,
.dmp_int_status = 0x39,
.int_status = 0x3A,
.accel_intel = 0x69,
.pwr_mgmt_1 = 0x6B,
.pwr_mgmt_2 = 0x6C,
.int_pin_cfg = 0x37,
.mem_r_w = 0x6F,
.accel_offs = 0x77,
.i2c_mst = 0x24,
.bank_sel = 0x6D,
.mem_start_addr = 0x6E,
.prgm_start_h = 0x70
#ifdef AK89xx_SECONDARY
,.raw_compass = 0x49,
.s0_addr = 0x25,
.s0_reg = 0x26,
.s0_ctrl = 0x27,
.s1_addr = 0x28,
.s1_reg = 0x29,
.s1_ctrl = 0x2A,
.s4_ctrl = 0x34,
.s0_do = 0x63,
.s1_do = 0x64,
.i2c_delay_ctrl = 0x67
#endif
};
const struct hw_s hw =
{
.addr = 0x68,
.max_fifo = 1024,
.num_reg = 128,
.temp_sens = 321,
.temp_offset = 0,
.bank_size = 256
#if defined AK89xx_SECONDARY
,.compass_fsr = AK89xx_FSR
#endif
};
const struct test_s test =
{
.gyro_sens = 32768/250,
.accel_sens = 32768/16,
.reg_rate_div = 0, /* 1kHz. */
.reg_lpf = 1, /* 188Hz. */
.reg_gyro_fsr = 0, /* 250dps. */
.reg_accel_fsr = 0x18, /* 16g. */
.wait_ms = 50,
.packet_thresh = 5, /* 5% */
.min_dps = 10.f,
.max_dps = 105.f,
.max_gyro_var = 0.14f,
.min_g = 0.3f,
.max_g = 0.95f,
.max_accel_var = 0.14f
};
static struct gyro_state_s st =
{
.reg = ®,
.hw = &hw,
.test = &test
};
#endif
#define MAX_PACKET_LENGTH (12)
#ifdef AK89xx_SECONDARY
static int setup_compass(void);
#define MAX_COMPASS_SAMPLE_RATE (100)
#endif
/**
* @brief Enable/disable data ready interrupt.
* If the DMP is on, the DMP interrupt is enabled. Otherwise, the data ready
* interrupt is used.
* @param[in] enable 1 to enable interrupt.
* @return 0 if successful.
*/
static int set_int_enable(uint8_t enable)
{
uint8_t tmp;
if (st.chip_cfg.dmp_on)
{
if (enable)
tmp = BIT_DMP_INT_EN;
else
tmp = 0x00;
if (i2c_write(st.hw->addr, st.reg->int_enable, 1, &tmp))
return 1;
st.chip_cfg.int_enable = tmp;
}
else
{
if (!st.chip_cfg.sensors)
return 1;
if (enable && st.chip_cfg.int_enable)
return 0;
if (enable)
tmp = BIT_DATA_RDY_EN;
else
tmp = 0x00;
if (i2c_write(st.hw->addr, st.reg->int_enable, 1, &tmp))
return 1;
st.chip_cfg.int_enable = tmp;
}
return 0;
}
/**
* @brief Register dump for testing.
* @return 0 if successful.
*/
uint8_t mpu_reg_dump(void)
{
uint8_t ii;
uint8_t data;
for (ii = 0; ii < st.hw->num_reg; ii++)
{
if (ii == st.reg->fifo_r_w || ii == st.reg->mem_r_w)
continue;
if (i2c_read(st.hw->addr, ii, 1, &data))
return 1;
#if defined MPU_DEBUG
printf_P(PSTR("%#5x: %#5x\r\r\n"), ii, data);
#endif
}
return 0;
}
/**
* @brief Read from a single register.
* NOTE: The memory and FIFO read/write registers cannot be accessed.
* @param[in] reg Register address.
* @param[out] data Register data.
* @return 0 if successful.
*/
uint8_t mpu_read_reg(uint8_t reg, uint8_t *data)
{
if (reg == st.reg->fifo_r_w || reg == st.reg->mem_r_w)
return 1;
if (reg >= st.hw->num_reg)
return 1;
return i2c_read(st.hw->addr, reg, 1, data);
}
/**
* @brief Initialize hardware.
* Initial configuration:\n
* Gyro FSR: +/- 2000DPS\n
* Accel FSR +/- 2G\n
* DLPF: 42Hz\n
* FIFO rate: 50Hz\n
* Clock source: Gyro PLL\n
* FIFO: Disabled.\n
* Data ready interrupt: Disabled, active low, unlatched.
* @param[in] int_param Platform-specific parameters to interrupt API.
* @return 0 if successful.
*/
uint8_t mpu_init(struct int_param_s *int_param)
{
uint8_t data[6], rev;
/* Reset device. */
data[0] = BIT_RESET;
if (i2c_write(st.hw->addr, st.reg->pwr_mgmt_1, 1, data))
return 1;
delay_ms(100);
/* Wake up chip. */
data[0] = 0x00;
if (i2c_write(st.hw->addr, st.reg->pwr_mgmt_1, 1, data))
return 1;
#if defined MPU6050
/* Check product revision. */
if (i2c_read(st.hw->addr, st.reg->accel_offs, 6, data))
return 1;
rev = ((data[5] & 0x01) << 2) | ((data[3] & 0x01) << 1) |
(data[1] & 0x01);
#if defined MPU_DEBUG
printf_P(PSTR("Software product rev. %d.\r\n"), rev);
#endif
if (rev)
{
/* Congrats, these parts are better. */
if (rev == 1)
st.chip_cfg.accel_half = 1;
else if (rev == 2)
st.chip_cfg.accel_half = 0;
else
{
#if defined MPU_DEBUG
printf_P(PSTR("Unsupported software product rev. %d.\r\n"), rev);
#endif
return 1;
}
}
else
{
if (i2c_read(st.hw->addr, st.reg->prod_id, 1, data))
return 1;
rev = data[0] & 0x0F;
if (!rev)
{
#if defined MPU_DEBUG
printf_P(PSTR("Product ID read as 0 indicates device is either "
"incompatible or an MPU3050.\r\n"));
#endif
return 1;
}
else if (rev == 4)
{
#if defined MPU_DEBUG
printf_P(PSTR("Half sensitivity part found.\r\n"));
#endif
st.chip_cfg.accel_half = 1;
}
else
st.chip_cfg.accel_half = 0;
}
#elif defined MPU6500
#define MPU6500_MEM_REV_ADDR (0x17)
if (mpu_read_mem(MPU6500_MEM_REV_ADDR, 1, &rev))
return 1;
if (rev == 0x1)
st.chip_cfg.accel_half = 0;
else
{
#if defined MPU_DEBUG
printf_P(PSTR("Unsupported software product rev. %d.\r\n"), rev);
#endif
return 1;
}
/* MPU6500 shares 4kB of memory between the DMP and the FIFO. Since the
* first 3kB are needed by the DMP, we'll use the last 1kB for the FIFO.
*/
data[0] = BIT_FIFO_SIZE_1024 | 0x8;
if (i2c_write(st.hw->addr, st.reg->accel_cfg2, 1, data))
return 1;
#endif
/* Set to invalid values to ensure no I2C writes are skipped. */
st.chip_cfg.sensors = 0xFF;
st.chip_cfg.gyro_fsr = 0xFF;
st.chip_cfg.accel_fsr = 0xFF;
st.chip_cfg.lpf = 0xFF;
st.chip_cfg.sample_rate = 0xFFFF;
st.chip_cfg.fifo_enable = 0xFF;
st.chip_cfg.bypass_mode = 0xFF;
#ifdef AK89xx_SECONDARY
st.chip_cfg.compass_sample_rate = 0xFFFF;
#endif
/* mpu_set_sensors always preserves this setting. */
st.chip_cfg.clk_src = INV_CLK_PLL;
/* Handled in next call to mpu_set_bypass. */
st.chip_cfg.active_low_int = 1;
st.chip_cfg.latched_int = 0;
st.chip_cfg.int_motion_only = 0;
st.chip_cfg.lp_accel_mode = 0;
memset(&st.chip_cfg.cache, 0, sizeof(st.chip_cfg.cache));
st.chip_cfg.dmp_on = 0;
st.chip_cfg.dmp_loaded = 0;
st.chip_cfg.dmp_sample_rate = 0;
if (mpu_set_gyro_fsr(2000))
return 1;
if (mpu_set_accel_fsr(2))
return 1;
if (mpu_set_lpf(42))
return 1;
if (mpu_set_sample_rate(50))
return 1;
if (mpu_configure_fifo(0))
return 1;
/* if (int_param)
reg_int_cb(int_param); */
#ifdef AK89xx_SECONDARY
setup_compass();
if (mpu_set_compass_sample_rate(10))
return 1;
#else
/* Already disabled by setup_compass. */
if (mpu_set_bypass(0))
return 1;
#endif
mpu_set_sensors(0);
#if defined MPU_DEBUG
printf_P(PSTR("Initializing is done...\r\n"));
#endif
return 0;
}
/**
* @brief Enter low-power accel-only mode.
* In low-power accel mode, the chip goes to sleep and only wakes up to sample
* the accelerometer at one of the following frequencies:
* \n MPU6050: 1.25Hz, 5Hz, 20Hz, 40Hz
* \n MPU6500: 1.25Hz, 2.5Hz, 5Hz, 10Hz, 20Hz, 40Hz, 80Hz, 160Hz, 320Hz, 640Hz
* \n If the requested rate is not one listed above, the device will be set to
* the next highest rate. Requesting a rate above the maximum supported
* frequency will result in an error.
* \n To select a fractional wake-up frequency, round down the value passed to
* @e rate.
* @param[in] rate Minimum sampling rate, or zero to disable LP
* accel mode.
* @return 0 if successful.
*/
uint8_t mpu_lp_accel_mode(uint8_t rate)
{
uint8_t tmp[2];
if (rate > 40)
return 1;
if (!rate)
{
mpu_set_int_latched(0);
tmp[0] = 0;
tmp[1] = BIT_STBY_XYZG;
if (i2c_write(st.hw->addr, st.reg->pwr_mgmt_1, 2, tmp))
return 1;
st.chip_cfg.lp_accel_mode = 0;
return 0;
}
/* For LP accel, we automatically configure the hardware to produce latched
* interrupts. In LP accel mode, the hardware cycles into sleep mode before
* it gets a chance to deassert the interrupt pin; therefore, we shift this
* responsibility over to the MCU.
*
* Any register read will clear the interrupt.
*/
mpu_set_int_latched(1);
#if defined MPU6050
tmp[0] = BIT_LPA_CYCLE;
if (rate == 1)
{
tmp[1] = INV_LPA_1_25HZ;
mpu_set_lpf(5);
}
else if (rate <= 5)
{
tmp[1] = INV_LPA_5HZ;
mpu_set_lpf(5);
}
else if (rate <= 20)
{
tmp[1] = INV_LPA_20HZ;
mpu_set_lpf(10);
}
else
{
tmp[1] = INV_LPA_40HZ;
mpu_set_lpf(20);
}
tmp[1] = (tmp[1] << 6) | BIT_STBY_XYZG;
if (i2c_write(st.hw->addr, st.reg->pwr_mgmt_1, 2, tmp))
return 1;
#elif defined MPU6500
/* Set wake frequency. */
if (rate == 1)
tmp[0] = INV_LPA_1_25HZ;
else if (rate == 2)
tmp[0] = INV_LPA_2_5HZ;
else if (rate <= 5)
tmp[0] = INV_LPA_5HZ;
else if (rate <= 10)
tmp[0] = INV_LPA_10HZ;
else if (rate <= 20)
tmp[0] = INV_LPA_20HZ;
else if (rate <= 40)
tmp[0] = INV_LPA_40HZ;
else if (rate <= 80)
tmp[0] = INV_LPA_80HZ;
else if (rate <= 160)
tmp[0] = INV_LPA_160HZ;
else if (rate <= 320)
tmp[0] = INV_LPA_320HZ;
else
tmp[0] = INV_LPA_640HZ;
if (i2c_write(st.hw->addr, st.reg->lp_accel_odr, 1, tmp))
return 1;
tmp[0] = BIT_LPA_CYCLE;
if (i2c_write(st.hw->addr, st.reg->pwr_mgmt_1, 1, tmp))
return 1;
#endif
st.chip_cfg.sensors = INV_XYZ_ACCEL;
st.chip_cfg.clk_src = 0;
st.chip_cfg.lp_accel_mode = 1;
mpu_configure_fifo(0);
return 0;
}
/**
* @brief Read raw gyro data directly from the registers.
* @param[out] data Raw data in hardware units.
* @return 0 if successful.
*/
uint8_t mpu_get_gyro_reg(int16_t *data)
{
uint8_t tmp[6];
if (!(st.chip_cfg.sensors & INV_XYZ_GYRO))
return 1;
if (i2c_read(st.hw->addr, st.reg->raw_gyro, 6, tmp))
return 1;
data[0] = (tmp[0] << 8) | tmp[1];
data[1] = (tmp[2] << 8) | tmp[3];
data[2] = (tmp[4] << 8) | tmp[5];
return 0;
}
/**
* @brief Read raw accel data directly from the registers.
* @param[out] data Raw data in hardware units.
* @return 0 if successful.
*/
uint8_t mpu_get_accel_reg(int16_t *data)
{
uint8_t tmp[6];
if (!(st.chip_cfg.sensors & INV_XYZ_ACCEL))
return 1;
if (i2c_read(st.hw->addr, st.reg->raw_accel, 6, tmp))
return 1;
data[0] = (tmp[0] << 8) | tmp[1];
data[1] = (tmp[2] << 8) | tmp[3];
data[2] = (tmp[4] << 8) | tmp[5];
return 0;
}
/**
* @brief Read temperature data directly from the registers.
* @param[out] data Data in q16 format.
* @return 0 if successful.
*/
uint8_t mpu_get_temperature(int32_t *data)
{
uint8_t tmp[2];
int16_t raw;
if (!(st.chip_cfg.sensors))
return 1;
if (i2c_read(st.hw->addr, st.reg->temp, 2, tmp))
return 1;
raw = (tmp[0] << 8) | tmp[1];
data[0] = (int32_t)((35 + ((raw - (float)st.hw->temp_offset) / st.hw->temp_sens)) * 65536L);
return 0;
}
/**
* @brief Push biases to the accel bias registers.
* This function expects biases relative to the current sensor output, and
* these biases will be added to the factory-supplied values.
* @param[in] accel_bias New biases.
* @return 0 if successful.
*/
uint8_t mpu_set_accel_bias(const int32_t *accel_bias)
{
uint8_t data[6];
int16_t accel_hw[3];
int16_t got_accel[3];
int16_t fg[3];
if (!accel_bias)
return 1;
if (!accel_bias[0] && !accel_bias[1] && !accel_bias[2])
return 0;
if (i2c_read(st.hw->addr, 3, 3, data))
return 1;
fg[0] = ((data[0] >> 4) + 8) & 0xf;
fg[1] = ((data[1] >> 4) + 8) & 0xf;
fg[2] = ((data[2] >> 4) + 8) & 0xf;
accel_hw[0] = (int16_t)(accel_bias[0] * 2 / (64 + fg[0]));
accel_hw[1] = (int16_t)(accel_bias[1] * 2 / (64 + fg[1]));
accel_hw[2] = (int16_t)(accel_bias[2] * 2 / (64 + fg[2]));
if (i2c_read(st.hw->addr, 0x06, 6, data))
return 1;
got_accel[0] = ((int16_t)data[0] << 8) | data[1];
got_accel[1] = ((int16_t)data[2] << 8) | data[3];
got_accel[2] = ((int16_t)data[4] << 8) | data[5];
accel_hw[0] += got_accel[0];
accel_hw[1] += got_accel[1];
accel_hw[2] += got_accel[2];
data[0] = (accel_hw[0] >> 8) & 0xff;
data[1] = (accel_hw[0]) & 0xff;
data[2] = (accel_hw[1] >> 8) & 0xff;
data[3] = (accel_hw[1]) & 0xff;
data[4] = (accel_hw[2] >> 8) & 0xff;
data[5] = (accel_hw[2]) & 0xff;
if (i2c_write(st.hw->addr, 0x06, 6, data))
return 1;
return 0;