diff --git a/aarch64/bitasm.h b/aarch64/bitasm.h index 7a416bf9..18bc77cf 100644 --- a/aarch64/bitasm.h +++ b/aarch64/bitasm.h @@ -87,8 +87,7 @@ __asm__ volatile \ #define RDTSC64(_mem64) \ __asm__ volatile \ ( \ - "mrs %0 , cntvct_el0" "\n\t" \ - "isb" \ + "mrs %0 , cntvct_el0" \ : "=r" (_mem64) \ : \ : "cc", "memory" \ @@ -785,14 +784,9 @@ static unsigned long long uBenchCounter[2][4] __attribute__((aligned(8)))=\ \ inline static void UBENCH_RDCOUNTER_VOID(unsigned int idx) {} \ \ -inline static void UBENCH_With_RDTSCP_No_RDPMC(unsigned int idx) \ -{ \ - RDTSCP64(uBenchCounter[0][idx]); \ -} \ - \ inline static void UBENCH_With_RDTSC_No_RDPMC(unsigned int idx) \ { \ - RDTSC64(uBenchCounter[0][idx]) ; \ + RDTSC64(uBenchCounter[0][idx]) ; SERIALIZE(); \ } \ \ inline static void UBENCH_With_RDTSCP_RDPMC(unsigned int idx) \ diff --git a/aarch64/corefreqk.c b/aarch64/corefreqk.c index 39546543..d28af68f 100644 --- a/aarch64/corefreqk.c +++ b/aarch64/corefreqk.c @@ -355,6 +355,7 @@ static unsigned long long CoreFreqK_Read_CS_From_TSC(struct clocksource *cs) unsigned long long TSC __attribute__ ((aligned (8))); UNUSED(cs); RDTSC64(TSC); + SERIALIZE(); return TSC; } @@ -2571,8 +2572,7 @@ void Generic_Core_Counters_Clear(union SAVE_AREA_CORE *Save, CORE_RO *Core) volatile CNTPCT cntpct; \ __asm__ volatile \ ( \ - "mrs %[cntpct], cntpct_el0" "\n\t" \ - "isb" \ + "mrs %[cntpct], cntpct_el0" \ : [cntpct] "=r" (cntpct) \ : \ : "cc", "memory" \ diff --git a/aarch64/corefreqk.h b/aarch64/corefreqk.h index f106f359..0649b8c9 100644 --- a/aarch64/corefreqk.h +++ b/aarch64/corefreqk.h @@ -46,8 +46,7 @@ __asm__ volatile \ _tsc_inst(_reg0) \ "# Store values into memory." "\n\t" \ "str " #_reg0 ", %0" "\n\t" \ - "str " #_reg1 ", %1" "\n\t" \ - "isb" \ + "str " #_reg1 ", %1" \ : "=m" (mem_tsc), "=m" (_mem1) \ : \ : "%" #_reg0"", "%" #_reg1"", \ @@ -66,8 +65,7 @@ __asm__ volatile \ "# Store values into memory." "\n\t" \ "str " #_reg0 ", %0" "\n\t" \ "str " #_reg1 ", %1" "\n\t" \ - "str " #_reg2 ", %2" "\n\t" \ - "isb" \ + "str " #_reg2 ", %2" \ : "=m" (mem_tsc), "=m" (_mem1), "=m" (_mem2) \ : \ : "%" #_reg0"", "%" #_reg1"", "%" #_reg2"", \ @@ -88,8 +86,7 @@ __asm__ volatile \ "str " #_reg0 ", %0" "\n\t" \ "str " #_reg1 ", %1" "\n\t" \ "str " #_reg2 ", %2" "\n\t" \ - "str " #_reg3 ", %3" "\n\t" \ - "isb" \ + "str " #_reg3 ", %3" \ : "=m" (mem_tsc), "=m" (_mem1), "=m" (_mem2), "=m" (_mem3) \ : \ : "%" #_reg0"", "%" #_reg1"", "%" #_reg2"", "%" #_reg3"", \