From 75362d4092d2a5cb89b1feff8d03f5b79e5d7327 Mon Sep 17 00:00:00 2001 From: CyrIng Date: Wed, 16 Oct 2024 13:11:19 +0200 Subject: [PATCH] [Intel][ADL-X/ADL-N] Declare PCI ids to probe the memory controller --- x86_64/corefreq-api.h | 17 ++++++++++++ x86_64/corefreq.h | 4 +++ x86_64/corefreqd.c | 28 +++++++++++++++++++ x86_64/corefreqk.h | 64 +++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 113 insertions(+) diff --git a/x86_64/corefreq-api.h b/x86_64/corefreq-api.h index 03b6d27..0ecdd34 100644 --- a/x86_64/corefreq-api.h +++ b/x86_64/corefreq-api.h @@ -1508,6 +1508,23 @@ typedef struct #define DID_INTEL_ADL_PCH_P_SMBUS 0x51a3 /* ADL PCH-P Watchdog */ #define DID_INTEL_ADL_PCH_M_SMBUS 0x54a3 /* ADL PCH-M Watchdog */ #define DID_INTEL_ADL_S_PCH_SMBUS 0x7aa3 +/* Source: Intel Atom x7000 / Intel Core i3 N-Series Datasheet, vol 1 */ +#define DID_INTEL_ALDERLAKE_N300_8E_HB 0x4617 +#define DID_INTEL_ALDERLAKE_N200_4E_HB 0x461b /* SKU_3 */ +#define DID_INTEL_ALDERLAKE_N100_4E_HB 0x461c +#define DID_INTEL_ALDERLAKE_X7835RE_8C_HB 0x4675 /* SKU_11_14 */ +#define DID_INTEL_ALDERLAKE_X7433RE_4C_HB 0x4674 /* SKU_10_13 */ +#define DID_INTEL_ALDERLAKE_N97_4E_HB 0x4678 /* SKU_2 */ +#define DID_INTEL_ALDERLAKE_X7425E_4C_HB 0x4679 /* SKU_6 */ +#define DID_INTEL_ALDERLAKE_N50_2E_HB 0x4614 /* SKU_1 */ +#define DID_INTEL_ALDERLAKE_X7213RE_2C_HB 0x4632 /* SKU_9 */ +#define DID_INTEL_ALDERLAKE_X7211RE_2C_HB 0x4673 /* SKU_8_12 */ +#define DID_INTEL_ALDERLAKE_X7213E_2C_HB 0x4677 /* SKU_7 */ +#define DID_INTEL_ALDERLAKE_X7211E_2C_HB 0x467c /* SKU_5 */ +#define DID_INTEL_ALDERLAKE_N305_PCH 0x5481 /* SKU_4 */ +#define DID_INTEL_ALDERLAKE_N95_PCH 0x5482 +#define DID_INTEL_ALDERLAKE_X7000E_PCH 0x5489 /* SKU_5_7 */ +#define DID_INTEL_ALDERLAKE_X7000RE_PCH 0x548a /* SKU_8_14 */ /* Source: 13th Generation Intel Core Processors Datasheet, vol 1 */ #define DID_INTEL_RAPTORLAKE_S_8P_16E_HB 0xa700 #define DID_INTEL_RAPTORLAKE_S_8P_8E_HB 0xa703 diff --git a/x86_64/corefreq.h b/x86_64/corefreq.h index 1f90b63..3b8c8ae 100644 --- a/x86_64/corefreq.h +++ b/x86_64/corefreq.h @@ -79,6 +79,10 @@ enum CHIPSET { IC_HM670, IC_ADL_PCH_P, IC_ADL_PCH_U, + IC_ADL_PCH_N305, + IC_ADL_PCH_N95, + IC_ADL_PCH_X7000E, + IC_ADL_PCH_X7000RE, IC_Z790, IC_H770, IC_B760, diff --git a/x86_64/corefreqd.c b/x86_64/corefreqd.c index 45e6ca0..1c32461 100644 --- a/x86_64/corefreqd.c +++ b/x86_64/corefreqd.c @@ -7048,6 +7048,10 @@ static char *Chipset[CHIPSETS] = { [IC_HM670] = "Intel HM670", [IC_ADL_PCH_P] = "Intel ADL PCH-P", [IC_ADL_PCH_U] = "Intel ADL PCH-U", + [IC_ADL_PCH_N305] = "Intel ADL N305", + [IC_ADL_PCH_N95] = "Intel ADL N95", + [IC_ADL_PCH_X7000E] = "Intel X7000E", + [IC_ADL_PCH_X7000RE] = "Intel X7000RE", [IC_Z790] = "Intel Z790", [IC_H770] = "Intel H770", [IC_B760] = "Intel B760", @@ -7526,6 +7530,18 @@ void PCI_Intel(RO(SHM_STRUCT) *RO(Shm), RO(PROC) *RO(Proc), RO(CORE) *RO(Core), case DID_INTEL_ALDERLAKE_U_2P_8E_HB: case DID_INTEL_ALDERLAKE_U_2P_4E_HB: case DID_INTEL_ALDERLAKE_U_1P_4E_HB: + case DID_INTEL_ALDERLAKE_N300_8E_HB: + case DID_INTEL_ALDERLAKE_N200_4E_HB: + case DID_INTEL_ALDERLAKE_N100_4E_HB: + case DID_INTEL_ALDERLAKE_X7835RE_8C_HB: + case DID_INTEL_ALDERLAKE_X7433RE_4C_HB: + case DID_INTEL_ALDERLAKE_N97_4E_HB: + case DID_INTEL_ALDERLAKE_X7425E_4C_HB: + case DID_INTEL_ALDERLAKE_N50_2E_HB: + case DID_INTEL_ALDERLAKE_X7213RE_2C_HB: + case DID_INTEL_ALDERLAKE_X7211RE_2C_HB: + case DID_INTEL_ALDERLAKE_X7213E_2C_HB: + case DID_INTEL_ALDERLAKE_X7211E_2C_HB: ADL_CAP(RO(Shm), RO(Proc), RO(Core)); ADL_IMC(RO(Shm), RO(Proc)); break; @@ -7559,6 +7575,18 @@ void PCI_Intel(RO(SHM_STRUCT) *RO(Shm), RO(PROC) *RO(Proc), RO(CORE) *RO(Core), case DID_INTEL_ALDERLAKE_PCH_U: SET_CHIPSET(IC_ADL_PCH_U); break; + case DID_INTEL_ALDERLAKE_N305_PCH: + SET_CHIPSET(IC_ADL_PCH_N305); + break; + case DID_INTEL_ALDERLAKE_N95_PCH: + SET_CHIPSET(IC_ADL_PCH_N95); + break; + case DID_INTEL_ALDERLAKE_X7000E_PCH: + SET_CHIPSET(IC_ADL_PCH_X7000E); + break; + case DID_INTEL_ALDERLAKE_X7000RE_PCH: + SET_CHIPSET(IC_ADL_PCH_X7000RE); + break; case DID_INTEL_GEMINILAKE_HB: GLK_CAP(RO(Shm), RO(Proc), RO(Core)); GLK_IMC(RO(Shm), RO(Proc)); diff --git a/x86_64/corefreqk.h b/x86_64/corefreqk.h index f2aae6a..bf7fc12 100644 --- a/x86_64/corefreqk.h +++ b/x86_64/corefreqk.h @@ -2954,6 +2954,54 @@ static struct pci_device_id PCI_ADL_RPL_ids[] = { PCI_VDEVICE(INTEL, DID_INTEL_ALDERLAKE_U_1P_4E_HB), .driver_data = (kernel_ulong_t) ADL_IMC }, + { + PCI_VDEVICE(INTEL, DID_INTEL_ALDERLAKE_N300_8E_HB), + .driver_data = (kernel_ulong_t) ADL_IMC + }, + { + PCI_VDEVICE(INTEL, DID_INTEL_ALDERLAKE_N200_4E_HB), + .driver_data = (kernel_ulong_t) ADL_IMC + }, + { + PCI_VDEVICE(INTEL, DID_INTEL_ALDERLAKE_N100_4E_HB), + .driver_data = (kernel_ulong_t) ADL_IMC + }, + { + PCI_VDEVICE(INTEL, DID_INTEL_ALDERLAKE_X7835RE_8C_HB), + .driver_data = (kernel_ulong_t) ADL_IMC + }, + { + PCI_VDEVICE(INTEL, DID_INTEL_ALDERLAKE_X7433RE_4C_HB), + .driver_data = (kernel_ulong_t) ADL_IMC + }, + { + PCI_VDEVICE(INTEL, DID_INTEL_ALDERLAKE_N97_4E_HB), + .driver_data = (kernel_ulong_t) ADL_IMC + }, + { + PCI_VDEVICE(INTEL, DID_INTEL_ALDERLAKE_X7425E_4C_HB), + .driver_data = (kernel_ulong_t) ADL_IMC + }, + { + PCI_VDEVICE(INTEL, DID_INTEL_ALDERLAKE_N50_2E_HB), + .driver_data = (kernel_ulong_t) ADL_IMC + }, + { + PCI_VDEVICE(INTEL, DID_INTEL_ALDERLAKE_X7213RE_2C_HB), + .driver_data = (kernel_ulong_t) ADL_IMC + }, + { + PCI_VDEVICE(INTEL, DID_INTEL_ALDERLAKE_X7211RE_2C_HB), + .driver_data = (kernel_ulong_t) ADL_IMC + }, + { + PCI_VDEVICE(INTEL, DID_INTEL_ALDERLAKE_X7213E_2C_HB), + .driver_data = (kernel_ulong_t) ADL_IMC + }, + { + PCI_VDEVICE(INTEL, DID_INTEL_ALDERLAKE_X7211E_2C_HB), + .driver_data = (kernel_ulong_t) ADL_IMC + }, { PCI_VDEVICE(INTEL, DID_INTEL_ALDERLAKE_H610_PCH), .driver_data = (kernel_ulong_t) ADL_PCH @@ -2994,6 +3042,22 @@ static struct pci_device_id PCI_ADL_RPL_ids[] = { PCI_VDEVICE(INTEL, DID_INTEL_ALDERLAKE_PCH_U), .driver_data = (kernel_ulong_t) ADL_PCH }, + { + PCI_VDEVICE(INTEL, DID_INTEL_ALDERLAKE_N305_PCH), + .driver_data = (kernel_ulong_t) ADL_PCH + }, + { + PCI_VDEVICE(INTEL, DID_INTEL_ALDERLAKE_N95_PCH), + .driver_data = (kernel_ulong_t) ADL_PCH + }, + { + PCI_VDEVICE(INTEL, DID_INTEL_ALDERLAKE_X7000E_PCH), + .driver_data = (kernel_ulong_t) ADL_PCH + }, + { + PCI_VDEVICE(INTEL, DID_INTEL_ALDERLAKE_X7000RE_PCH), + .driver_data = (kernel_ulong_t) ADL_PCH + }, /* 13th Generation */ { PCI_VDEVICE(INTEL, DID_INTEL_RAPTORLAKE_S_8P_16E_HB),