From 6bbbb752d0efcfcf42daffbcc78ad38640acbade Mon Sep 17 00:00:00 2001 From: CyrIng Date: Mon, 19 Feb 2024 13:38:44 +0100 Subject: [PATCH] [AArch64] Split GIC in version and fraction bits --- aarch64/corefreq-cli-json.c | 6 ++++-- aarch64/corefreq-cli.c | 10 +++++++--- aarch64/corefreqk.c | 9 ++++++--- aarch64/coretypes.h | 5 +++-- 4 files changed, 20 insertions(+), 10 deletions(-) diff --git a/aarch64/corefreq-cli-json.c b/aarch64/corefreq-cli-json.c index eea5c6f5..00cf1980 100644 --- a/aarch64/corefreq-cli-json.c +++ b/aarch64/corefreq-cli-json.c @@ -539,8 +539,10 @@ void JsonSysInfo(RO(SHM_STRUCT) *RO(Shm)) json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.FP); json_key(&s, "SIMD"); json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.SIMD); - json_key(&s, "GIC"); - json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.GIC); + json_key(&s, "GIC_vers"); + json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.GIC_vers); + json_key(&s, "GIC_frac"); + json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.GIC_frac); json_key(&s, "SVE"); json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.SVE); json_key(&s, "DIT"); diff --git a/aarch64/corefreq-cli.c b/aarch64/corefreq-cli.c index 1b5c8d1a..b31b3071 100644 --- a/aarch64/corefreq-cli.c +++ b/aarch64/corefreq-cli.c @@ -2080,10 +2080,14 @@ REASON_CODE SysInfoFeatures( Window *win, }, { NULL, - RO(Shm)->Proc.Features.GIC == 1, + ( RO(Shm)->Proc.Features.GIC_vers + + RO(Shm)->Proc.Features.GIC_frac ) > 0, attr_Feat, - 2, "%s%.*sGIC [%7s]", RSC(FEATURES_GIC).CODE(), - width - 18 - RSZ(FEATURES_GIC), + 2, RO(Shm)->Proc.Features.GIC_vers ? + RO(Shm)->Proc.Features.GIC_frac ? + "%s v4.1%.*sGIC [%7s]" : "%s v3.0%.*sGIC [%7s]" + "%s %.*sGIC [%7s]" : "%s %.*sGIC [%7s]", + RSC(FEATURES_GIC).CODE(), width - 23 - RSZ(FEATURES_GIC), NULL }, { diff --git a/aarch64/corefreqk.c b/aarch64/corefreqk.c index f2ebcbc1..790e9cd4 100644 --- a/aarch64/corefreqk.c +++ b/aarch64/corefreqk.c @@ -939,13 +939,16 @@ static void Query_Features(void *pArg) break; } switch (pfr0.GIC) { - case 0b0001: case 0b0011: - iArg->Features->GIC = 1; + iArg->Features->GIC_frac = 1; + fallthrough; + case 0b0001: + iArg->Features->GIC_vers = 1; break; case 0b0000: default: - iArg->Features->GIC = 0; + iArg->Features->GIC_frac = \ + iArg->Features->GIC_vers = 0; break; } switch (pfr0.SVE) { diff --git a/aarch64/coretypes.h b/aarch64/coretypes.h index e6a66a95..9ffbf335 100644 --- a/aarch64/coretypes.h +++ b/aarch64/coretypes.h @@ -795,7 +795,7 @@ typedef struct /* BSP features. */ RAND : 8-7, FP : 9-8, SIMD : 10-9, - GIC : 11-10, + GIC_vers : 11-10, SVE : 12-11, VHE : 13-12, SME : 14-13, @@ -827,7 +827,8 @@ typedef struct /* BSP features. */ FlagM : 40-39, FlagM2 : 41-40, PMULL : 42-41, - _Unused1_ : 64-42; + GIC_frac : 43-42, + _Unused1_ : 64-43; Bit64 CSV2 : 4-0, SSBS : 8-4,