diff --git a/package/boot/uboot-rockchip/Makefile b/package/boot/uboot-rockchip/Makefile index 265ce79af6de37..d026290117fa83 100644 --- a/package/boot/uboot-rockchip/Makefile +++ b/package/boot/uboot-rockchip/Makefile @@ -5,10 +5,10 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/kernel.mk -PKG_VERSION:=2024.10 +PKG_VERSION:=2025.01 PKG_RELEASE:=1 -PKG_HASH:=b28daf4ac17e43156363078bf510297584137f6df50fced9b12df34f61a92fb0 +PKG_HASH:=cdef7d507c93f1bbd9f015ea9bc21fa074268481405501945abc6f854d5b686f PKG_MAINTAINER:=Tobias Maedel diff --git a/package/boot/uboot-rockchip/patches/110-force-pylibfdt-build.patch b/package/boot/uboot-rockchip/patches/110-force-pylibfdt-build.patch index 9aeb495c13343b..39aa94a0eae721 100644 --- a/package/boot/uboot-rockchip/patches/110-force-pylibfdt-build.patch +++ b/package/boot/uboot-rockchip/patches/110-force-pylibfdt-build.patch @@ -1,6 +1,6 @@ --- a/Makefile +++ b/Makefile -@@ -2052,26 +2052,7 @@ endif +@@ -2072,26 +2072,7 @@ endif # Check dtc and pylibfdt, if DTC is provided, else build them PHONY += scripts_dtc scripts_dtc: scripts_basic diff --git a/package/boot/uboot-rockchip/patches/200-radxa-e25-update-baudrate.patch b/package/boot/uboot-rockchip/patches/200-radxa-e25-update-baudrate.patch index b93e7ab06fa347..a51ddc78f160c3 100644 --- a/package/boot/uboot-rockchip/patches/200-radxa-e25-update-baudrate.patch +++ b/package/boot/uboot-rockchip/patches/200-radxa-e25-update-baudrate.patch @@ -1,6 +1,6 @@ --- a/configs/radxa-e25-rk3568_defconfig +++ b/configs/radxa-e25-rk3568_defconfig -@@ -62,6 +62,7 @@ CONFIG_REGULATOR_RK8XX=y +@@ -64,6 +64,7 @@ CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y CONFIG_SCSI=y diff --git a/package/boot/uboot-rockchip/patches/201-rk3568-generic-remove-spi-support.patch b/package/boot/uboot-rockchip/patches/201-rk3568-generic-remove-spi-support.patch index e6378214b41ecf..813f8a0df30274 100644 --- a/package/boot/uboot-rockchip/patches/201-rk3568-generic-remove-spi-support.patch +++ b/package/boot/uboot-rockchip/patches/201-rk3568-generic-remove-spi-support.patch @@ -34,20 +34,22 @@ }; --- a/configs/generic-rk3568_defconfig +++ b/configs/generic-rk3568_defconfig -@@ -5,12 +5,9 @@ CONFIG_ARCH_ROCKCHIP=y +@@ -5,14 +5,10 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_DEFAULT_DEVICE_TREE="rk3568-generic" CONFIG_ROCKCHIP_RK3568=y -CONFIG_ROCKCHIP_SPI_IMAGE=y CONFIG_SPL_SERIAL=y + CONFIG_SYS_LOAD_ADDR=0xc00800 +-CONFIG_SF_DEFAULT_BUS=4 CONFIG_DEBUG_UART_BASE=0xFE660000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_SPL_SPI_FLASH_SUPPORT=y -CONFIG_SPL_SPI=y - CONFIG_SYS_LOAD_ADDR=0xc00800 CONFIG_DEBUG_UART=y CONFIG_FIT=y -@@ -25,8 +22,6 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y + CONFIG_FIT_VERBOSE=y +@@ -25,8 +21,6 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568 CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set @@ -56,11 +58,10 @@ CONFIG_SPL_ATF=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y -@@ -56,21 +51,12 @@ CONFIG_MMC_DW_ROCKCHIP=y +@@ -57,20 +51,12 @@ CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y --CONFIG_SF_DEFAULT_BUS=4 -CONFIG_SPI_FLASH_SFDP_SUPPORT=y -CONFIG_SPI_FLASH_GIGADEVICE=y -CONFIG_SPI_FLASH_MACRONIX=y diff --git a/package/boot/uboot-rockchip/patches/303-rockchip-rk3328-Add-FriendlyARM-NanoPi-R2S-Plus.patch b/package/boot/uboot-rockchip/patches/303-rockchip-rk3328-Add-FriendlyARM-NanoPi-R2S-Plus.patch deleted file mode 100644 index be8f643e7d4580..00000000000000 --- a/package/boot/uboot-rockchip/patches/303-rockchip-rk3328-Add-FriendlyARM-NanoPi-R2S-Plus.patch +++ /dev/null @@ -1,242 +0,0 @@ -From d6a55cc9e7e7d44b4b357818a9690e05af5d87e2 Mon Sep 17 00:00:00 2001 -From: Sergey Bostandzhyan -Date: Fri, 1 Nov 2024 22:21:29 +0000 -Subject: [PATCH] arm64: dts: rockchip: Add DTS for FriendlyARM NanoPi R2S Plus - -The R2S Plus is basically an R2S with additional eMMC. - -The eMMC configuration for the DTS has been extracted and copied from -rk3328-nanopi-r2.dts, v2017.09 branch from the friendlyarm/uboot-rockchip -repository. - -Signed-off-by: Sergey Bostandzhyan -Link: https://lore.kernel.org/r/20240814170048.23816-2-jin@mediatomb.cc -Signed-off-by: Heiko Stuebner - -[ upstream commit: b8c02878292200ebb5b4a8cfc9dbf227327908bd ] - -(cherry picked from commit c9bf98827964441f4dd16faa45bd4046f472e693) -Signed-off-by: Jonas Karlman -Reviewed-by: Kever Yang ---- - .../arm64/rockchip/rk3328-nanopi-r2s-plus.dts | 32 +++++++++++++++++++ - 1 file changed, 32 insertions(+) - create mode 100644 dts/upstream/src/arm64/rockchip/rk3328-nanopi-r2s-plus.dts - -diff --git a/dts/upstream/src/arm64/rockchip/rk3328-nanopi-r2s-plus.dts b/dts/upstream/src/arm64/rockchip/rk3328-nanopi-r2s-plus.dts -new file mode 100644 -index 000000000000..cb81ba3f23ff ---- /dev/null -+++ b/dts/upstream/src/arm64/rockchip/rk3328-nanopi-r2s-plus.dts -@@ -0,0 +1,32 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * (C) Copyright 2018 FriendlyElec Computer Tech. Co., Ltd. -+ * (http://www.friendlyarm.com) -+ * -+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd -+ */ -+ -+/dts-v1/; -+#include "rk3328-nanopi-r2s.dts" -+ -+/ { -+ compatible = "friendlyarm,nanopi-r2s-plus", "rockchip,rk3328"; -+ model = "FriendlyElec NanoPi R2S Plus"; -+ -+ aliases { -+ mmc1 = &emmc; -+ }; -+}; -+ -+&emmc { -+ bus-width = <8>; -+ cap-mmc-highspeed; -+ disable-wp; -+ mmc-hs200-1_8v; -+ non-removable; -+ num-slots = <1>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; -+ supports-emmc; -+ status = "okay"; -+}; -From 3133b7c645157846590f6fc16e26f54d70f5e1d6 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Fri, 1 Nov 2024 22:21:30 +0000 -Subject: [PATCH] board: rockchip: Add FriendlyElec NanoPi R2S Plus - -The FriendlyElec NanoPi R2S Plus is a single-board computer based on -Rockchip RK3328 SoC. It features e.g. 1 GB DDR4 RAM, 32 GB eMMC, -SD-card, 2x GbE LAN, optional M.2 SDIO Wi-Fi and 2x USB 2.0 host. - -Features tested on a NanoPi R2S Plus 2309: -- SD-card boot -- eMMC boot -- Ethernet -- USB gadget -- USB host - -Signed-off-by: Jonas Karlman -Reviewed-by: Kever Yang ---- - .../dts/rk3328-nanopi-r2s-plus-u-boot.dtsi | 3 + - board/rockchip/evb_rk3328/MAINTAINERS | 6 + - configs/nanopi-r2s-plus-rk3328_defconfig | 108 ++++++++++++++++++ - doc/board/rockchip/rockchip.rst | 1 + - 4 files changed, 118 insertions(+) - create mode 100644 arch/arm/dts/rk3328-nanopi-r2s-plus-u-boot.dtsi - create mode 100644 configs/nanopi-r2s-plus-rk3328_defconfig - -diff --git a/arch/arm/dts/rk3328-nanopi-r2s-plus-u-boot.dtsi b/arch/arm/dts/rk3328-nanopi-r2s-plus-u-boot.dtsi -new file mode 100644 -index 000000000000..2ab32cf00a1d ---- /dev/null -+++ b/arch/arm/dts/rk3328-nanopi-r2s-plus-u-boot.dtsi -@@ -0,0 +1,3 @@ -+// SPDX-License-Identifier: GPL-2.0-or-later -+ -+#include "rk3328-nanopi-r2s-u-boot.dtsi" -diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS -index 8f619e54e0e7..5f81be55b8e0 100644 ---- a/board/rockchip/evb_rk3328/MAINTAINERS -+++ b/board/rockchip/evb_rk3328/MAINTAINERS -@@ -28,6 +28,12 @@ F: configs/nanopi-r2s-rk3328_defconfig - F: arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi - F: arch/arm/dts/rk3328-nanopi-r2s.dts - -+NANOPI-R2S-PLUS-RK3328 -+M: Jonas Karlman -+S: Maintained -+F: configs/nanopi-r2s-plus-rk3328_defconfig -+F: arch/arm/dts/rk3328-nanopi-r2s-plus-u-boot.dtsi -+ - ORANGEPI-R1-PLUS-RK3328 - M: Tianling Shen - S: Maintained -diff --git a/configs/nanopi-r2s-plus-rk3328_defconfig b/configs/nanopi-r2s-plus-rk3328_defconfig -new file mode 100644 -index 000000000000..6e6785fcc882 ---- /dev/null -+++ b/configs/nanopi-r2s-plus-rk3328_defconfig -@@ -0,0 +1,108 @@ -+CONFIG_ARM=y -+CONFIG_SKIP_LOWLEVEL_INIT=y -+CONFIG_COUNTER_FREQUENCY=24000000 -+CONFIG_ARCH_ROCKCHIP=y -+CONFIG_SPL_GPIO=y -+CONFIG_NR_DRAM_BANKS=1 -+CONFIG_SF_DEFAULT_SPEED=20000000 -+CONFIG_ENV_OFFSET=0x3F8000 -+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3328-nanopi-r2s-plus" -+CONFIG_DM_RESET=y -+CONFIG_ROCKCHIP_RK3328=y -+CONFIG_SYS_LOAD_ADDR=0x800800 -+CONFIG_DEBUG_UART_BASE=0xFF130000 -+CONFIG_DEBUG_UART_CLOCK=24000000 -+CONFIG_DEBUG_UART=y -+# CONFIG_ANDROID_BOOT_IMAGE is not set -+CONFIG_FIT=y -+CONFIG_FIT_VERBOSE=y -+CONFIG_SPL_FIT_SIGNATURE=y -+CONFIG_SPL_LOAD_FIT=y -+CONFIG_LEGACY_IMAGE_FORMAT=y -+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-nanopi-r2s-plus.dtb" -+# CONFIG_DISPLAY_CPUINFO is not set -+CONFIG_DISPLAY_BOARDINFO_LATE=y -+CONFIG_SPL_MAX_SIZE=0x40000 -+CONFIG_SPL_PAD_TO=0x7f8000 -+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -+CONFIG_SPL_POWER=y -+CONFIG_SPL_ATF=y -+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y -+CONFIG_CMD_BOOTZ=y -+CONFIG_CMD_GPIO=y -+CONFIG_CMD_GPT=y -+CONFIG_CMD_MMC=y -+CONFIG_CMD_USB=y -+CONFIG_CMD_ROCKUSB=y -+CONFIG_CMD_USB_MASS_STORAGE=y -+# CONFIG_CMD_SETEXPR is not set -+CONFIG_CMD_TIME=y -+CONFIG_CMD_REGULATOR=y -+CONFIG_SPL_OF_CONTROL=y -+CONFIG_TPL_OF_CONTROL=y -+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" -+CONFIG_TPL_OF_PLATDATA=y -+CONFIG_ENV_IS_IN_MMC=y -+CONFIG_SYS_RELOC_GD_ENV_ADDR=y -+CONFIG_SYS_MMC_ENV_DEV=0 -+CONFIG_TPL_DM=y -+CONFIG_SPL_DM_SEQ_ALIAS=y -+CONFIG_REGMAP=y -+CONFIG_SPL_REGMAP=y -+CONFIG_TPL_REGMAP=y -+CONFIG_SYSCON=y -+CONFIG_SPL_SYSCON=y -+CONFIG_TPL_SYSCON=y -+CONFIG_CLK=y -+CONFIG_SPL_CLK=y -+CONFIG_FASTBOOT_BUF_ADDR=0x800800 -+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y -+CONFIG_ROCKCHIP_GPIO=y -+CONFIG_SYS_I2C_ROCKCHIP=y -+CONFIG_MMC_DW=y -+CONFIG_MMC_DW_ROCKCHIP=y -+CONFIG_PHY_MOTORCOMM=y -+CONFIG_PHY_REALTEK=y -+CONFIG_DM_MDIO=y -+CONFIG_DM_ETH_PHY=y -+CONFIG_PHY_GIGE=y -+CONFIG_ETH_DESIGNWARE=y -+CONFIG_GMAC_ROCKCHIP=y -+CONFIG_PHY_ROCKCHIP_INNO_USB2=y -+CONFIG_PINCTRL=y -+CONFIG_SPL_PINCTRL=y -+CONFIG_DM_PMIC=y -+CONFIG_PMIC_RK8XX=y -+CONFIG_SPL_DM_REGULATOR=y -+CONFIG_DM_REGULATOR_FIXED=y -+CONFIG_SPL_DM_REGULATOR_FIXED=y -+CONFIG_DM_REGULATOR_GPIO=y -+CONFIG_SPL_DM_REGULATOR_GPIO=y -+CONFIG_REGULATOR_RK8XX=y -+CONFIG_PWM_ROCKCHIP=y -+CONFIG_RAM=y -+CONFIG_SPL_RAM=y -+CONFIG_TPL_RAM=y -+CONFIG_DM_RNG=y -+CONFIG_RNG_ROCKCHIP=y -+CONFIG_BAUDRATE=1500000 -+CONFIG_DEBUG_UART_SHIFT=2 -+CONFIG_SYS_NS16550_MEM32=y -+CONFIG_SYSINFO=y -+CONFIG_SYSRESET=y -+# CONFIG_TPL_SYSRESET is not set -+CONFIG_USB=y -+CONFIG_DM_USB_GADGET=y -+CONFIG_USB_XHCI_HCD=y -+CONFIG_USB_EHCI_HCD=y -+CONFIG_USB_EHCI_GENERIC=y -+CONFIG_USB_OHCI_HCD=y -+CONFIG_USB_OHCI_GENERIC=y -+CONFIG_USB_DWC3=y -+CONFIG_USB_DWC3_GENERIC=y -+CONFIG_USB_GADGET=y -+CONFIG_USB_GADGET_DWC2_OTG=y -+CONFIG_USB_FUNCTION_ROCKUSB=y -+CONFIG_SPL_TINY_MEMSET=y -+CONFIG_TPL_TINY_MEMSET=y -+CONFIG_ERRNO_STR=y -diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst -index 3056e071f4ff..9bab86d23479 100644 ---- a/doc/board/rockchip/rockchip.rst -+++ b/doc/board/rockchip/rockchip.rst -@@ -65,6 +65,7 @@ List of mainline supported Rockchip boards: - - FriendlyElec NanoPi R2C (nanopi-r2c-rk3328) - - FriendlyElec NanoPi R2C Plus (nanopi-r2c-plus-rk3328) - - FriendlyElec NanoPi R2S (nanopi-r2s-rk3328) -+ - FriendlyElec NanoPi R2S Plus (nanopi-r2s-plus-rk3328) - - Pine64 Rock64 (rock64-rk3328) - - Radxa ROCK Pi E (rock-pi-e-rk3328) - - Xunlong Orange Pi R1 Plus (orangepi-r1-plus-rk3328) diff --git a/package/boot/uboot-rockchip/patches/311-rockchip-rk3568-Add-support-for-fastrhino-r6xs.patch b/package/boot/uboot-rockchip/patches/311-rockchip-rk3568-Add-support-for-fastrhino-r6xs.patch index 187bcfd2c1efe3..68d89448b5cff8 100644 --- a/package/boot/uboot-rockchip/patches/311-rockchip-rk3568-Add-support-for-fastrhino-r6xs.patch +++ b/package/boot/uboot-rockchip/patches/311-rockchip-rk3568-Add-support-for-fastrhino-r6xs.patch @@ -195,183 +195,3 @@ +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_FUNCTION_ROCKUSB=y +CONFIG_ERRNO_STR=y ---- a/dts/upstream/src/arm64/rockchip/rk3568-fastrhino-r66s.dtsi -+++ b/dts/upstream/src/arm64/rockchip/rk3568-fastrhino-r66s.dtsi -@@ -39,9 +39,9 @@ - }; - }; - -- dc_12v: dc-12v-regulator { -+ vcc12v_dcin: vcc12v-dcin-regulator { - compatible = "regulator-fixed"; -- regulator-name = "dc_12v"; -+ regulator-name = "vcc12v_dcin"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; -@@ -65,7 +65,7 @@ - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; -- vin-supply = <&dc_12v>; -+ vin-supply = <&vcc12v_dcin>; - }; - - vcc5v0_sys: vcc5v0-sys-regulator { -@@ -75,16 +75,7 @@ - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; -- vin-supply = <&dc_12v>; -- }; -- -- vcc5v0_usb_host: vcc5v0-usb-host-regulator { -- compatible = "regulator-fixed"; -- regulator-name = "vcc5v0_usb_host"; -- regulator-always-on; -- regulator-boot-on; -- regulator-min-microvolt = <5000000>; -- regulator-max-microvolt = <5000000>; -+ vin-supply = <&vcc12v_dcin>; - }; - - vcc5v0_usb_otg: vcc5v0-usb-otg-regulator { -@@ -94,8 +85,9 @@ - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_usb_otg_en>; - regulator-name = "vcc5v0_usb_otg"; -- regulator-always-on; -- regulator-boot-on; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ vin-supply = <&vcc5v0_sys>; - }; - }; - -@@ -123,6 +115,10 @@ - cpu-supply = <&vdd_cpu>; - }; - -+&display_subsystem { -+ status = "disabled"; -+}; -+ - &gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -@@ -405,8 +401,8 @@ - &pmu_io_domains { - pmuio1-supply = <&vcc3v3_pmu>; - pmuio2-supply = <&vcc3v3_pmu>; -- vccio1-supply = <&vccio_acodec>; -- vccio3-supply = <&vccio_sd>; -+ vccio1-supply = <&vcc_3v3>; -+ vccio2-supply = <&vcc_1v8>; - vccio4-supply = <&vcc_1v8>; - vccio5-supply = <&vcc_3v3>; - vccio6-supply = <&vcc_1v8>; -@@ -429,28 +425,12 @@ - status = "okay"; - }; - --&usb_host0_ehci { -- status = "okay"; --}; -- --&usb_host0_ohci { -- status = "okay"; --}; -- - &usb_host0_xhci { - dr_mode = "host"; - extcon = <&usb2phy0>; - status = "okay"; - }; - --&usb_host1_ehci { -- status = "okay"; --}; -- --&usb_host1_ohci { -- status = "okay"; --}; -- - &usb_host1_xhci { - status = "okay"; - }; -@@ -460,7 +440,7 @@ - }; - - &usb2phy0_host { -- phy-supply = <&vcc5v0_usb_host>; -+ phy-supply = <&vcc5v0_sys>; - status = "okay"; - }; - ---- a/dts/upstream/src/arm64/rockchip/rk3568-fastrhino-r66s.dts -+++ b/dts/upstream/src/arm64/rockchip/rk3568-fastrhino-r66s.dts -@@ -11,6 +11,10 @@ - }; - }; - -+&pmu_io_domains { -+ vccio3-supply = <&vccio_sd>; -+}; -+ - &sdmmc0 { - bus-width = <4>; - cap-mmc-highspeed; ---- a/dts/upstream/src/arm64/rockchip/rk3568-fastrhino-r68s.dts -+++ b/dts/upstream/src/arm64/rockchip/rk3568-fastrhino-r68s.dts -@@ -39,7 +39,7 @@ - &gmac0_rx_bus2 - &gmac0_rgmii_clk - &gmac0_rgmii_bus>; -- snps,reset-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_LOW>; -+ snps,reset-gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - /* Reset time is 15ms, 50ms for rtl8211f */ - snps,reset-delays-us = <0 15000 50000>; -@@ -61,7 +61,7 @@ - &gmac1m1_rx_bus2 - &gmac1m1_rgmii_clk - &gmac1m1_rgmii_bus>; -- snps,reset-gpio = <&gpio0 RK_PB1 GPIO_ACTIVE_LOW>; -+ snps,reset-gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - /* Reset time is 15ms, 50ms for rtl8211f */ - snps,reset-delays-us = <0 15000 50000>; -@@ -71,18 +71,18 @@ - }; - - &mdio0 { -- rgmii_phy0: ethernet-phy@0 { -+ rgmii_phy0: ethernet-phy@1 { - compatible = "ethernet-phy-ieee802.3-c22"; -- reg = <0>; -+ reg = <0x1>; - pinctrl-0 = <ð_phy0_reset_pin>; - pinctrl-names = "default"; - }; - }; - - &mdio1 { -- rgmii_phy1: ethernet-phy@0 { -+ rgmii_phy1: ethernet-phy@1 { - compatible = "ethernet-phy-ieee802.3-c22"; -- reg = <0>; -+ reg = <0x1>; - pinctrl-0 = <ð_phy1_reset_pin>; - pinctrl-names = "default"; - }; -@@ -102,6 +102,10 @@ - }; - }; - -+&pmu_io_domains { -+ vccio3-supply = <&vcc_3v3>; -+}; -+ - &sdhci { - bus-width = <8>; - max-frequency = <200000000>;