diff --git a/package/qca/qca-nss-dp/Makefile b/package/qca/qca-nss-dp/Makefile index 56acc6ab2a11f1..ecf2f3d7560bb2 100644 --- a/package/qca/qca-nss-dp/Makefile +++ b/package/qca/qca-nss-dp/Makefile @@ -47,7 +47,8 @@ define Build/Compile +$(KERNEL_MAKE) $(PKG_JOBS) \ -C "$(LINUX_DIR)" \ M="$(PKG_BUILD_DIR)" \ - EXTRA_CFLAGS="$(EXTRA_CFLAGS)" SoC="$(CONFIG_TARGET_SUBTARGET)" \ + EXTRA_CFLAGS="$(EXTRA_CFLAGS)" \ + SoC="$(CONFIG_TARGET_SUBTARGET)" \ modules endef diff --git a/package/qca/qca-ssdk/Makefile b/package/qca/qca-ssdk/Makefile index 945c3eb23ed678..3d325de67b2b41 100644 --- a/package/qca/qca-ssdk/Makefile +++ b/package/qca/qca-ssdk/Makefile @@ -1,7 +1,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=qca-ssdk -PKG_RELEASE:=3 +PKG_RELEASE:=1 PKG_SOURCE_URL:=https://git.codelinaro.org/clo/qsdk/oss/lklm/qca-ssdk.git PKG_SOURCE_PROTO:=git @@ -47,10 +47,8 @@ MAKE_FLAGS+= \ SoC=$(CONFIG_TARGET_SUBTARGET) \ SHELL="$(BASH)" \ PTP_FEATURE=disable SWCONFIG_FEATURE=disable \ - IN_MP_PHY=FALSE \ ISISC_ENABLE=disable MHT_ENABLE=disable \ - IN_QCA803X_PHY=FALSE IN_QCA808X_PHY=FALSE \ - IN_MALIBU_PHY=FALSE \ + IN_MP_PHY=FALSE IN_QCA803X_PHY=FALSE \ $(LNX_CONFIG_OPTS) ifeq ($(CONFIG_TARGET_SUBTARGET), "ipq807x") diff --git a/package/qca/qca-ssdk/patches/0001-qca807x-add-a-LED-quirk-for-Xiaomi-AX9000.patch b/package/qca/qca-ssdk/patches/0001-qca807x-add-a-LED-quirk-for-Xiaomi-AX9000.patch new file mode 100644 index 00000000000000..589a90e03c9c72 --- /dev/null +++ b/package/qca/qca-ssdk/patches/0001-qca807x-add-a-LED-quirk-for-Xiaomi-AX9000.patch @@ -0,0 +1,64 @@ +From cdcafa28c857e4d04c9210feb54dc84e427061fe Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Tue, 11 Jan 2022 00:28:42 +0100 +Subject: [PATCH 1/2] qca807x: add a LED quirk for Xiaomi AX9000 + +Xiaomi AX9000 has a single LED for each of 4 gigabit ethernet ports that +are connected to QCA8075, and that LED is connected to the 100M LED pin. + +So, by default it will only work when in 10 or 100Mbit mode, this is quite +annoying and makes no sense(If they have connected it to the 1000Mbit LED +pin then it would have worked for 10/100 by default as well). + +So, to solve this add a check for system compatible as we cant parse if +from DTS in any other way and set the 100M LED to blink on 1000Base-T +as well. + +Signed-off-by: Robert Marko +--- + include/hsl/phy/malibu_phy.h | 2 ++ + src/hsl/phy/malibu_phy.c | 11 +++++++++++ + 2 files changed, 13 insertions(+) + +--- a/include/hsl/phy/malibu_phy.h ++++ b/include/hsl/phy/malibu_phy.h +@@ -96,6 +96,7 @@ extern "C" + #define MALIBU_DAC_CTRL_MASK 0x380 + #define MALIBU_DAC_CTRL_VALUE 0x280 + #define MALIBU_LED_1000_CTRL1_100_10_MASK 0x30 ++#define MALIBU_LED_100_CTRL1_1000_MASK 0x40 + + #define MALIBU_PHY_EEE_ADV_100M 0x0002 + #define MALIBU_PHY_EEE_ADV_1000M 0x0004 +@@ -120,6 +121,7 @@ extern "C" + #define MALIBU_PHY_MMD7_EGRESS_COUNTER_HIGH 0x802d + #define MALIBU_PHY_MMD7_EGRESS_COUNTER_LOW 0x802e + #define MALIBU_PHY_MMD7_EGRESS_ERROR_COUNTER 0x802f ++#define MALIBU_PHY_MMD7_LED_100_CTRL1 0x8074 + #define MALIBU_PHY_MMD7_LED_1000_CTRL1 0x8076 + + +--- a/src/hsl/phy/malibu_phy.c ++++ b/src/hsl/phy/malibu_phy.c +@@ -15,6 +15,8 @@ + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + ++#include ++ + #include "sw.h" + #include "fal_port_ctrl.h" + #include "hsl_api.h" +@@ -1955,6 +1957,12 @@ malibu_phy_hw_init(a_uint32_t dev_id, a_ + hsl_phy_modify_mmd(dev_id, phy_addr, A_FALSE, MALIBU_PHY_MMD7_NUM, + MALIBU_PHY_MMD7_LED_1000_CTRL1, MALIBU_LED_1000_CTRL1_100_10_MASK, + MALIBU_LED_1000_CTRL1_100_10_MASK); ++ if (of_machine_is_compatible("xiaomi,ax9000")) { ++ /* add 1000M link LED behavior for Xiaomi AX9000 */ ++ hsl_phy_modify_mmd(dev_id, phy_addr, A_FALSE, MALIBU_PHY_MMD7_NUM, ++ MALIBU_PHY_MMD7_LED_100_CTRL1, MALIBU_LED_100_CTRL1_1000_MASK, ++ MALIBU_LED_100_CTRL1_1000_MASK); ++ } + /*disable Extended next page*/ + hsl_phy_modify_mii(dev_id, phy_addr, MALIBU_AUTONEG_ADVERT, + MALIBU_EXTENDED_NEXT_PAGE_EN, 0); diff --git a/package/qca/qca-ssdk/patches/0002-qca807x-add-a-LED-quirk-for-Xiaomi-AX3600.patch b/package/qca/qca-ssdk/patches/0002-qca807x-add-a-LED-quirk-for-Xiaomi-AX3600.patch new file mode 100644 index 00000000000000..9ce77481d925dc --- /dev/null +++ b/package/qca/qca-ssdk/patches/0002-qca807x-add-a-LED-quirk-for-Xiaomi-AX3600.patch @@ -0,0 +1,29 @@ +From a750e569aeb4f7b454dbde18cd6d0f2bb1875dfa Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Wed, 26 Jan 2022 14:47:33 +0100 +Subject: [PATCH 2/2] qca807x: add a LED quirk for Xiaomi AX3600 + +AX3600 requires the same LED quirk so that PHY LED-s will blink even +once Linux resets the PHY. + +So, just check for its compatible. + +Signed-off-by: Robert Marko +--- + src/hsl/phy/malibu_phy.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +--- a/src/hsl/phy/malibu_phy.c ++++ b/src/hsl/phy/malibu_phy.c +@@ -1957,8 +1957,9 @@ malibu_phy_hw_init(a_uint32_t dev_id, a_ + hsl_phy_modify_mmd(dev_id, phy_addr, A_FALSE, MALIBU_PHY_MMD7_NUM, + MALIBU_PHY_MMD7_LED_1000_CTRL1, MALIBU_LED_1000_CTRL1_100_10_MASK, + MALIBU_LED_1000_CTRL1_100_10_MASK); +- if (of_machine_is_compatible("xiaomi,ax9000")) { +- /* add 1000M link LED behavior for Xiaomi AX9000 */ ++ /* add 1000M link LED behavior for Xiaomi boards */ ++ if (of_machine_is_compatible("xiaomi,ax9000") || ++ of_machine_is_compatible("xiaomi,ax3600")) { + hsl_phy_modify_mmd(dev_id, phy_addr, A_FALSE, MALIBU_PHY_MMD7_NUM, + MALIBU_PHY_MMD7_LED_100_CTRL1, MALIBU_LED_100_CTRL1_1000_MASK, + MALIBU_LED_100_CTRL1_1000_MASK); diff --git a/package/qca/qca-ssdk/patches/111-hsl_phy-split-MP_PHY-config.patch b/package/qca/qca-ssdk/patches/111-hsl_phy-split-MP_PHY-config.patch index 1c4f604e413e5c..93b0b389d6228c 100644 --- a/package/qca/qca-ssdk/patches/111-hsl_phy-split-MP_PHY-config.patch +++ b/package/qca/qca-ssdk/patches/111-hsl_phy-split-MP_PHY-config.patch @@ -1,5 +1,3 @@ -diff --git a/config b/config -index 99d99dff..1f74e4f8 100644 --- a/config +++ b/config @@ -299,6 +299,7 @@ else ifeq (DESS, $(CHIP_TYPE)) @@ -10,8 +8,6 @@ index 99d99dff..1f74e4f8 100644 IN_SFP_PHY=TRUE IN_SFP=TRUE else ifeq (APPE, $(CHIP_TYPE)) -diff --git a/make/linux_opt.mk b/make/linux_opt.mk -index 6936b754..66b08ef5 100644 --- a/make/linux_opt.mk +++ b/make/linux_opt.mk @@ -183,6 +183,11 @@ endif @@ -26,8 +22,6 @@ index 6936b754..66b08ef5 100644 ifeq (TRUE, $(IN_SFP_PHY)) MODULE_CFLAG += -DIN_SFP_PHY endif -diff --git a/src/adpt/mp/adpt_mp_portctrl.c b/src/adpt/mp/adpt_mp_portctrl.c -index 2c983fff..db60fc72 100644 --- a/src/adpt/mp/adpt_mp_portctrl.c +++ b/src/adpt/mp/adpt_mp_portctrl.c @@ -92,12 +92,15 @@ static sw_error_t @@ -46,7 +40,7 @@ index 2c983fff..db60fc72 100644 /*internal gephy reset*/ SW_RTN_ON_NULL (phy_drv = hsl_phy_api_ops_get(dev_id, port_id)); -@@ -107,6 +110,7 @@ adpt_mp_port_reset_set(a_uint32_t dev_id, a_uint32_t port_id) +@@ -107,6 +110,7 @@ adpt_mp_port_reset_set(a_uint32_t dev_id SW_RTN_ON_ERROR (rv); rv = phy_drv->phy_function_reset(dev_id, phy_addr, PHY_FIFO_RESET); SW_RTN_ON_ERROR (rv); @@ -54,8 +48,6 @@ index 2c983fff..db60fc72 100644 } else if (port_id == SSDK_PHYSICAL_PORT2) { rv = adpt_mp_uniphy_adapter_port_reset(dev_id, port_id); } else { -diff --git a/src/hsl/phy/Makefile b/src/hsl/phy/Makefile -index 68d0679f..0eae9377 100755 --- a/src/hsl/phy/Makefile +++ b/src/hsl/phy/Makefile @@ -23,7 +23,7 @@ ifeq (ISIS, $(CHIP_TYPE)) @@ -80,8 +72,6 @@ index 68d0679f..0eae9377 100755 endif ifeq (NONHK_CHIP, $(CHIP_TYPE)) -diff --git a/src/hsl/phy/hsl_phy.c b/src/hsl/phy/hsl_phy.c -index f2cf90e2..efab2343 100644 --- a/src/hsl/phy/hsl_phy.c +++ b/src/hsl/phy/hsl_phy.c @@ -28,7 +28,7 @@ @@ -93,7 +83,7 @@ index f2cf90e2..efab2343 100644 #include "mpge_phy.h" #endif #ifdef IN_MALIBU_PHY -@@ -94,7 +94,7 @@ phy_driver_instance_t ssdk_phy_driver[] = +@@ -94,7 +94,7 @@ phy_driver_instance_t ssdk_phy_driver[] #else {SFP_PHY_CHIP, {0}, NULL, NULL, NULL}, #endif diff --git a/package/qca/qca-ssdk/patches/112-init-MP-allow-to-ignore-reset-controlls.patch b/package/qca/qca-ssdk/patches/112-init-MP-allow-to-ignore-reset-controlls.patch index 8a0b1553680628..a40094c840d4ba 100644 --- a/package/qca/qca-ssdk/patches/112-init-MP-allow-to-ignore-reset-controlls.patch +++ b/package/qca/qca-ssdk/patches/112-init-MP-allow-to-ignore-reset-controlls.patch @@ -1,5 +1,3 @@ -diff --git a/src/init/ssdk_clk.c b/src/init/ssdk_clk.c -index 71e59452..bc244c6e 100644 --- a/src/init/ssdk_clk.c +++ b/src/init/ssdk_clk.c @@ -1282,10 +1282,8 @@ ssdk_mp_reset_init(void) diff --git a/package/qca/qca-ssdk/patches/121-MP-fix-build-issues.patch b/package/qca/qca-ssdk/patches/121-MP-fix-build-issues.patch index d1edde5f50ea68..bfa1be75b91cd9 100644 --- a/package/qca/qca-ssdk/patches/121-MP-fix-build-issues.patch +++ b/package/qca/qca-ssdk/patches/121-MP-fix-build-issues.patch @@ -1,8 +1,6 @@ -diff --git a/config b/config -index 1f74e4f8..58d67648 100644 --- a/config +++ b/config -@@ -374,6 +374,7 @@ ifneq (, $(filter MPPE APPE HPPE CPPE ALL_CHIP, $(CHIP_TYPE))) +@@ -374,6 +374,7 @@ ifneq (, $(filter MPPE APPE HPPE CPPE AL endif ifneq (, $(filter MP, $(CHIP_TYPE))) @@ -46,11 +44,9 @@ index 1f74e4f8..58d67648 100644 IN_CTRLPKT=TRUE endif -diff --git a/src/adpt/mp/adpt_mp_portctrl.c b/src/adpt/mp/adpt_mp_portctrl.c -index db60fc72..c230e214 100644 --- a/src/adpt/mp/adpt_mp_portctrl.c +++ b/src/adpt/mp/adpt_mp_portctrl.c -@@ -45,7 +45,8 @@ _adpt_mp_gcc_mac_clock_set(a_uint32_t dev_id, +@@ -45,7 +45,8 @@ _adpt_mp_gcc_mac_clock_set(a_uint32_t de static a_bool_t _adpt_mp_port_phy_connected (a_uint32_t dev_id, fal_port_t port_id) { diff --git a/package/qca/qca-ssdk/patches/122-init-replace-ioremap_nocache-with-ioremap.patch b/package/qca/qca-ssdk/patches/122-init-replace-ioremap_nocache-with-ioremap.patch index 97b44544ec3547..19a40eb543803e 100644 --- a/package/qca/qca-ssdk/patches/122-init-replace-ioremap_nocache-with-ioremap.patch +++ b/package/qca/qca-ssdk/patches/122-init-replace-ioremap_nocache-with-ioremap.patch @@ -1,8 +1,6 @@ -diff --git a/src/init/ssdk_clk.c b/src/init/ssdk_clk.c -index bc244c6e..dc45691e 100644 --- a/src/init/ssdk_clk.c +++ b/src/init/ssdk_clk.c -@@ -1183,7 +1183,7 @@ ssdk_mp_tcsr_get(a_uint32_t tcsr_offset, a_uint32_t *tcsr_val) +@@ -1183,7 +1183,7 @@ ssdk_mp_tcsr_get(a_uint32_t tcsr_offset, { void __iomem *tcsr_base = NULL; @@ -11,7 +9,7 @@ index bc244c6e..dc45691e 100644 if (!tcsr_base) { SSDK_ERROR("Failed to map tcsr eth address!\n"); -@@ -1200,7 +1200,7 @@ ssdk_mp_tcsr_set(a_uint32_t tcsr_offset, a_uint32_t tcsr_val) +@@ -1200,7 +1200,7 @@ ssdk_mp_tcsr_set(a_uint32_t tcsr_offset, { void __iomem *tcsr_base = NULL; @@ -29,7 +27,7 @@ index bc244c6e..dc45691e 100644 if (!pll_lock) { SSDK_ERROR("Failed to map CMN PLL LOCK register!\n"); return A_FALSE; -@@ -1303,7 +1303,7 @@ static void ssdk_cmnblk_pll_src_set(enum cmnblk_pll_src_type pll_source) +@@ -1303,7 +1303,7 @@ static void ssdk_cmnblk_pll_src_set(enum void __iomem *cmn_pll_src_base = NULL; a_uint32_t reg_val; diff --git a/package/qca/qca-ssdk/patches/200-allow-parallel-build.patch b/package/qca/qca-ssdk/patches/200-allow-parallel-build.patch index 2a3735a7361f4f..1e85ad102c1e36 100644 --- a/package/qca/qca-ssdk/patches/200-allow-parallel-build.patch +++ b/package/qca/qca-ssdk/patches/200-allow-parallel-build.patch @@ -40,7 +40,7 @@ kslib_c: --- a/make/linux_opt.mk +++ b/make/linux_opt.mk -@@ -782,6 +782,6 @@ LOCAL_CFLAGS += $(CPU_CFLAG) -D"KBUILD_M +@@ -787,6 +787,6 @@ LOCAL_CFLAGS += $(CPU_CFLAG) -D"KBUILD_M #################################################################### # cflags for LNX Modules-Style Makefile ####################################################################