diff --git a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3328-dram-dmc.dtsi b/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3328-dram-dmc.dtsi new file mode 100644 index 00000000000000..a9e599f64baf4b --- /dev/null +++ b/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3328-dram-dmc.dtsi @@ -0,0 +1,73 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. + */ + +#include "rk3328-dram-default-timing.dtsi" + +/ { + dmc: dmc { + compatible = "rockchip,rk3328-dmc"; + devfreq-events = <&dfi>; + center-supply = <&vdd_log>; + clocks = <&cru SCLK_DDRCLK>; + clock-names = "dmc_clk"; + operating-points-v2 = <&dmc_opp_table>; + ddr_timing = <&ddr_timing>; + upthreshold = <40>; + downdifferential = <20>; + auto-min-freq = <786000>; + auto-freq-en = <0>; + #cooling-cells = <2>; + + ddr_power_model: ddr_power_model { + compatible = "ddr_power_model"; + dynamic-power-coefficient = <120>; + static-power-coefficient = <200>; + ts = <32000 4700 (-80) 2>; + thermal-zone = "soc-thermal"; + }; + }; + + dmc_opp_table: dmc-opp-table { + compatible = "operating-points-v2"; + + rockchip,leakage-voltage-sel = < + 1 10 0 + 11 254 1 + >; + nvmem-cells = <&logic_leakage>; + nvmem-cell-names = "ddr_leakage"; + + opp-786000000 { + opp-hz = /bits/ 64 <786000000>; + opp-microvolt = <1075000>; + opp-microvolt-L0 = <1075000>; + opp-microvolt-L1 = <1050000>; + }; + opp-798000000 { + opp-hz = /bits/ 64 <798000000>; + opp-microvolt = <1075000>; + opp-microvolt-L0 = <1075000>; + opp-microvolt-L1 = <1050000>; + }; + opp-840000000 { + opp-hz = /bits/ 64 <840000000>; + opp-microvolt = <1075000>; + opp-microvolt-L0 = <1075000>; + opp-microvolt-L1 = <1050000>; + }; + opp-924000000 { + opp-hz = /bits/ 64 <924000000>; + opp-microvolt = <1100000>; + opp-microvolt-L0 = <1100000>; + opp-microvolt-L1 = <1075000>; + }; + opp-1056000000 { + opp-hz = /bits/ 64 <1056000000>; + opp-microvolt = <1175000>; + opp-microvolt-L0 = <1175000>; + opp-microvolt-L1 = <1150000>; + }; + }; +}; diff --git a/target/linux/rockchip/patches-6.1/202-rockchip-rk3328-Add-support-for-OrangePi-R1-Plus.patch b/target/linux/rockchip/patches-6.1/202-rockchip-rk3328-Add-support-for-OrangePi-R1-Plus.patch index 894e72d6fa96a0..258146a9a05209 100644 --- a/target/linux/rockchip/patches-6.1/202-rockchip-rk3328-Add-support-for-OrangePi-R1-Plus.patch +++ b/target/linux/rockchip/patches-6.1/202-rockchip-rk3328-Add-support-for-OrangePi-R1-Plus.patch @@ -10,14 +10,13 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-roc-cc.dtb --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts -@@ -0,0 +1,440 @@ +@@ -0,0 +1,370 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include +#include -+#include "rk3328-dram-default-timing.dtsi" +#include "rk3328.dtsi" + +/ { @@ -96,71 +95,6 @@ + regulator-boot-on; + vin-supply = <&vcc_sys>; + }; -+ -+ dmc: dmc { -+ compatible = "rockchip,rk3328-dmc"; -+ devfreq-events = <&dfi>; -+ center-supply = <&vdd_log>; -+ clocks = <&cru SCLK_DDRCLK>; -+ clock-names = "dmc_clk"; -+ operating-points-v2 = <&dmc_opp_table>; -+ ddr_timing = <&ddr_timing>; -+ upthreshold = <40>; -+ downdifferential = <20>; -+ auto-min-freq = <786000>; -+ auto-freq-en = <0>; -+ #cooling-cells = <2>; -+ -+ ddr_power_model: ddr_power_model { -+ compatible = "ddr_power_model"; -+ dynamic-power-coefficient = <120>; -+ static-power-coefficient = <200>; -+ ts = <32000 4700 (-80) 2>; -+ thermal-zone = "soc-thermal"; -+ }; -+ }; -+ -+ dmc_opp_table: dmc-opp-table { -+ compatible = "operating-points-v2"; -+ -+ rockchip,leakage-voltage-sel = < -+ 1 10 0 -+ 11 254 1 -+ >; -+ nvmem-cells = <&logic_leakage>; -+ nvmem-cell-names = "ddr_leakage"; -+ -+ opp-786000000 { -+ opp-hz = /bits/ 64 <786000000>; -+ opp-microvolt = <1075000>; -+ opp-microvolt-L0 = <1075000>; -+ opp-microvolt-L1 = <1050000>; -+ }; -+ opp-798000000 { -+ opp-hz = /bits/ 64 <798000000>; -+ opp-microvolt = <1075000>; -+ opp-microvolt-L0 = <1075000>; -+ opp-microvolt-L1 = <1050000>; -+ }; -+ opp-840000000 { -+ opp-hz = /bits/ 64 <840000000>; -+ opp-microvolt = <1075000>; -+ opp-microvolt-L0 = <1075000>; -+ opp-microvolt-L1 = <1050000>; -+ }; -+ opp-924000000 { -+ opp-hz = /bits/ 64 <924000000>; -+ opp-microvolt = <1100000>; -+ opp-microvolt-L0 = <1100000>; -+ opp-microvolt-L1 = <1075000>; -+ }; -+ opp-1056000000 { -+ opp-hz = /bits/ 64 <1056000000>; -+ opp-microvolt = <1175000>; -+ opp-microvolt-L0 = <1175000>; -+ opp-microvolt-L1 = <1150000>; -+ }; -+ }; +}; + +&cpu0 { @@ -179,10 +113,6 @@ + cpu-supply = <&vdd_arm>; +}; + -+&dfi { -+ status = "okay"; -+}; -+ +&display_subsystem { + status = "disabled"; +}; diff --git a/target/linux/rockchip/patches-6.1/806-arm64-dts-rockchip-rk3328-add-dfi-node.patch b/target/linux/rockchip/patches-6.1/806-arm64-dts-rockchip-rk3328-add-dfi-node.patch index 72aa5de036ff69..89e327e0dfd68f 100644 --- a/target/linux/rockchip/patches-6.1/806-arm64-dts-rockchip-rk3328-add-dfi-node.patch +++ b/target/linux/rockchip/patches-6.1/806-arm64-dts-rockchip-rk3328-add-dfi-node.patch @@ -4,8 +4,6 @@ Date: Tue, 19 Nov 2019 14:21:51 +0800 Subject: [PATCH] arm64: dts: rockchip: rk3328: add dfi node Signed-off-by: hmz007 -[adjusted commit title] -Signed-off-by: Tianling Shen --- arch/arm64/boot/dts/rockchip/rk3328.dtsi | 7 +++++++ diff --git a/target/linux/rockchip/patches-6.1/807-arm64-dts-nanopi-r2s-add-rk3328-dmc-relate-node.patch b/target/linux/rockchip/patches-6.1/807-arm64-dts-nanopi-r2s-add-rk3328-dmc-relate-node.patch deleted file mode 100644 index 981bc70fbf5b95..00000000000000 --- a/target/linux/rockchip/patches-6.1/807-arm64-dts-nanopi-r2s-add-rk3328-dmc-relate-node.patch +++ /dev/null @@ -1,126 +0,0 @@ -From f9ae6e992d3d9e80357fee7d65ba0fe2dd37ae1f Mon Sep 17 00:00:00 2001 -From: hmz007 -Date: Tue, 19 Nov 2019 14:21:51 +0800 -Subject: [PATCH] arm64: dts: nanopi-r2: add rk3328-dmc relate node - -Signed-off-by: hmz007 ---- - .../rockchip/rk3328-dram-default-timing.dtsi | 311 ++++++++++++++++++ - .../dts/rockchip/rk3328-nanopi-r2-common.dtsi | 85 ++++- - include/dt-bindings/clock/rockchip-ddr.h | 63 ++++ - include/dt-bindings/memory/rk3328-dram.h | 159 +++++++++ - 4 files changed, 617 insertions(+), 1 deletion(-) - create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-dram-default-timing.dtsi - create mode 100644 include/dt-bindings/clock/rockchip-ddr.h - create mode 100644 include/dt-bindings/memory/rk3328-dram.h - ---- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -@@ -7,6 +7,7 @@ - - #include - #include -+#include "rk3328-dram-default-timing.dtsi" - #include "rk3328.dtsi" - - / { -@@ -121,6 +122,72 @@ - regulator-boot-on; - vin-supply = <&vdd_5v>; - }; -+ -+ dmc: dmc { -+ compatible = "rockchip,rk3328-dmc"; -+ devfreq-events = <&dfi>; -+ center-supply = <&vdd_log>; -+ clocks = <&cru SCLK_DDRCLK>; -+ clock-names = "dmc_clk"; -+ operating-points-v2 = <&dmc_opp_table>; -+ ddr_timing = <&ddr_timing>; -+ upthreshold = <40>; -+ downdifferential = <20>; -+ auto-min-freq = <786000>; -+ auto-freq-en = <0>; -+ #cooling-cells = <2>; -+ status = "okay"; -+ -+ ddr_power_model: ddr_power_model { -+ compatible = "ddr_power_model"; -+ dynamic-power-coefficient = <120>; -+ static-power-coefficient = <200>; -+ ts = <32000 4700 (-80) 2>; -+ thermal-zone = "soc-thermal"; -+ }; -+ }; -+ -+ dmc_opp_table: dmc-opp-table { -+ compatible = "operating-points-v2"; -+ -+ rockchip,leakage-voltage-sel = < -+ 1 10 0 -+ 11 254 1 -+ >; -+ nvmem-cells = <&logic_leakage>; -+ nvmem-cell-names = "ddr_leakage"; -+ -+ opp-786000000 { -+ opp-hz = /bits/ 64 <786000000>; -+ opp-microvolt = <1075000>; -+ opp-microvolt-L0 = <1075000>; -+ opp-microvolt-L1 = <1050000>; -+ }; -+ opp-798000000 { -+ opp-hz = /bits/ 64 <798000000>; -+ opp-microvolt = <1075000>; -+ opp-microvolt-L0 = <1075000>; -+ opp-microvolt-L1 = <1050000>; -+ }; -+ opp-840000000 { -+ opp-hz = /bits/ 64 <840000000>; -+ opp-microvolt = <1075000>; -+ opp-microvolt-L0 = <1075000>; -+ opp-microvolt-L1 = <1050000>; -+ }; -+ opp-924000000 { -+ opp-hz = /bits/ 64 <924000000>; -+ opp-microvolt = <1100000>; -+ opp-microvolt-L0 = <1100000>; -+ opp-microvolt-L1 = <1075000>; -+ }; -+ opp-1056000000 { -+ opp-hz = /bits/ 64 <1056000000>; -+ opp-microvolt = <1175000>; -+ opp-microvolt-L0 = <1175000>; -+ opp-microvolt-L1 = <1150000>; -+ }; -+ }; - }; - - &cpu0 { -@@ -139,6 +206,10 @@ - cpu-supply = <&vdd_arm>; - }; - -+&dfi { -+ status = "okay"; -+}; -+ - &display_subsystem { - status = "disabled"; - }; -@@ -206,6 +277,7 @@ - regulator-name = "vdd_log"; - regulator-always-on; - regulator-boot-on; -+ regulator-init-microvolt = <1075000>; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1450000>; - regulator-ramp-delay = <12500>; -@@ -220,6 +292,7 @@ - regulator-name = "vdd_arm"; - regulator-always-on; - regulator-boot-on; -+ regulator-init-microvolt = <1225000>; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1450000>; - regulator-ramp-delay = <12500>; diff --git a/target/linux/rockchip/patches-6.1/807-arm64-dts-rockchip-rk3328-devices-add-dmc.patch b/target/linux/rockchip/patches-6.1/807-arm64-dts-rockchip-rk3328-devices-add-dmc.patch new file mode 100644 index 00000000000000..24286a38d25884 --- /dev/null +++ b/target/linux/rockchip/patches-6.1/807-arm64-dts-rockchip-rk3328-devices-add-dmc.patch @@ -0,0 +1,42 @@ +--- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts +@@ -8,6 +8,7 @@ + #include + #include + #include "rk3328.dtsi" ++#include "rk3328-dram-dmc.dtsi" + + / { + model = "FriendlyElec NanoPi R2S"; +@@ -139,6 +140,10 @@ + cpu-supply = <&vdd_arm>; + }; + ++&dfi { ++ status = "okay"; ++}; ++ + &display_subsystem { + status = "disabled"; + }; +--- a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts +@@ -5,6 +5,7 @@ + #include + #include + #include "rk3328.dtsi" ++#include "rk3328-dram-dmc.dtsi" + + / { + model = "Xunlong Orange Pi R1 Plus"; +@@ -100,6 +101,10 @@ + cpu-supply = <&vdd_arm>; + }; + ++&dfi { ++ status = "okay"; ++}; ++ + &display_subsystem { + status = "disabled"; + }; diff --git a/target/linux/rockchip/patches-6.6/806-arm64-dts-rockchip-rk3328-add-dfi-node.patch b/target/linux/rockchip/patches-6.6/806-arm64-dts-rockchip-rk3328-add-dfi-node.patch index 831c09da571909..ca567660dd497c 100644 --- a/target/linux/rockchip/patches-6.6/806-arm64-dts-rockchip-rk3328-add-dfi-node.patch +++ b/target/linux/rockchip/patches-6.6/806-arm64-dts-rockchip-rk3328-add-dfi-node.patch @@ -4,8 +4,6 @@ Date: Tue, 19 Nov 2019 14:21:51 +0800 Subject: [PATCH] arm64: dts: rockchip: rk3328: add dfi node Signed-off-by: hmz007 -[adjusted commit title] -Signed-off-by: Tianling Shen --- arch/arm64/boot/dts/rockchip/rk3328.dtsi | 7 +++++++ diff --git a/target/linux/rockchip/patches-6.6/807-arm64-dts-nanopi-r2s-add-rk3328-dmc-relate-node.patch b/target/linux/rockchip/patches-6.6/807-arm64-dts-nanopi-r2s-add-rk3328-dmc-relate-node.patch deleted file mode 100644 index 4f9fea3022a0ba..00000000000000 --- a/target/linux/rockchip/patches-6.6/807-arm64-dts-nanopi-r2s-add-rk3328-dmc-relate-node.patch +++ /dev/null @@ -1,126 +0,0 @@ -From f9ae6e992d3d9e80357fee7d65ba0fe2dd37ae1f Mon Sep 17 00:00:00 2001 -From: hmz007 -Date: Tue, 19 Nov 2019 14:21:51 +0800 -Subject: [PATCH] arm64: dts: nanopi-r2: add rk3328-dmc relate node - -Signed-off-by: hmz007 ---- - .../rockchip/rk3328-dram-default-timing.dtsi | 311 ++++++++++++++++++ - .../dts/rockchip/rk3328-nanopi-r2-common.dtsi | 85 ++++- - include/dt-bindings/clock/rockchip-ddr.h | 63 ++++ - include/dt-bindings/memory/rk3328-dram.h | 159 +++++++++ - 4 files changed, 617 insertions(+), 1 deletion(-) - create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-dram-default-timing.dtsi - create mode 100644 include/dt-bindings/clock/rockchip-ddr.h - create mode 100644 include/dt-bindings/memory/rk3328-dram.h - ---- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -@@ -8,6 +8,7 @@ - #include - #include - #include -+#include "rk3328-dram-default-timing.dtsi" - #include "rk3328.dtsi" - - / { -@@ -123,6 +124,72 @@ - regulator-boot-on; - vin-supply = <&vdd_5v>; - }; -+ -+ dmc: dmc { -+ compatible = "rockchip,rk3328-dmc"; -+ devfreq-events = <&dfi>; -+ center-supply = <&vdd_log>; -+ clocks = <&cru SCLK_DDRCLK>; -+ clock-names = "dmc_clk"; -+ operating-points-v2 = <&dmc_opp_table>; -+ ddr_timing = <&ddr_timing>; -+ upthreshold = <40>; -+ downdifferential = <20>; -+ auto-min-freq = <786000>; -+ auto-freq-en = <0>; -+ #cooling-cells = <2>; -+ status = "okay"; -+ -+ ddr_power_model: ddr_power_model { -+ compatible = "ddr_power_model"; -+ dynamic-power-coefficient = <120>; -+ static-power-coefficient = <200>; -+ ts = <32000 4700 (-80) 2>; -+ thermal-zone = "soc-thermal"; -+ }; -+ }; -+ -+ dmc_opp_table: dmc-opp-table { -+ compatible = "operating-points-v2"; -+ -+ rockchip,leakage-voltage-sel = < -+ 1 10 0 -+ 11 254 1 -+ >; -+ nvmem-cells = <&logic_leakage>; -+ nvmem-cell-names = "ddr_leakage"; -+ -+ opp-786000000 { -+ opp-hz = /bits/ 64 <786000000>; -+ opp-microvolt = <1075000>; -+ opp-microvolt-L0 = <1075000>; -+ opp-microvolt-L1 = <1050000>; -+ }; -+ opp-798000000 { -+ opp-hz = /bits/ 64 <798000000>; -+ opp-microvolt = <1075000>; -+ opp-microvolt-L0 = <1075000>; -+ opp-microvolt-L1 = <1050000>; -+ }; -+ opp-840000000 { -+ opp-hz = /bits/ 64 <840000000>; -+ opp-microvolt = <1075000>; -+ opp-microvolt-L0 = <1075000>; -+ opp-microvolt-L1 = <1050000>; -+ }; -+ opp-924000000 { -+ opp-hz = /bits/ 64 <924000000>; -+ opp-microvolt = <1100000>; -+ opp-microvolt-L0 = <1100000>; -+ opp-microvolt-L1 = <1075000>; -+ }; -+ opp-1056000000 { -+ opp-hz = /bits/ 64 <1056000000>; -+ opp-microvolt = <1175000>; -+ opp-microvolt-L0 = <1175000>; -+ opp-microvolt-L1 = <1150000>; -+ }; -+ }; - }; - - &cpu0 { -@@ -141,6 +208,10 @@ - cpu-supply = <&vdd_arm>; - }; - -+&dfi { -+ status = "okay"; -+}; -+ - &display_subsystem { - status = "disabled"; - }; -@@ -208,6 +279,7 @@ - regulator-name = "vdd_log"; - regulator-always-on; - regulator-boot-on; -+ regulator-init-microvolt = <1075000>; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1450000>; - regulator-ramp-delay = <12500>; -@@ -222,6 +294,7 @@ - regulator-name = "vdd_arm"; - regulator-always-on; - regulator-boot-on; -+ regulator-init-microvolt = <1225000>; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1450000>; - regulator-ramp-delay = <12500>; diff --git a/target/linux/rockchip/patches-6.6/807-arm64-dts-rockchip-rk3328-devices-add-dmc.patch b/target/linux/rockchip/patches-6.6/807-arm64-dts-rockchip-rk3328-devices-add-dmc.patch new file mode 100644 index 00000000000000..a4cb01ed8c168a --- /dev/null +++ b/target/linux/rockchip/patches-6.6/807-arm64-dts-rockchip-rk3328-devices-add-dmc.patch @@ -0,0 +1,58 @@ +--- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts +@@ -9,6 +9,7 @@ + #include + #include + #include "rk3328.dtsi" ++#include "rk3328-dram-dmc.dtsi" + + / { + model = "FriendlyElec NanoPi R2S"; +@@ -141,6 +142,10 @@ + cpu-supply = <&vdd_arm>; + }; + ++&dfi { ++ status = "okay"; ++}; ++ + &display_subsystem { + status = "disabled"; + }; +--- a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts +@@ -9,6 +9,7 @@ + #include + #include + #include "rk3328.dtsi" ++#include "rk3328-dram-dmc.dtsi" + + / { + model = "Xunlong Orange Pi R1 Plus"; +@@ -107,6 +108,10 @@ + cpu-supply = <&vdd_arm>; + }; + ++&dfi { ++ status = "okay"; ++}; ++ + &display_subsystem { + status = "disabled"; + }; +--- a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts +@@ -14,6 +14,13 @@ + compatible = "xunlong,orangepi-r1-plus-lts", "rockchip,rk3328"; + }; + ++&dmc_opp_table { ++ /delete-node/ opp-798000000; ++ /delete-node/ opp-840000000; ++ /delete-node/ opp-924000000; ++ /delete-node/ opp-1056000000; ++}; ++ + &gmac2io { + phy-handle = <&yt8531c>; + tx_delay = <0x19>; diff --git a/target/linux/rockchip/patches-6.6/808-arm64-dts-orangepi-r1-plus-add-dmc-relate-node.patch b/target/linux/rockchip/patches-6.6/808-arm64-dts-orangepi-r1-plus-add-dmc-relate-node.patch deleted file mode 100644 index 7f8f22deccc361..00000000000000 --- a/target/linux/rockchip/patches-6.6/808-arm64-dts-orangepi-r1-plus-add-dmc-relate-node.patch +++ /dev/null @@ -1,98 +0,0 @@ ---- a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts -@@ -8,6 +8,7 @@ - - #include - #include -+#include "rk3328-dram-default-timing.dtsi" - #include "rk3328.dtsi" - - / { -@@ -89,6 +90,71 @@ - regulator-boot-on; - vin-supply = <&vcc_sys>; - }; -+ -+ dmc: dmc { -+ compatible = "rockchip,rk3328-dmc"; -+ devfreq-events = <&dfi>; -+ center-supply = <&vdd_log>; -+ clocks = <&cru SCLK_DDRCLK>; -+ clock-names = "dmc_clk"; -+ operating-points-v2 = <&dmc_opp_table>; -+ ddr_timing = <&ddr_timing>; -+ upthreshold = <40>; -+ downdifferential = <20>; -+ auto-min-freq = <786000>; -+ auto-freq-en = <0>; -+ #cooling-cells = <2>; -+ -+ ddr_power_model: ddr_power_model { -+ compatible = "ddr_power_model"; -+ dynamic-power-coefficient = <120>; -+ static-power-coefficient = <200>; -+ ts = <32000 4700 (-80) 2>; -+ thermal-zone = "soc-thermal"; -+ }; -+ }; -+ -+ dmc_opp_table: dmc-opp-table { -+ compatible = "operating-points-v2"; -+ -+ rockchip,leakage-voltage-sel = < -+ 1 10 0 -+ 11 254 1 -+ >; -+ nvmem-cells = <&logic_leakage>; -+ nvmem-cell-names = "ddr_leakage"; -+ -+ opp-786000000 { -+ opp-hz = /bits/ 64 <786000000>; -+ opp-microvolt = <1075000>; -+ opp-microvolt-L0 = <1075000>; -+ opp-microvolt-L1 = <1050000>; -+ }; -+ opp-798000000 { -+ opp-hz = /bits/ 64 <798000000>; -+ opp-microvolt = <1075000>; -+ opp-microvolt-L0 = <1075000>; -+ opp-microvolt-L1 = <1050000>; -+ }; -+ opp-840000000 { -+ opp-hz = /bits/ 64 <840000000>; -+ opp-microvolt = <1075000>; -+ opp-microvolt-L0 = <1075000>; -+ opp-microvolt-L1 = <1050000>; -+ }; -+ opp-924000000 { -+ opp-hz = /bits/ 64 <924000000>; -+ opp-microvolt = <1100000>; -+ opp-microvolt-L0 = <1100000>; -+ opp-microvolt-L1 = <1075000>; -+ }; -+ opp-1056000000 { -+ opp-hz = /bits/ 64 <1056000000>; -+ opp-microvolt = <1175000>; -+ opp-microvolt-L0 = <1175000>; -+ opp-microvolt-L1 = <1150000>; -+ }; -+ }; - }; - - &cpu0 { ---- a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts -@@ -14,6 +14,13 @@ - compatible = "xunlong,orangepi-r1-plus-lts", "rockchip,rk3328"; - }; - -+&dmc_opp_table { -+ /delete-node/ opp-798000000; -+ /delete-node/ opp-840000000; -+ /delete-node/ opp-924000000; -+ /delete-node/ opp-1056000000; -+}; -+ - &gmac2io { - phy-handle = <&yt8531c>; - tx_delay = <0x19>;