From 62be56bd9b1f7c3bc9ff20bf18fc0925a7e714ba Mon Sep 17 00:00:00 2001 From: Akira Moroo Date: Sat, 9 Dec 2023 08:53:11 +0000 Subject: [PATCH] riscv64: Avoid F and V instruction generation As reported in issue #299, the latest RHF goes boot loop since `nightly-2023-06-07` Rust toolchain. This is because the recent Rust generates code that includes F and V extensions, which we need to enable these features on startup. This commit disables generation of these extensions as a workaround. Signed-off-by: Akira Moroo --- riscv64gcv-unknown-none-elf.json | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/riscv64gcv-unknown-none-elf.json b/riscv64gcv-unknown-none-elf.json index de0dabd5..48ad80d8 100644 --- a/riscv64gcv-unknown-none-elf.json +++ b/riscv64gcv-unknown-none-elf.json @@ -5,7 +5,7 @@ "data-layout": "e-m:e-p:64:64-i64:64-i128:128-n64-S128", "eh-frame-header": false, "emit-debug-gdb-scripts": false, - "features": "+m,+a,+f,+d,+c,+v", + "features": "+m,+a,-f,+d,+c,-v", "is-builtin": false, "linker": "rust-lld", "linker-flavor": "ld.lld",