From 573f46c0a82752c4bf6b0dd1adaaccdd29e0f401 Mon Sep 17 00:00:00 2001 From: Akira Moroo Date: Tue, 21 Mar 2023 17:48:34 +0900 Subject: [PATCH] pci: Handle overflow on 32-bit PCI BAR size calculation The firmware panics if the calculated 32-bit BAR size overflows on debug build. Signed-off-by: Akira Moroo --- src/pci.rs | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/pci.rs b/src/pci.rs index 5919e54b..4495bf99 100644 --- a/src/pci.rs +++ b/src/pci.rs @@ -302,7 +302,9 @@ impl PciDevice { self.bars[current_bar].address = u64::from(bar & 0xffff_fff0); self.write_u32(current_bar_offset, 0xffff_ffff); - let size = !(self.read_u32(current_bar_offset) & 0xffff_fff0) + 1; + let size = (!(self.read_u32(current_bar_offset) & 0xffff_fff0)) + .checked_add(1) + .unwrap_or(0); self.bars[current_bar].size = u64::from(size); self.write_u32(current_bar_offset, bar); }