Caliptra consists of IP and firmware for an integrated Root of Trust block.
Caliptra targets datacenter-class SoCs like CPUs, GPUs, DPUs, TPUs. It is the specification, silicon logic, ROM and firmware for implementing a Root of Trust for Measurement (RTM) block inside an SoC. A Caliptra integration provides the SoC with Identity, Measured Boot and Attestation capabilities.
Caliptra is a project originally incepted at the Open Compute Project (OCP). The major revisions of the Caliptra specifications are published at OCP. The evolving source code and documentation for Caliptra live in this repository within the CHIPS Alliance Project, a Series of LF Projects, LLC.
The Caliptra WorkGroup Technical Charter sets out the charter governing the Caliptra project and its marks.
- Main Caliptra specification 1.x
- Caliptra Core Hardware Specification
- Caliptra Core Hardware Integration Specification
- ROM 1.x
- FMC
- Runtime
- Main Caliptra specification 2.0 - Version 0.5
- Caliptra Subsystem Hardware Specification - Version 0.5
- Note: Hardware integration specs will be following the RTL Freezes & Releases timelines
- ROM 2.x - WIP
- FMC 2.x - WIP
- Runtime 2.x - WIP
- MCU Firmware and SDK specification - WIP
- Caliptra Software CI dashboard -- includes ROM
The Caliptra code base and documentation are split across five repositories:
| Repository | Areas of interest | Description |
|---|---|---|
| Primary repository | Issues, PRs, Security advisories | This repository, with admin boilerplate and docs |
| Adams Bridge RTL | Issues, PRs, Security advisories | The primary repository with Adams Bridge Post-Quantum Cryptography hardware accelerator |
| Caliptra RTL | Issues, PRs, Security advisories | The primary repository with immutable RTL |
| Caliptra Software 1.x | Issues, PRs, Security advisories | Caliptra software (ROM, FMC, runtime firmware), and libraries/tools needed to build and test |
| Caliptra Software 2.x | Issues, PRs, Security advisories | Caliptra software (ROM, FMC, runtime firmware), and libraries/tools needed to build and test |
| Caliptra DPE | Issues, PRs, Security advisories | An implementation of a TCG DICE Protection Environment profile |
| Caliptra U-Reg | Issues, PRs, Security advisories | General-purpose libraries and tools for manipulating MMIO registers from Rust |
| Caliptra Subsystem | Issues, PRs, Security advisories | Caliptra Subsystem including Manufacturer Control Unit (MCU) and peripherals |
| Caliptra MCU Software | Issues, PRs, Security advisories | Caliptra MCU Firmware and SDK and specification |
The GitHub config parameters for all of the branches are documented in a local file.
All these URLs redirect into the repositories above.
- repo.caliptra.io
- spec.caliptra.io
- sw.caliptra.io
- fw.caliptra.io
- hw.caliptra.io
- rtl.caliptra.io
- dpe.caliptra.io
- ureg.caliptra.io
- ireg[s].caliptra.io
- ereg[s].caliptra.io
For information on the Caliptra security policy, how to report a vulnerability, and published security advisories, refer to Caliptra security policy.
The Caliptra workgroup meets every Friday at 9am PT. Meeting invite and agenda are posted to the mailing list. The call invite is also reachable from the CHIPS Workgroups page.
A Slack channel is used for interactive discussions. Keep in mind development activity is focused on GitHub issues and Pull Request reviews, rarely on the Slack channel. If you have issues joining please contact the mailing list.
Please sign the CHIPS CLA (as an individual or your company if affiliated) before participating in these channels.
All code written for Caliptra and found in these repositories is licensed under the Apache Source License 2.0. You can find out more by reading our document on how to contribute.