threads: Addresses for atomic operations silently wrap instead of using an effective 33-bit index

[alexcrichton]

This module, for example:

(module
    (memory 1)

    (func
        i32.const 0xffff_fff0
        i32.atomic.load offset=16
        drop
    )
    (start 0)
)

should fail with a trap but succeeds:

$ cargo run -- --enable-threads foo.wat

[cfallin]

It appears that atomic loads handle their offset differently than others. In #2077 we introduced a new LoadNoOffset instruction class, and instead, the Wasm translator inserts a bare iadd_imm (with no overflow check): link.

@julian-seward1, do you recall why we didn't just take an offset on the atomic load/store ops like we do on regular ones? Was it in order to simplify the implementation or is there some other reason?

IMHO the right fix (assuming the above question doesn't reveal a blocking reason) is to harmonize atomic loads/stores with regular ones and use the same offset handling / overflow checking logic.