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Enable common device abstraction for 8bits/4bits #898
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Original file line number | Diff line number | Diff line change |
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from typing import Dict | ||
import torch | ||
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from bitsandbytes.backends.base import Backend | ||
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backends: Dict[str, Backend] = {} | ||
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. I wonder if There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Why should it be? There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Does it intend to avoid the usage of an There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. How does a user currently select a backend? Currently, only CUDA is supported, but should there be a function like I guess we would do this through the "device_setup" process. The question here is if we can automatically detect the device the user is running in all cases? I think the only exception is probably if a user has both an accelerated device and a CPU. I think having, for example, Apple silicon and a regular GPU will not really happen. Are there any other scenarios that we are missing here and we need to think about? I think for now, it looks fine, but I want to make sure we are not missing anything. In terms of usability, the best designs often come from early thought rather than later corrections. So it makes sense we think a bit about this. There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. @TimDettmers To your point, I wonder if IPEX can be combined with CUDA/ROCm in such a way where as you mention, it's not clear what the user will want. E.g. a situation where both It's also my understanding that Intel GPU support may be upstreamed: pytorch/pytorch#114842 There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. @jgong5 That's what's happening now in this PR 😁 There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Hey all, so Tim thinks that the backend should only be initialized once and therefore implemented as Singleton: It According to him, there's no use-case to exchange the backend at runtime. The only potential use-case might be that of having both a CPU and GPU backend at the same time, but from what Tim says, this is sth that we currently don't need yet and shouldn't worry about. Just forwarding his statement for the sake of furthering the discussion. There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. From an engineering standpoint, I disagree with implementing it as a singleton (a class you can ever only initialize once). Doing that is more complex, a little non-Pythonic, and the current implementation has the same end result: there's a backend object that's only created once, and it's plugged into place in the backends dict. There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more.
I feel the same - no obvious benefit of constraining us with a single device. May I know what's the concern with dispatching device backend from the backend dict with the device on the tensor args? Dispatching according to the tensor's device type is something PyTorch ATen is also doing. There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Would it not make sense to try to stay with the device of the source/destination tensors rather than select and initialize the device once as a singleton? If you have multiple GPUs for example and want to share the compute with them, wouldn't you want to do .to(some_device) then call BnB? |
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def register_backend(backend_name: str, backend_instance: Backend): | ||
backends[backend_name.lower()] = backend_instance |
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from abc import ABC, abstractmethod | ||
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Currently, the backend base contains too few functions or too many functions depending on the view. Currently, it does not provide abstractions for blockwise quantization, QLoRA-style double quantization, and 8-bit optimizers. On the other hand, This is definitely one thing that we need to discuss: what exact function do we abstract. We need to abstract everything that is needed by all devices and keep everything that is specific to CUDA in that particular backend. |
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from typing import Optional, Tuple | ||
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import torch | ||
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from bitsandbytes.utils import QuantState | ||
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class Backend(ABC): | ||
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. We cannot use an abstract base class here. This makes the interface too big to implement. We want people to be able to contribute sub-interfaces, for example, only implement the 4-bit functionality but not the 8-bit and 8-bit optimizer functionality. The intent of such a design it better captured by a base class that implements these functions with an I think the intend would be even clearer by having 4 backends: 4-bit, 8-bit, 8-bit optimizers, block-wise quantization. However, this will also introduce more bloat in terms of boilerplate and more classes. Not sure how to handle this and feedback would be appreciated. I think it might be better to have a single class and just highlight both as comments and in the documentation that not all functions need to be overridden for a solid contribution. There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. I see now that the methods already throw a NotImplementedError. I think this is good already. So just removing the ABC would make it possible to implement sub-interfaces. I think to make the sub-interfaces clearer it would be great to have a NotImplementedError that shows the set of functions that need to be implemented. For example, mm_dequant(...)
...
raise NotImplementedError("mm_dequant not implemented! \
This function is part of the 8-bit interface and it needs to be implemented along with: \
mm_dequant, igemmlt, extract_outliers, double_quant") There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. If it's okay to partially implement a backend, then sure, we can make it a concrete base class with NotImplementeds thrown around. There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Shouldn't partial implementations fall back to CPU? |
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"""Base class for devices backends that will implement their own 8bits and 4bits functions.""" | ||
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@abstractmethod | ||
def double_quant( | ||
self, | ||
A, | ||
col_stats=None, | ||
row_stats=None, | ||
out_col=None, | ||
out_row=None, | ||
threshold=0.0, | ||
): | ||
raise NotImplementedError | ||
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@abstractmethod | ||
def transform( | ||
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Only needed for CUDA. This will probably not be needed for any other device. See the discussion above. There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. This was somewhat touched upon #898 (comment) – this PR doesn't yet move all of the CUDA-specific things into place, but I think that's fine and we can clean it up in near-future work... |
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self, | ||
A, | ||
to_order, | ||
from_order="row", | ||
out=None, | ||
transpose=False, | ||
state=None, | ||
ld=None, | ||
): | ||
raise NotImplementedError | ||
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@abstractmethod | ||
def igemmlt(self, A, B, SA, SB, out=None, Sout=None, dtype=torch.int32): | ||
raise NotImplementedError | ||
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@abstractmethod | ||
def mm_dequant( | ||
self, | ||
A, | ||
quant_state, | ||
row_stats, | ||
col_stats, | ||
out=None, | ||
new_row_stats=None, | ||
new_col_stats=None, | ||
bias=None, | ||
): | ||
raise NotImplementedError | ||
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@abstractmethod | ||
def extract_outliers(self, A, SA, idx): | ||
raise NotImplementedError | ||
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@abstractmethod | ||
def quantize_4bit( | ||
self, | ||
A: torch.Tensor, | ||
absmax: Optional[torch.Tensor] = None, | ||
out: Optional[torch.Tensor] = None, | ||
blocksize=64, | ||
compress_statistics=False, | ||
quant_type="fp4", | ||
quant_storage=torch.uint8, | ||
) -> Tuple[torch.Tensor, QuantState]: | ||
""" | ||
Quantize tensor A in blocks of 4-bit values. | ||
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Quantizes tensor A by dividing it into blocks which are independently quantized to FP4. | ||
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Parameters | ||
---------- | ||
A : torch.Tensor | ||
The input tensor. | ||
absmax : torch.Tensor | ||
The absmax values. | ||
out : torch.Tensor | ||
The output tensor. | ||
blocksize : int | ||
The blocksize used in quantization. | ||
quant_type : str | ||
The 4-bit quantization data type {fp4, nf4} | ||
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Returns | ||
------- | ||
torch.Tensor: | ||
Tensor with packed 4-bit values. | ||
tuple(torch.Tensor, torch.Size, torch.dtype, int): | ||
The quantization state to undo the quantization. | ||
""" | ||
raise NotImplementedError | ||
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@abstractmethod | ||
def dequantize_4bit( | ||
self, | ||
A: torch.Tensor, | ||
quant_state: Optional[QuantState] = None, | ||
absmax: Optional[torch.Tensor] = None, | ||
out: Optional[torch.Tensor] = None, | ||
blocksize: int = 64, | ||
quant_type="fp4", | ||
) -> torch.Tensor: | ||
""" | ||
Dequantizes FP4 blockwise quantized values. | ||
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Dequantizes the tensor A with maximum absolute values absmax in blocks of size blocksize. | ||
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Parameters | ||
---------- | ||
A : torch.Tensor | ||
The input tensor (packed 4-bit values). | ||
quant_state : QuantState | ||
object with quantisation stats, incl. absmax values, original tensor shape and original dtype. | ||
absmax : torch.Tensor | ||
The absmax values. | ||
out : torch.Tensor | ||
Dequantized output tensor. | ||
blocksize : int | ||
The blocksize used in quantization. | ||
quant_type : str | ||
The 4-bit quantization data type {fp4, nf4} | ||
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Returns | ||
------- | ||
torch.Tensor: | ||
Dequantized tensor. | ||
""" | ||
raise NotImplementedError |
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Can this cause any problems? What if we have a backend that, upon initialization, makes assumptions about the hardware/system? I think this can work if the backend does not have any state. However, is it a realistic assumption if we think about other backends?
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AIUI, this is only really here to keep things working at present and we could think about deferred initialization later.
Even in the preimage of this PR, bnb initializes a backend (the native library) at import time.