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<!DOCTYPE html>
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<center>
<h1 id="release-notes-for">Release Notes for</h1>
<h1 id="stm32l4xx-hal-drivers"><mark>STM32L4xx HAL Drivers</mark></h1>
<p>Copyright © 2017 STMicroelectronics<br />
</p>
<a href="https://www.st.com" class="logo"><img src="_htmresc/st_logo_2020.png" alt="ST logo" /></a>
</center>
<h1 id="purpose">Purpose</h1>
<p>The STM32Cube HAL and LL, an STM32 abstraction layer embedded software, ensure maximized portability across STM32 portfolio.</p>
<p>The portable APIs layer provides a generic, multi instanced and simple set of APIs to interact with the upper layer (application, libraries and stacks). It is composed of native and extended APIs set. It is directly built around a generic architecture and allows the build-upon layers, like the middleware layer, to implement its functions without knowing in-depth the used STM32 device. This improves the library code reusability and guarantees an easy portability on other devices and STM32 families.</p>
<p>The Low Layer (LL) drivers are part of the STM32Cube firmware HAL that provides a basic set of optimized and one shot services. The Low layer drivers, contrary to the HAL ones are not fully portable across the STM32 families; the availability of some functions depends on the physical availability of the relative features on the product. The Low Layer (LL) drivers are designed to offer the following features:</p>
<ul>
<li>New set of inline functions for direct and atomic register access</li>
<li>One-shot operations that can be used by the HAL drivers or from application level</li>
<li>Full independence from HAL and standalone usage (without HAL drivers)</li>
<li>Full features coverage of all the supported peripherals</li>
</ul>
</div>
<section id="update-history" class="col-sm-12 col-lg-8">
<h1>Update History</h1>
<div class="collapse">
<input type="checkbox" id="collapse-section32" checked aria-hidden="true"> <label for="collapse-section32" aria-hidden="true">V1.13.3 / 15-April-2022</label>
<div>
<h2 id="main-changes">Main Changes</h2>
<ul>
<li>Maintenance release of <strong>HAL and Low Layer</strong> drivers to fix mainly HAL OSPI driver issue</li>
<li>HAL code quality enhancement for MISRA-C Rule-8.13 by adding const qualifiers</li>
</ul>
<h2 id="contents">Contents</h2>
<ul>
<li><strong>HAL RCC</strong>
<ul>
<li>Fix HCLK prescaler update in HAL_RCC_ClockConfig() to avoid issue with CPU clock being out of range versus the Flash latency.</li>
<li>Wait PLL1RDY to be off before clearing PLL1 source</li>
</ul></li>
<li><strong>HAL FLASH</strong>
<ul>
<li>Complete description of USERConfig, member of structure FLASH_OBProgramInitTypeDef.</li>
</ul></li>
<li><strong>HAL EXTI</strong>
<ul>
<li>Fix EXTI_GPIOG defined value issue.</li>
</ul></li>
<li><strong>HAL DSI</strong>
<ul>
<li>Update to align DSI ULPS entry and exit sequences with reference manual.</li>
</ul></li>
<li><strong>HAL/LL TIM</strong>
<ul>
<li>Manage configuration of the Capture/compare DMA request source</li>
<li>Add related new exported constants (TIM_CCDMAREQUEST_CC, TIM_CCDMAREQUEST_UPDATE).</li>
<li>Create a new macro __HAL_TIM_SELECT_CCDMAREQUEST() allowing to program the TIMx_CR2.CCDS bitfield.</li>
<li>Update __LL_TIM_CALC_PSC() macro to round up the evaluated value when the fractional part of the division is greater than 0.5.</li>
</ul></li>
<li><strong>HAL LTDC</strong>
<ul>
<li>Update HAL_LTDC_DeInit() to fix MCU Hang up during LCD turn OFF.</li>
</ul></li>
<li><strong>HAL QSPI</strong>
<ul>
<li>Update HAL_QSPI_Abort() and HAL_QSPI_Abort_IT() APIs to check on QSPI BUSY flag status before executing the abort procedure.</li>
</ul></li>
<li><strong>HAL OSPI</strong>
<ul>
<li>Update HAL_OSPI_Init() to fix DelayBlockBypass parameter configuration issue.</li>
</ul></li>
<li><strong>HAL I2C</strong>
<ul>
<li>Timeout issue using HAL MEM interface through FreeRTOS</li>
</ul></li>
<li><strong>HAL CAN</strong>
<ul>
<li>Removal of never reached code</li>
</ul></li>
<li><strong>HAL USB OTG</strong>
<ul>
<li>PCD: add handling of USB OUT Endpoint disable interrupt</li>
<li>PCD: fix device IN endpoint isoc incomplete transfer interrupt handling</li>
<li>PCD: fix USB device Isoc OUT Endpoint incomplete transfer interrupt handling</li>
<li>HAL: HCD: fix handling of ODDFRM bit in OTG_HCCHARx for Isochronous IN transactions</li>
<li>HAL: PCD: added fix to correct received transfer length with USB DMA activated</li>
</ul></li>
<li><strong>HAL USB FS</strong>
<ul>
<li>PCD: add supporting multi packets transfer on Interrupt endpoint</li>
<li>Set DCD timeout to minimum of 300ms before starting BCD primary detection process.</li>
<li>HAL: PCD: software correction added to avoid unexpected STALL condition during EP0 multi packet OUT transfer.</li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section31" aria-hidden="true"> <label for="collapse-section31" aria-hidden="true">V1.13.2 / 26-November-2021</label>
<div>
<h2 id="main-changes-1">Main Changes</h2>
<ul>
<li>Maintenance release of <strong>HAL and Low Layer</strong> drivers to include latest corrections</li>
</ul>
<h2 id="contents-1">Contents</h2>
<ul>
<li><strong>RCC_HAL</strong>
<ul>
<li>Update IS_RCC_PERIPHCLOCK() macro definition depending on targeted derivative.</li>
<li>Add new HAL_RCC_GetResetSource() API to get all reset sources and clear flags.</li>
<li>Update PLL clock source configuration to fix warnings with the GCC compiler</li>
</ul></li>
<li><strong>EXTI_HAL</strong>
<ul>
<li>Update HAL_EXTI_GetConfigLine() API to set default configuration value of Trigger and GPIOSel before checking each corresponding registers.</li>
</ul></li>
<li><strong>FLASH_HAL</strong>
<ul>
<li>Disable ICache while Flash programming.</li>
<li>Update HAL_FLASHEx_Erase() to remove __HAL_FLASH_INSTRUCTION_CACHE_DISABLE().</li>
</ul></li>
<li><strong>GPIO_HAL</strong>
<ul>
<li>Update HAL_GPIO_Init() API to avoid the configuration of PUPDR register when Analog mode is selected.</li>
<li>Optimize assertion control for GPIO Pull mode in HAL_GPIO_Init() API.</li>
<li>Reorder EXTI configuration sequence in order to avoid unexpected level detection.</li>
</ul></li>
<li><strong>ADC_HAL/LL</strong>
<ul>
<li>Update of the TEMPSENSOR_CAL2_TEMP value in the ll_adc.h file.</li>
<li>Remove useless binary mask.</li>
<li>Update LL_ADC driver to prevent unused argument compilation warning.</li>
</ul></li>
<li><strong>RTC_BKP_HAL/LL</strong>
<ul>
<li>Update __HAL_RTC_…(<strong>HANDLE</strong>, …) macros to access registers through (<strong>HANDLE</strong>)->Instance pointer and avoid "unused variable" warnings.</li>
<li>Fix bad reference to RTC handle in LL_RTC_TIME_Init() & LL_RTC_DATE_Init() APIs</li>
</ul></li>
<li><strong>CAN_HAL</strong>
<ul>
<li>Update HAL_CAN_Init() API to be aligned with referance manual and to avoid timeout error:
<ul>
<li>Update CAN Initialization sequence to set "request initialization" bit before exit from sleep mode.</li>
</ul></li>
</ul></li>
<li><strong>SPI_HAL/LL</strong>
<ul>
<li>General update to fix MISRA-C 2012 Rule-13.2 issue.</li>
<li>Update LL_SPI_TransmitData8() API to avoid casting the result to 8 bits.</li>
</ul></li>
<li><strong>I2C_HAL</strong>
<ul>
<li>Fix written reserved bit 28 in I2C_CR2 register</li>
<li>Updated I2C_IsAcknowledgeFailed() API to avoid I2C in busy state if NACK received after transmitting register address.</li>
<li>Update to handle errors in polling mode.
<ul>
<li>Rename I2C_IsAcknowledgeFailed() to I2C_IsErrorOccurred() and correctly manage when error occurs.</li>
</ul></li>
<li>Update to fix issue detected due to low system frequency execution (HSI).</li>
<li>Declare an internal macro link to DMA macro to check remaining data: I2C_GET_DMA_REMAIN_DATA</li>
</ul></li>
<li><strong>SMBUS_HAL</strong>
<ul>
<li>Update to fix issue of mismatched data received by master in case of data size to be transmitted by the slave is greater than the data size to be received by the master.
<ul>
<li>Add flush on TX register.</li>
</ul></li>
<li>Add the support of wake up capability.
<ul>
<li>Add new APIs:
<ul>
<li>HAL_SMBUSEx_EnableWakeUp()</li>
<li>HAL_SMBUSEx_DisableWakeUp()</li>
</ul></li>
</ul></li>
</ul></li>
<li><strong>UART_HAL</strong>
<ul>
<li>Fix erroneous UART’s handle state in case of error returned after DMA reception start within UART_Start_Receive_DMA().</li>
<li>Correction on UART ReceptionType management in case of ReceptionToIdle API are called from RxEvent callback</li>
<li>Handling of UART concurrent register access in case of race condition between Tx and Rx transfers (HAL UART and LL LPUART)</li>
<li>Improve header description of UART_WaitOnFlagUntilTimeout() function</li>
<li>Add a check on the UART parity before enabling the parity error interruption.</li>
<li>Add const qualifier for read only pointers.</li>
<li>Fix wrong cast when computing the USARTDIV value in UART_SetConfig().</li>
</ul></li>
<li><strong>LPUART_LL</strong>
<ul>
<li>Remove TXFECF reference from LL LPUART driver</li>
</ul></li>
<li><strong>USART_HAL/LL</strong>
<ul>
<li>Handling of UART concurrent register access in case of race condition between Tx and Rx transfers (HAL UART and LL LPUART)</li>
<li>Fix compilation warnings generated with ARMV6 compiler</li>
<li>Improve header description of USART_WaitOnFlagUntilTimeout() function</li>
<li>Add a check on the USART parity before enabling the parity error interrupt.</li>
<li>Add const qualifier for read only pointers.</li>
</ul></li>
<li><strong>SMARTCARD_HAL</strong>
<ul>
<li>Improve header description of SMARTCARD_WaitOnFlagUntilTimeout() function</li>
<li>Add const qualifier for read only pointers.</li>
<li>Fix wrong cast when computing the USARTDIV value in SMARTCARD_SetConfig().</li>
</ul></li>
<li><strong>IRDA_HAL</strong>
<ul>
<li>Improve header description of IRDA_WaitOnFlagUntilTimeout() function</li>
<li>Add a check on the IRDA parity before enabling the parity error interrupt.</li>
<li>Add const qualifier for read only pointers.</li>
<li>Fix wrong cast when computing the USARTDIV value in IRDA_SetConfig().</li>
</ul></li>
<li><strong>DSI_HAL</strong>
<ul>
<li>Update HAL_DSI_Read() to avoid HAL_TIMEOUT when a DSI read command is issued to the panel and the read data is not captured by the DSI Host which returns Packet Size Error.</li>
</ul></li>
<li><strong>TIM_HAL</strong>
<ul>
<li>Fix compilation warnings on MDK-ARM</li>
<li>Update HAL_TIMEx_ConfigBreakInput to use CMSIS TIM1_OR2_BKDF1BK0E_Pos definition instead of its hard coded value.</li>
</ul></li>
<li><strong>LPTIM_HAL</strong>
<ul>
<li>Add __HAL_LPTIM_RESET_COUNTER and __HAL_LPTIM_RESET_COUNTER_AFTERREAD macros managing the synchronous/asynchronous LPTIM counter reset.</li>
<li>Add check on PRIMASK register to prevent from enabling unwanted global interrupts within LPTIM_Disable() and LL_LPTIM_Disable()</li>
</ul></li>
<li><strong>NOR_HAL</strong>
<ul>
<li>Align HAL_NOR_Init() API with core of the function when write operation is disabled to avoid HardFault.</li>
</ul></li>
<li><strong>SDMMC_HAL</strong>
<ul>
<li>Fix Incorrect command sent in MMC_PowerOn
<ul>
<li>Update SEND_OP_COND (CMD1) to indicate as argument that the sector mode is supported by the host.</li>
</ul></li>
</ul></li>
<li><strong>PKA_HAL</strong>
<ul>
<li>Update to fix Montgomery multiplication in PKA.</li>
</ul></li>
<li><strong>USB_FS_HAL</strong>
<ul>
<li>HAL PCD: add fix transfer complete for IN Interrupt transaction in single buffer mode</li>
</ul></li>
<li><strong>USB_OTG_HAL</strong>
<ul>
<li>Add new API HAL_PCD_EP_Abort() to abort current USB endpoint transfer.</li>
</ul></li>
<li><strong>IWDG_HAL</strong>
<ul>
<li>Update HAL_IWDG_Init() API in order to fix HAL_GetTick() timeout vulnerability issue.</li>
<li>Add LSI startup time in default IWDG timeout calculation (HAL_IWDG_DEFAULT_TIMEOUT).</li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section30" aria-hidden="true"> <label for="collapse-section30" aria-hidden="true">V1.13.1 / 24-September-2021</label>
<div>
<h2 id="main-changes-2">Main Changes</h2>
<ul>
<li>Patch release only of ** USB HAL and Low Layer** drivers to include latest corrections</li>
</ul>
<h2 id="contents-2">Contents</h2>
<p><strong><u><span style="font-size: 10pt; font-family: Verdana; color: black;">HAL drivers changes</span></u></strong></p>
<ul>
<li><strong>HAL USB PCD</strong> driver
<ul>
<li>Fix double buffer mode isochronous IN transfer</li>
<li>Optimize USB IRQ handler by removing multiple reads from USB interrupt registers</li>
</ul></li>
<li><strong>HAL USB HCD</strong> driver
<ul>
<li>Optimize USB IRQ handler by removing multiple reads on USB interrupt registers</li>
</ul></li>
</ul>
<p><strong><u><span style="font-size: 10pt; font-family: Verdana; color: black;">LL drivers changes</span></u></strong></p>
<ul>
<li><strong>LL USB</strong> driver
<ul>
<li>Correction added on USB_ReadPacket() to ensure a byte by byte read from USB FiFO</li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section29" aria-hidden="true"> <label for="collapse-section29" aria-hidden="true">V1.13.0 / 11-February-2021</label>
<div>
<h2 id="main-changes-3">Main Changes</h2>
<ul>
<li>Maintenance release of <strong>HAL and Low Layer</strong> drivers to include latest corrections
<ul>
<li>Update of HAL SMBUS driver to introduce fast mode and fast mode plus
<ul>
<li>Add extension files stm32l4xx_hal_smbus_ex.h/.c for new APIs:
<ul>
<li><em>HAL_SMBUSEx_EnableFastModePlus()</em></li>
<li><em>HAL_SMBUSEx_DisableFastModePlus()</em></li>
</ul></li>
</ul></li>
<li>Update of HAL UART driver introducing enhanced reception services
<ul>
<li><em>HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle()</em></li>
<li><em>HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT()</em></li>
<li><em>HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA()</em></li>
</ul></li>
</ul></li>
</ul>
<h2 id="contents-3">Contents</h2>
<h3 id="halll-generic-updates"><strong>HAL/LL generic</strong> updates</h3>
<ul>
<li>stm32l4xx_hal_timebase_tim_template.c
<ul>
<li>Update Tick priority handling in <em>HAL_Init_Tick()</em></li>
</ul></li>
</ul>
<p><br />
</p>
<h3 id="hal-drivers-updates"><strong>HAL Drivers</strong> updates</h3>
<ul>
<li><strong>HAL ADC</strong> driver
<ul>
<li>Fix delay computation of the local variable wait_loop_index at low system core clock frequency</li>
<li>Fix to avoid Error state returned by IRQ handler in case of injected conversion + IT mode + trigger timer</li>
<li>Update <em>HAL_ADC_DeInit()</em> description and behaviour to call <em>MspDeInit()</em> only when all ADC instances sharing the same common ADC instance are disabled</li>
<li>Update timeout mechanism to avoid false timeout detection in case of preemption</li>
<li>Extend internal regulator stabilization time from 10us to 20us</li>
</ul></li>
<li><strong>HAL COMP</strong> driver
<ul>
<li>Fix delay computation of the local variable wait_loop_index at low system core clock frequency</li>
</ul></li>
<li><strong>HAL EXTI</strong> driver
<ul>
<li>Replace macro parameter __LINE__ by __EXTI_LINE__ to avoid conflicts with standard C usage</li>
</ul></li>
<li><strong>HAL GPIO</strong> driver
<ul>
<li>Add AF6 missing definitions : GPIO_AF6_OCTOSPIM_P1 / GPIO_AF6_OCTOSPIM_P2</li>
</ul></li>
<li><strong>HAL IWDG</strong> driver
<ul>
<li>Update definition of HAL_IWDG_DEFAULT_TIMEOUT to avoid issue with the watchdog init procedure</li>
</ul></li>
<li><strong>HAL LPTIM</strong> driver
<ul>
<li>Update external clock configuration to cover all ClockSource/CounterSource combinations</li>
</ul></li>
<li><strong>HAL NAND</strong> driver
<ul>
<li>Update address calculation in <em>HAL_NAND_Read_SpareArea_16b()</em> and <em>HAL_NAND_Write_SpareArea_16b()</em></li>
<li>Fix issue in the access to NAND 8-bits memories with 16-bits APIs</li>
</ul></li>
<li><strong>HAL OPAMP</strong> driver
<ul>
<li>Align OPAMP PowerMode definitions with others series</li>
</ul></li>
<li><strong>HAL RCC</strong> driver
<ul>
<li>Update IS_RCC_CRS_HSI48CALIBRATION() definition to have specific maximum value for STM32L412xx/L422xx devices</li>
<li>Update RCC_HSICALIBRATION_DEFAULT definition depending on devices</li>
</ul></li>
<li><strong>HAL RTC</strong> driver
<ul>
<li>Update the description of <em>HAL_RTC_SetTime()</em> to mention that the DayLightSaving attribute of sTime should not be used</li>
<li>Add Daylight Saving Time service</li>
<li>Update <em>HAL_RTC_DeactivateAlarm()</em> to fix issue during Alarm Autoclear</li>
<li>Update <em>HAL_RTC_SetTime()</em> to add back assert_param() functions checking daylight saving parameters</li>
</ul></li>
<li><strong>HAL SDMMC</strong> driver
<ul>
<li>Update driver to enable interrupt after treating the single write command or multiple write command</li>
<li>Update eMMC High Speed Mode management</li>
</ul></li>
<li><strong>HAL SMSBUS</strong> driver
<ul>
<li>Implementation of fast mode and fast mode plus
<ul>
<li>Add extension files stm32l4xx_hal_smbus_ex.h/.c for new APIs:
<ul>
<li><em>HAL_SMBUSEx_EnableFastModePlus()</em></li>
<li><em>HAL_SMBUSEx_DisableFastModePlus()</em></li>
</ul></li>
</ul></li>
</ul></li>
<li><strong>HAL SPI</strong> driver
<ul>
<li>Fix <em>SPI_WaitFifoStateUntilTimeout()</em></li>
</ul></li>
<li><strong>HAL TIM</strong> driver
<ul>
<li>Update callback function invoked upon Half DMA transfer completion</li>
<li>Fix in <em>HAL_TIM_OnePulse_Start()</em> to handle OutputChannel parameter</li>
<li>Update <em>HAL_TIM_IC_Start_DMA()</em> to ensure correct behavior of counter value latch delay at high frequency</li>
</ul></li>
<li><strong>HAL TSC</strong> driver
<ul>
<li>Add assertion when fordidden configurations of bit value PGPSC versus bit value CTPL are requested by user</li>
</ul></li>
<li><strong>HAL UART</strong> driver
<ul>
<li>Remove FifoMode use in UART_SetConfig()</li>
<li>Add a HAL UART service to enable RTO interrupt</li>
<li>Implementation of HAL UART enhanced reception services (ReceptionToIdle)
<ul>
<li><em>HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle()</em></li>
<li><em>HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT()</em></li>
<li><em>HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA()</em></li>
</ul></li>
</ul></li>
<li><strong>HAL UART/USART/IRDA/SMARTCARD</strong> drivers
<ul>
<li>Fix typos in State definition description</li>
<li>Update parameter array to be always declared as static const</li>
</ul></li>
<li><strong>HAL SMARTCARD</strong> driver
<ul>
<li>Remove FifoMode use in SMARTCARD_SetConfig()</li>
</ul></li>
<li><strong>HAL USB </strong> driver
<ul>
<li>Fix regression in HAL USB double buffer mode</li>
</ul></li>
<li><strong>HAL WWDG</strong> driver
<ul>
<li>Update HAL WWDG driver description</li>
</ul></li>
</ul>
<p><br />
</p>
<h3 id="ll-drivers-updates"><strong>LL Drivers</strong> updates</h3>
<ul>
<li><strong>LL DMA</strong> driver
<ul>
<li>Update LL_DMA_ClearFlag_GIx() to add text informing user not to clear GIx when channel is ON</li>
</ul></li>
<li><strong>LL FMC</strong> driver
<ul>
<li>Fix compilation warning with gcc -Wpedantic compiler option</li>
</ul></li>
<li><strong>LL GPIO</strong> driver
<ul>
<li>Update GPIO configuration order to avoid a glitch on the bus-lines when using CAN</li>
</ul></li>
<li><strong>LL OPAMP</strong> driver
<ul>
<li>Align OPAMP PowerMode definitions with others series</li>
</ul></li>
<li><strong>LL RCC</strong> driver
<ul>
<li>Update RCC private functions declaration to static</li>
</ul></li>
<li><strong>LL SPI</strong> driver
<ul>
<li>Update <em>LL_SPI_Init()</em> to et Rx FIFO to Quarter (1 Byte) in case of 8 Bits mode</li>
</ul></li>
<li><strong>LL TIM</strong> driver
<ul>
<li>Update return value of <em>LL_TIM_GetCounterMode()</em></li>
<li>Update LL_TIM_ONEPULSEMODE_SINGLE and LL_TIM_ONEPULSEMODE_REPETITIVE defines description</li>
</ul></li>
<li><strong>LL USART</strong> driver
<ul>
<li>Update <em>LL_USART_ClockInit()</em> to allow the configuration of clock phase and polarity even if CR2_CLKEN is cleared</li>
<li>Remove useless IS_LL_USART_BRR_MAX() macro</li>
</ul></li>
</ul>
<p><br />
</p>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section28" aria-hidden="true"> <label for="collapse-section28" aria-hidden="true">V1.12.0 / 26-June-2020</label>
<div>
<h2 id="main-changes-4">Main Changes</h2>
<ul>
<li>Maintenance release of <strong>HAL and Low Layer</strong> drivers to include latest corrections</li>
<li>Update of <strong>HAL OSPI</strong> driver introducing <strong>compatibility break</strong> with previous versions</li>
</ul>
<h2 id="contents-4">Contents</h2>
<h3 id="halll-generic-updates-1"><strong>HAL/LL generic</strong> updates</h3>
<ul>
<li>Remove the use of keyword register in HAL/LL drivers</li>
</ul>
<h3 id="hal-drivers-updates-1"><strong>HAL Drivers</strong> updates</h3>
<ul>
<li><strong>HAL CAN</strong> driver
<ul>
<li>Update <em>HAL_CAN_GetRxMessage()</em> to remove shift on RTR field of the structure CAN_RxHeaderTypeDef</li>
</ul></li>
<li><strong>HAL DAC</strong> driver
<ul>
<li>Update <em>HAL_DAC_ConfigChannel()</em> to add correction on timout handling for sample and hold configuration on CHANNEL_2</li>
<li>Update <em>HAL_DAC_Stop_DMA()</em> to return HAL_OK value and avoid HAL_DAC_STATE_ERROR return value in case HAL_DMA_Abort return HAL_ERROR</li>
</ul></li>
<li><strong>HAL DCMI</strong> driver
<ul>
<li>Update <em>HAL_DCMI_Start_DMA()</em> to manage DMA transfers larger than 0xFFFF</li>
</ul></li>
<li><strong>HAL DMA</strong> driver
<ul>
<li>Update <em>HAL_DMA_PollForTransfer()</em> to move the UNLOCK process once the transfer is completed</li>
</ul></li>
<li><strong>HAL FLASH</strong> driver
<ul>
<li>Correct MISRA C:2012-Rule-8.5 warning in HAL FLASH driver</li>
<li>Update __HAL_FLASH_GET_FLAG macro to correct the return value (when the flag ECCD is set to 1)</li>
</ul></li>
<li><strong>HAL GPIO</strong> driver
<ul>
<li>Add definition of GPIO_AF14_TIM2 missing for STM32L4R5xx products</li>
<li>Fix <em>HAL_GPIO_TogglePin()</em> to manage several pins</li>
</ul></li>
<li><strong>HAL</strong> driver
<ul>
<li>Add HAL_TickFreqTypeDef type definition for <em>HAL_SetTickFreq()</em> parameter and <em>HAL_GetTickFreq()</em> function</li>
</ul></li>
<li><strong>HAL I2C</strong> driver
<ul>
<li>Update of HAL I2C driver to correct some typo in comments</li>
</ul></li>
<li><strong>HAL LPTIM</strong> driver
<ul>
<li>Update <em>HAL_LPTIM_Init()</em> to allow digital filter configuration for external clock whatever the LPTIM clock source is</li>
</ul></li>
<li><strong>HAL NAND/NOR</strong> driver
<ul>
<li>Correct MISRA C:2012-Rule-7.2 warning in HAL NAND/NOR drivers</li>
<li>Correct MISRA C:2012-Rule-10.4_a / 14.4_d / 18.4 warnings in HAL NOR drivers</li>
<li>Update address calculation in <em>HAL_NOR_ProgramBuffer()</em></li>
<li>Update <em>HAL_NOR_ProgramBuffer()</em> to fix CodeSonar warnings</li>
</ul></li>
<li><strong>HAL OPAMP</strong> driver
<ul>
<li>Update <em>HAL_OPAMP_Init()</em> to fix CodeSonar warnings</li>
</ul></li>
<li><strong>HAL OSPI</strong> driver
<ul>
<li>Update <em>HAL_OSPIM_Config()</em> to adapt the assert checks with OCTOSPI selected mode</li>
<li><strong>The following updates introduce compatibility break with previous version of HAL OSPI driver</strong>
<ul>
<li>The wrap functionality is no more supported by the STM32L4+ products :
<ul>
<li>Remove WrapSize field of the initialization structure OSPI_InitTypeDef</li>
<li>Remove HAL_OSPI_OPTYPE_WRAP_CFG value for OperationType field within regular command structure OSPI_RegularCmdTypeDef</li>
</ul></li>
<li>The delay block can be bypassed in the STM32L4+ products :
<ul>
<li>Add DelayBlockBypass field within the initialization structure OSPI_InitTypeDef</li>
</ul></li>
<li>The multiplex mode is allowed in the OSPI IO manager for the STM32L4+ 1M products :
<ul>
<li>Add MaxTran field within the initialization structure OSPI_InitTypeDef</li>
</ul></li>
</ul></li>
</ul></li>
<li><strong>HAL RCC</strong> driver
<ul>
<li>Update IS_RCC_PLLSAI1N_VALUE() and IS_RCC_PLLSAI2N_VALUE() macros with new RCC_PLLSAI1N_MUL_8_127_SUPPORT and RCC_PLLSAI2N_MUL_8_127_SUPPORT definitions</li>
<li>Update RCC_HSICALIBRATION_DEFAULT definition</li>
<li>Update __HAL_RCC_APB1_FORCE_RESET() and __HAL_RCC_APB1_RELEASE_RESET() macros to handle RCC_APB1RSTR1 and RCC_APB1RSTR2 updates</li>
</ul></li>
<li><strong>HAL SDMMC</strong> driver
<ul>
<li>Add support of Sanitize and FTRIM/discard functions for HAL eMMC functionality</li>
<li>Add new API function <em>HAL_MMC_GetCardExtCSD()</em> to allow the user application to get the Extended CSD register</li>
<li>Update <em>HAL_MMC_InitCard()</em> and <em>HAL_SD_InitCard()</em> to fix CodeSonar warnings</li>
<li>Update <em>MMC_ReadExtCSD()</em> and <em>MMC_PwrClassUpdate()</em> to fix STM32CubeIDE compilation warnings</li>
</ul></li>
<li><strong>HAL SMARTCARD</strong> driver
<ul>
<li>Update NACK management in <em>HAL_SMARTCARD_Transmit()</em>, <em>HAL_SMARTCARD_Transmit_IT()</em> and <em>HAL_SMARTCARD_Transmit_DMA()</em> functions</li>
</ul></li>
<li><strong>HAL SMBUS</strong> driver
<ul>
<li>Update of HAL SMBUS driver to correct some typo in comments</li>
</ul></li>
<li><strong>HAL SPI</strong> driver
<ul>
<li>Correct MISRA C:2012-Rule-17.8 warning in HAL SPI driver</li>
<li>Update <em>HAL_SPI_Transmit()</em>, <em>HAL_SPI_Receive()</em> functions to fix in 3-wires communication (disable and enable SPI)</li>
<li>Update <em>SPI_DMAReceiveCplt()</em> to disable Rx/Tx DMA Request (done by default to handle the case master rx direction 2 lines)</li>
<li>Update HAL SPI driver to fix timeout management inside SPI DMA xfer complete handler</li>
<li>Update <em>HAL_SPI_Init()</em> to handle assert on BaudRatePrescaler in Slave Motorola mode</li>
</ul></li>
<li><strong>HAL TIM</strong> driver
<ul>
<li>Correct MISRA C:2012-Rule-2.2 warning in HAL TIM driver</li>
<li>Update DMA management when DMA requests are used for several channels of the same timer</li>
<li>Update <em>HAL_TIM_IC_Stop_DMA()</em> to stop DMA prior to disabling the channel</li>
<li>Add new <em>HAL_TIM_DMABurst_MultiWriteStart()</em> and <em>HAL_TIM_DMABurst_MultiReadStart()</em> API in HAL TIM driver</li>
<li>Update all <em>HAL_TIM_xxx_Start()</em> functions to allow the check of the TIMx_SMCR.SMS bit if the timer instance is slave mode capable</li>
<li>Update references to TIM_DMABASE_AF1 and TIM_DMABASE_AF2</li>
<li>Update <em>HAL_TIM_DMABurst_WriteStop()</em> and <em>HAL_TIM_DMABurst_ReadStop()</em> to modify calls to HAL_DMA_Abort_IT().</li>
</ul></li>
<li><strong>HAL TSC</strong> driver
<ul>
<li>Correct MISRA C:2012-Rule-2.4 warning in HAL TSC driver</li>
<li>Update IS_TSC_GROUP() macro definition to manage when field ChannelIOs or ShieldIOs or SamplingIOs are set to 0</li>
</ul></li>
<li><strong>HAL UART</strong> driver
<ul>
<li>Rework BRR register value computation in <em>HAL_UART_Init()</em> for ROM size gain</li>
<li>Update <em>HAL_UART_IRQHandler()</em> to handle UART Receive Timeout interruption in the ISR function</li>
</ul></li>
<li><strong>HAL USART</strong> driver
<ul>
<li>Update <em>HAL_USARTEx_DisableSlaveMode()</em> to correct SlaveMode field value</li>
</ul></li>
<li><strong>HAL WWDG</strong> driver
<ul>
<li>Update WWDG clock frequency, min, and max timeout values in header description</li>
</ul></li>
</ul>
<h3 id="ll-drivers-updates-1"><strong>LL Drivers</strong> updates</h3>
<ul>
<li><strong>LL FMC</strong> driver
<ul>
<li>Correct MISRA C:2012-Rule-7.2 warning in LL FMC driver</li>
</ul></li>
<li><strong>LL GPIO</strong> driver
<ul>
<li>Fix <em>LL_GPIO_TogglePin()</em> to manage several pins</li>
<li>Update <em>LL_GPIO_TogglePin()</em> to use the BSRR register rather than reading / modifying the ODR.</li>
</ul></li>
<li><strong>LL I2C</strong> driver
<ul>
<li>Update of LL I2C driver to correct some typo in comments</li>
</ul></li>
<li><strong>LL RCC</strong> driver
<ul>
<li>Update LL_RCC_HSI_SetCalibTrimming definition</li>
</ul></li>
<li><strong>LL TIM</strong> driver
<ul>
<li>Update RepetitionCounter parameter in <em>LL_TIM_StructInit()</em></li>
<li>Invert LL_TIM_COUNTERMODE_CENTER_DOWN and LL_TIM_COUNTERMODE_CENTER_UP definitions</li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section27" aria-hidden="true"> <label for="collapse-section27" aria-hidden="true">V1.11.1 / 07-February-2020</label>
<div>
<h2 id="main-changes-5">Main Changes</h2>
<ul>
<li>Patch release of <strong>HAL and Low Layer</strong> drivers to include latest corrections</li>
</ul>
<h2 id="contents-5">Contents</h2>
<p><strong><u><span style="font-size: 10pt; font-family: Verdana; color: black;">HAL drivers changes</span></u></strong></p>
<ul>
<li><strong>HAL GPIO</strong> driver
<ul>
<li>Update <em>HAL_GPIO_Init()</em> initialization sequence to modify the order of GPIO registers update</li>
</ul></li>
<li><strong>HAL I2C</strong> driver
<ul>
<li>Update <em>I2C_Enable_IRQ()</em> function to remove incorrect interrupts enable when InterruptRequest = I2C_XFER_CPLT_IT</li>
<li>Update <em>I2C_DMAXferCplt()</em>, <em>I2C_DMAError()</em> and <em>I2C_DMAAbort()</em> functions to avoid null pointer exceptions</li>
<li>Update <em>HAL_I2C_Master_Seq_Transmit/Receive_IT/DMA()</em> functions to set correct condition range</li>
<li>Update <em>I2C_ITMasterCplt()</em> to remove C++ compilation warning due to unused variable</li>
</ul></li>
<li><strong>HAL RTC</strong> driver
<ul>
<li>Correct MISRA C:2012-Rule-3.1 warning in RTC driver</li>
</ul></li>
<li><strong>HAL SDMMC</strong> driver
<ul>
<li>Update <em>MMC_InitCard()</em> function to add missing correction for eMMC card size computation issue</li>
<li>Update <em>SD_UltraHighSpeed()</em> and <em>SD_DDR_Mode()</em> functions to remove useless assignment</li>
<li>Correct MISRA C:2012 warnings in SDMMC driver (rules 10.4_a, 10.7, 13.5, 15.7, 2.2_c)</li>
</ul></li>
<li><strong>HAL SMBUS</strong> driver
<ul>
<li>Update IS_SMBUS_TRANSFER_OPTIONS_REQUEST macro definition to include transfers with PEC</li>
<li>Correct MISRA C:2012-Rule-2.4 warning in structure __SMBUS_HandleTypeDef definition</li>
</ul></li>
</ul>
<p><strong><u><span style="font-size: 10pt; font-family: Verdana; color: black;">LL drivers changes</span></u></strong></p>
<ul>
<li><strong>LL UTILS</strong> driver
<ul>
<li>Change private <em>UTILS_SetFlashLatency()</em> function into <em>LL_SetFlashLatency()</em> public function</li>
<li>Update <em>LL_PLL_ConfigSystemClock_MSI/HSI/HSE()</em> functions to set expected AHB prescaler value</li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section26" aria-hidden="true"> <label for="collapse-section26" aria-hidden="true">V1.11.0 / 22-November-2019</label>
<div>
<h2 id="main-changes-6">Main Changes</h2>
<ul>
<li>Release of <strong>HAL and Low Layer</strong> drivers to add support of <strong>STM32L4P5xx/STM32L4Q5xx</strong> devices
<ul>
<li>New <strong>PKA</strong> and <strong>PSSI</strong> peripherals supported in <strong>new HAL/LL PKA</strong> and <strong>HAL PSSI</strong> drivers</li>
</ul></li>
<li>Superset features device STM32L4Q5xx API User Manual available (STM32L4Q5xx_User_Manual.chm)<br />
</li>
<li>Correction of several issues applicable to other devices</li>
</ul>
<h2 id="contents-6">Contents</h2>
<p><strong><u><span style="font-size: 10pt; font-family: Verdana; color: black;">HAL drivers changes</span></u></strong></p>
<ul>
<li><strong>HAL</strong> driver
<ul>
<li>Add the following constants and macros definitions in stm32l4xx_hal.h for STM32L4P5xx/STM32L4Q5xx devices
<ul>
<li><span style="font-style: italic;">SYSCFG_BOOT_FMC</span></li>
<li><span style="font-style: italic;">SYSCFG_BOOT_OCTOPSPI1</span></li>
<li><span style="font-style: italic;">SYSCFG_BOOT_OCTOPSPI2</span></li>
<li>[__HAL_SYSCFG_REMAPMEMORY_FMC()]{style=“font-style: italic;”}</li>
<li>[__HAL_SYSCFG_REMAPMEMORY_OCTOSPI1()]{style=“font-style: italic;”}<br />
</li>
<li>[__HAL_SYSCFG_REMAPMEMORY_OCTOSPI2()]{style=“font-style: italic;”}</li>
</ul></li>
</ul></li>
<li><strong>HAL ADC</strong> driver
<ul>
<li>Update <em>IS_ADC_CHANNEL()</em> macro in stm32l4xx_hal_adc_ex.h to encompass all ADC2 channels for STM32L4P5xx/STM32L4Q5xx devices</li>
<li>Correct channel status mask computation in <em>DMA_CalcDMAMUXChannelBaseAndMask()</em> function</li>
</ul></li>
<li><strong>HAL DAC</strong> driver
<ul>
<li>Correct <em>HAL_DAC_UnRegisterCallback()</em> API to fix compilation error when USE_HAL_DAC_REGISTER_CALLBACKS is equal to 1</li>
</ul></li>
<li><strong>HAL DFSDM</strong> driver
<ul>
<li>Update the return check of <em>HAL_DMA_Abort()</em> in <em>HAL_DFSDM_FilterRegularStop_DMA()</em> and <em>HAL_DFSDM_FilterInjectedStop_DMA()</em> APIs</li>
</ul></li>
<li><strong>HAL DMA</strong> driver
<ul>
<li>Define DMAMUX request constant <em>DMA_REQUEST_PSSI</em> in stm32l4xx_hal_dma.h to enable PSSI peripheral DMA transfers for STM32L4P5xx/STM32L4Q5xx devices<br />
</li>
<li>Correct channel status mask computation in <em>DMA_CalcDMAMUXChannelBaseAndMask()</em> function</li>
</ul></li>
<li><strong>HAL DMA2D</strong> driver
<ul>
<li>Remove unused <em>DMA2D_ColorTypeDef</em> structure from stm32l4xx_hal_dma2d.h</li>
<li>Add new <em>HAL_DMA2D_CLUTStartLoad()</em> and <em>HAL_DMA2D_CLUTStartLoad_IT()</em> APIs to improve code compactness, code size and heap usage when loading CLUT</li>
<li>Add <span class="citation" data-cites="note">@note</span> to <em>HAL_DMA2D_CLUTLoad()</em>, <em>HAL_DMA2D_CLUTLoad_IT()</em> and <em>HAL_DMA2D_ConfigCLUT()</em> APIs to inform the user the latter are marked as obsolete and kept only to maintain compatibility with legacy</li>
</ul></li>
<li><strong>HAL FLASH</strong> driver
<ul>
<li>Correct <em>FLASH_FLAG_SR_ERRORS</em> and remove <em>FLASH_FLAG_PEMPTY</em> constants definitions in stm32l4xx_hal_flash.h for STM32L496xx/STM32L4A6xx since FLASH_SR PEMPTY bit is not defined for these devices</li>
<li>Update declaration of APIs <em>HAL_FLASHEx_EnableRunPowerDown()</em>, <em>HAL_FLASHEx_DisableRunPowerDown()</em> and <em>HAL_FLASHEx_OB_DBankConfig()</em> in stm32l4xx_flash_ramfunc.h and stm32l4xx_flash_ramfunc.c to implement new [__RAM_FUNC]{style=“font-style: italic;”} definition</li>
<li>Correct API <em>FLASH_PageErase()</em> in stm32l4xx_hal_flash_ex.c to make sure DBANK bit of FLASH_OPTR register is tested before a page erasure for STM32L4P5xx/STM32L4Q5xx devices</li>
</ul></li>
<li><strong>HAL FMC</strong> driver
<ul>
<li>Add PSRAM chip select counter management for STM32L4P5xx/STM32L4Q5xx devices in the following APIs
<ul>
<li><em>FMC_NORSRAM_Init()</em></li>
<li><em>FMC_NORSRAM_DeInit()</em></li>
</ul></li>
</ul></li>
<li><strong>HAL GENERIC</strong> driver
<ul>
<li>Correct [__RAM_FUNC]{style=“font-style: italic;”} define in stm32l4xx_hal_def.h in order not to impose function type</li>
</ul></li>
<li><strong>HAL GPIO</strong> driver
<ul>
<li>Add <em>GPIO_AF11_SDMMC2</em> and <em>GPIO_AF12_SDMMC2</em> alternate functions definitions in stm32l4xx_hal_gpio_ex.h for STM32L4P5xx/STM32L4Q5xx devices<br />
</li>
<li>Define PSSI alternalte functions definitions <em>GPIO_AF4_PSSI</em>, <em>GPIO_AF5_PSSI</em> and <em>GPIO_AF10_PSSI</em> for STM32L4P5xx/STM32L4Q5xx devices</li>
</ul></li>
<li><strong>HAL HASH</strong> driver
<ul>
<li>Correct phase management issue when performing two successive hash operations on two different buffers</li>
<li>Enhance digest computation in polling mode in authorizing hashing of empty buffers</li>
<li>Fix Misra C:2012 Rule-5.1 warning on identifiers to be distinct in the first 31 characters in renaming all <em>HAL_HASH_xxx_Accumulate_yy()</em> and <em>HAL_HASHEx_xxx_Accumulate_yy()</em> APIs respectively into <em>HAL_HASH_xxx_Accmlt_yy()</em> and <em>HAL_HASHEx_xxx_Accmlt_yy()</em></li>
<li>Create new APIs to wrap-up multi-buffer hashing processing in polling and interrupt modes
<ul>
<li><em>HAL_HASH_MD5_Accmlt_End()</em></li>
<li><em>HAL_HASH_SHA1_Accmlt_End()</em></li>
<li><em>HAL_HASHEx_SHA224_Accmlt_End()</em></li>
<li><em>HAL_HASHEx_SHA256_Accmlt_End()</em></li>
<li><em>HAL_HASH_MD5_Accmlt_End_IT()</em><br />
</li>
<li><em>HAL_HASH_SHA1_Accmlt_End_IT()</em></li>
<li><em>HAL_HASHEx_SHA224_Accmlt_End_IT()</em></li>
<li><em>HAL_HASHEx_SHA256_Accmlt_End_IT()</em></li>
</ul></li>
<li>Update example 32L4P5GDISCOVERY/Examples/HASH/HASH_HMAC_SHA224SHA256_MultiBuffer_DMA to illustrate how to use one of these APIs listed above</li>
<li>Ensure processing suspension flag is reset to HAL_HASH_SUSPEND_NONE value in <em>HAL_HASH_Init()</em> API</li>
</ul></li>
<li><strong>HAL I2C</strong> driver
<ul>
<li>Fix slave interrupt handling issue in checking STOPF bit at the beginning of the interrupt handling and no more at the end. Correction done in both <em>I2C_Slave_ISR_IT()</em> and <em>I2C_Slave_ISR_DMA()</em> static functions to consider interrupt and DMA cases.</li>
<li>Fix Misra C:2012 Rule-2.2_c warning on value assigned to a never used variable in <em>I2C_Slave_ISR_IT()</em> static function</li>
</ul></li>
<li><strong>HAL MMC</strong> driver
<ul>
<li>Implement DDR mode and High Speed feature for STM32L4P5xx/STM32L4Q5xx and STM32L4Rx/STM32L4Sx devices
<ul>
<li>Add new API <em>HAL_MMC_ConfigSpeedBusOperation()</em> to configure the speed bus<br />
</li>
</ul></li>
<li>Correct <em>BLOCKSIZE</em> constant into <em>MMC_BLOCKSIZE</em> in <em>HAL_MMCEx_ConfigDMAMultiBuffer()</em> API</li>
<li>Implement DDR mode and high speed feature, applicable only to STM32L4P5xx/STM32L4Q5xx and STM32L4Rx/STM32L4Sx devices</li>
<li>eMMC card size computation issue correction<br />
</li>
<li>Multi-block write issue correction</li>
</ul></li>
<li><strong>HAL OCTOSPI</strong> driver
<ul>
<li>Add OCTOSPI_DCR4_REFRESH register management for STM32L4P5xx/STM32L4Q5xx devices</li>
</ul></li>
<li><strong>HAL PCD</strong> driver
<ul>
<li>Update <em>PCD_EP_ISR_Handler()</em> API to re-enable EP OUT before copying data from IP buffer PMA to SRAM in order to improve data throughput</li>
</ul></li>
<li><strong>HAL PKA</strong> driver <strong>(NEW)</strong>
<ul>
<li>New stm32l4xx_hal_pka.h, stm32l4xx_hal_pka.c files (driver enabled with HAL_PKA_MODULE_ENABLED in stm32l4xx_hal_conf.h file)</li>
</ul></li>
<li><strong>HAL PSSI</strong> driver <strong>(NEW)</strong>
<ul>
<li>New stm32l4xx_hal_pssi.h, stm32l4xx_hal_pssi.c files (driver enabled with HAL_PSSI_MODULE_ENABLED in stm32l4xx_hal_conf.h file)</li>
</ul></li>
<li><strong>HAL PWR</strong> driver
<ul>
<li>Add new API <em>HAL_PWREx_SetSRAM2ContentRetention()</em> offering finer SRAM2 area retention in Standby mode for STM32L4P5xx/L4Q5xx devices (no retention, full retention or 4 Kbytes retention only) compared with other STM32L4 devices (no retention or full retention only)</li>
</ul></li>
<li><strong>HAL RCC</strong> driver
<ul>
<li>Add PSSI peripheral related macros
<ul>
<li>[__HAL_RCC_PSSI_CLK_ENABLE()]{style=“font-style: italic;”}<br />
</li>
<li>[__HAL_RCC_PSSI_CLK_DISABLE()]{style=“font-style: italic;”}<br />
</li>
<li>[__HAL_RCC_PSSI_IS_CLK_ENABLED()]{style=“font-style: italic;”}<br />
</li>
<li>[__HAL_RCC_PSSI_IS_CLK_DISABLED()]{style=“font-style: italic;”}<br />
</li>
<li>[__HAL_RCC_PSSI_FORCE_RESET()]{style=“font-style: italic;”}<br />
</li>
<li>[__HAL_RCC_PSSI_RELEASE_RESET()]{style=“font-style: italic;”}<br />
</li>
<li>[__HAL_RCC_PSSI_CLK_SLEEP_ENABLE()]{style=“font-style: italic;”}<br />
</li>
<li>[__HAL_RCC_PSSI_CLK_SLEEP_DISABLE()]{style=“font-style: italic;”}<br />
</li>
<li>[__HAL_RCC_PSSI_IS_CLK_SLEEP_ENABLED()]{style=“font-style: italic;”}<br />
</li>
<li>[__HAL_RCC_PSSI_IS_CLK_SLEEP_DISABLED()]{style=“font-style: italic;”}<br />
</li>
</ul></li>
<li>Add <em>HAL_RCCEx_OCTOSPIDelayConfig()</em> API to manage RCC_DLYCFGR register to configure OCTOSPI instances DQS delays. Applicable only to STM32L4P5xx/STM32L4Q5xx and STM32L4Rx/STM32L4Sx devices.</li>
<li>Correct <em>HAL_RCC_OscConfig()</em> API
<ul>
<li>to make sure Flash latency is decreased only when MSI is the system clock source</li>
<li>to ensure the PLL source is not updated when already used as PLLSAI(s) clock source</li>
</ul></li>
<li>Add the following macros to test whether or not OctoSPI clocks are enabled
<ul>
<li>[__HAL_RCC_OSPI1_IS_CLK_ENABLED()]{style=“font-style: italic;”}</li>
<li>[__HAL_RCC_OSPI2_IS_CLK_ENABLED()]{style=“font-style: italic;”}</li>
<li>[__HAL_RCC_OSPI1_IS_CLK_DISABLED()]{style=“font-style: italic;”}</li>
<li>[__HAL_RCC_OSPI2_IS_CLK_DISABLED()]{style=“font-style: italic;”}<br />
</li>
</ul></li>
<li>Correct MISRA C:2012-Rule-21.1 warning in updating the defines created to prevent recursive inclusion in stm32l4xx_hal_rcc.h and stm32l4xx_hal_rcc_ex.h</li>
</ul></li>
<li><strong>HAL RNG</strong> driver
<ul>
<li>Deliver new APIs <em>HAL_RNGEx_SetConfig()</em>, <em>HAL_RNGEx_GetConfig()</em> and <em>HAL_RNGEx_LockConfig()</em> to open entropy configuration for new hardware peripheral version available on STM32L4P5xx/L4Q5xx APIs declared and defined in <strong>new files</strong> stm32l4xx_hal_rng_ex.h and stm32l4xx_hal_rng_ex.c</li>
<li>Update <em>HAL_RNG_GenerateRandomNumber()</em> and <em>HAL_RNG_ReadyDataCallback()</em> APIs comments to reflect the peripheral behavior when output random data are available in an output buffer</li>
<li>Correct seed or clock error setting in <em>HAL_RNG_IRQHandler()</em> API</li>
<li>Align all defines related to NISTN bit to new NISTC naming. Applicable only to STM32L4P5xx/STM32L4Q5xx devices.</li>
</ul></li>
<li><strong>HAL RTC</strong> driver
<ul>
<li>Correct tamper management in <em>HAL_RTCEx_SetTamper()</em> and <em>HAL_RTCEx_SetTamper_IT()</em> APIs to allow individual configuration of the fields Interrupt Enable IE, NOERASE and Mask Flag MF for each tamper channel</li>
<li>Correct <em>HAL_RTC_SetAlarm_IT()</em> API so that alarm can be set without having to be deactivated beforehand</li>
<li>Remove redundant condition from <em>HAL_RTC_Init()</em> to correct CodeSonar warning</li>
<li>Implement binary mode feature specific to STM32L4P5xx/STM32L4Q5xx devices
<ul>
<li>Add new field <em>BinaryAutoClr</em> in <em>RTC_AlarmTypeDef</em> structure</li>
<li>Add new fields <em>BinMode</em> and <em>BinMixBcdU</em> in <em>RTC_InitTypeDef</em> structure<br />
</li>
</ul></li>
<li>Implement sub-second register underflow feature specific to STM32L4P5xx/STM32L4Q5xx devices
<ul>
<li>Create new APIs
<ul>
<li><em>HAL_RTCEx_SetSSRU_IT()</em></li>
<li><em>HAL_RTCEx_DeactivateSSRU()</em></li>
<li><em>HAL_RTCEx_SSRUIRQHandler()</em></li>
<li><em>HAL_RTCEx_SSRUEventCallback()</em></li>
</ul></li>
</ul></li>
</ul></li>
<li><strong>HAL SAI</strong> driver
<ul>
<li>Update code to remove tests on part numbers replaced on tests on SAI2 instance</li>
<li>Update the return check of <em>HAL_DMA_Abort()</em> in <em>HAL_SAI_DMAStop()</em> and <em>HAL_SAI_Abort()</em> APIs</li>
</ul></li>
<li><strong>HAL TIM</strong> driver
<ul>
<li>Add TIM update interrupt flag remap constants definitions
<ul>
<li>TIM_UIFREMAP_DISABLE</li>
<li>TIM_UIFREMAP_ENABLE</li>
</ul></li>
<li>Add TIM encoder input polarity constants definitions
<ul>
<li>TIM_INPUTCHANNELPOLARITY_RISING</li>
<li>TIM_INPUTCHANNELPOLARITY_FALLING</li>
</ul></li>
<li>Add macros to force a continuous copy of the update interrupt flag (UIF) into the timer counter register (bit 31)
<ul>
<li>[__HAL_TIM_UIFREMAP_ENABLE()]{style=“font-style: italic;”}</li>
<li>[__HAL_TIM_UIFREMAP_DISABLE()]{style=“font-style: italic;”}<br />
</li>
</ul></li>
<li>Add [__HAL_TIM_GET_UIFCPY()]{style=“font-style: italic;”} macro to retrieve update interrupt flag (UIF) copy status</li>
<li>Add macros to manage fast mode for a given channel
<ul>
<li>[__HAL_TIM_ENABLE_OCxFAST()]{style=“font-style: italic;”}</li>
<li>[__HAL_TIM_DISABLE_OCxFAST()]{style=“font-style: italic;”}</li>
</ul></li>
</ul></li>
<li><strong>HAL UART</strong> driver
<ul>
<li>Add new APIs <em>HAL_UART_ReceiverTimeout_Config()</em>, <em>HAL_UART_EnableReceiverTimeout()</em> and <em>HAL_UART_DisableReceiverTimeout()</em> to update on the fly the receiver timeout value in RTOR register</li>
<li>Remove redundant condition on <em>UART_CLOCKSOURCE_UNDEFINED</em> in <em>UART_SetConfig()</em> API</li>
<li>Update HAL_UART_Transmit() and HAL_UART_Receive() functions to avoid deadlock problem while mixing polling Transmit and Receive requests</li>
<li>Update API description of HAL_UART_Transmit(), HAL_UART_Receive(), HAL_UART_Transmit_IT(), HAL_UART_Receive_IT(), HAL_UART_Transmit_DMA(), HAL_UART_Receive_DMA()</li>
<li>Correct MISRA C:2012-Rule-21.1 warning in updating the defines created to prevent recursive inclusion in stm32l4xx_hal_uart.h and stm32l4xx_hal_uart_ex.h</li>
<li>Correct MISRA C:2012-Rule-2.2_c warning in removing unnecessary initializations in stm32l4xx_hal_uart.c and stm32l4xx_hal_uart_ex.c</li>
<li>Correct MISRA C:2012-Rule-18.4 in <em>HAL_UART_Transmit()</em> and <em>HAL_UART_Receive()</em> APIs so that `+=’ operator is not applied to a pointer</li>
<li>Correct MISRA C:2012-Rule15.7 warning to remove all empty else clauses in stm32l4xx_hal_uart.c and stm32l4xx_hal_uart_ex.h</li>
<li>Correct MISRA C:2012-Rule-17.7 warning in all calls of <em>HAL_DMA_Abort()</em> API so that its return value is not discarded</li>
<li>Correct MISRA C:2012-Rule-13.5 for all tests with logical operators</li>
<li>Correct MISRA C:2012-Rule-18.1_x to ensure numerator[] and denominator[] arrays in static function <em>UARTEx_SetNbDataToProcess()</em> are not out of bounds</li>
<li>Correct MISRA C:2012-Rule-10.6 warning in suppressing implicit widening and unused value in <em>UART_SetConfig()</em> API in stm32l4xx_hal_uart.c</li>
<li>Correct MISRA C:2012-Rule-10.4_a warning in suppressing superfluous mask in <em>HAL_UART_Receive()</em> API in stm32l4xx_hal_uart.c</li>
</ul></li>
<li><strong>HAL USART</strong> driver
<ul>
<li>Update <em>USART_SetConfig()</em> to remove functions as argument out of macros</li>
</ul></li>
</ul>
<p><strong><u><span style="font-size: 10pt; font-family: Verdana; color: black;">LL drivers changes</span></u></strong></p>
<ul>
<li><strong>LL ADC</strong> driver
<ul>
<li>Add new macros to respectively set and remove internal channels from the ADC peripheral configuration
<ul>
<li><em>LL_ADC_SetCommonPathInternalChAdd()</em></li>
<li><em>LL_ADC_SetCommonPathInternalChRem()</em></li>
</ul></li>
</ul></li>
<li><strong>LL DMA</strong> driver
<ul>
<li>Define DMAMUX request constant <em>LL_DMAMUX_REQ_PSSI</em> in stm32l4xx_ll_dmamux.h to enable PSSI peripheral DMA transfers for STM32L4P5xx/STM32L4Q5xx devices</li>
</ul></li>
<li><strong>LL FMC</strong> driver
<ul>
<li>Fix MS Visual 2017 compilation error in <em>FMC_NORSRAM_Init()</em> in removing the compilation switch from the macro definition</li>
</ul></li>
<li><strong>LL PKA</strong> driver <strong>(NEW)</strong>
<ul>
<li>New stm32l4xx_ll_pka.h, stm32l4xx_ll_pka.c files</li>
</ul></li>
<li><strong>LL PWR</strong> driver
<ul>
<li>Add new APIs <em>LL_PWR_SetSRAM2ContentRetention()</em> and <em>LL_PWR_GetSRAM2ContentRetention()</em> offering finer SRAM2 area retention in Standby mode for STM32L4P5xx/L4Q5xx devices (no retention, full retention or 4 Kbytes retention only) compared with other STM32L4 devices (no retention or full retention only)</li>
</ul></li>
<li><strong>LL RNG</strong> driver
<ul>
<li>Align all defines and macros related to NISTN bit to new NISTC naming. Applicable only to STM32L4P5xx/STM32L4Q5xx devices.</li>
</ul></li>
<li><strong>LL RCC</strong> driver
<ul>
<li>Add <em>LL_RCC_OCTOSPI1_DelayConfig()</em> and <em>LL_RCC_OCTOSPI2_DelayConfig()</em> API to manage RCC_DLYCFGR register to configure OCTOSPI instances DQS delays. Applicable only to STM32L4P5xx/STM32L4Q5xx and STM32L4Rx/STM32L4Sx devices.</li>
<li>Add <em>LL_AHB2_GRP1_PERIPH_PKA</em> constant definition in stm32l4xx_ll_bus.h for new PKA driver</li>
</ul></li>
<li><strong>LL RTC</strong> driver