register -> access

armanbilge · Aug 14, 2024 · 9faca58 · 9faca58
1 parent caee0e8
commit 9faca58
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Showing 2 changed files with 4 additions and 4 deletions.
diff --git a/core/jvm/src/main/scala/cats/effect/unsafe/IORuntimeCompanionPlatform.scala b/core/jvm/src/main/scala/cats/effect/unsafe/IORuntimeCompanionPlatform.scala
@@ -152,7 +152,7 @@ private[unsafe] abstract class IORuntimeCompanionPlatform { this: IORuntime.type
 
     (
       threadPool,
-      pollingSystem.makeApi(threadPool.register),
+      pollingSystem.makeApi(threadPool.access),
       { () =>
         unregisterMBeans()
         threadPool.shutdown()

diff --git a/core/jvm/src/main/scala/cats/effect/unsafe/WorkStealingThreadPool.scala b/core/jvm/src/main/scala/cats/effect/unsafe/WorkStealingThreadPool.scala
@@ -87,7 +87,7 @@ private[effect] final class WorkStealingThreadPool[P](
   private[unsafe] val pollers: Array[P] =
     new Array[AnyRef](threadCount).asInstanceOf[Array[P]]
 
-  private[unsafe] def register(cb: P => Unit): Unit = {
+  private[unsafe] def access(cb: P => Unit): Unit = {
 
     // figure out where we are
     val thread = Thread.currentThread()
@@ -97,8 +97,8 @@ private[effect] final class WorkStealingThreadPool[P](
       if (worker.isOwnedBy(pool)) // we're good
         cb(worker.poller())
       else // possibly a blocking worker thread, possibly on another wstp
-        scheduleExternal(() => register(cb))
-    } else scheduleExternal(() => register(cb))
+        scheduleExternal(() => access(cb))
+    } else scheduleExternal(() => access(cb))
   }
 
   /**