From 448fe9de32d179e3f555587e67352ee677c93747 Mon Sep 17 00:00:00 2001 From: Tsukasa OI Date: Wed, 13 Jul 2022 12:50:11 +0900 Subject: [PATCH] RISC-V: Use `xlen' on ADDIW address sequence Because XLEN for the disassembler is computed and stored in the `xlen' variable, this commit replaces uses of `info->mach' with `xlen' (testing for ADDIW / C.ADDIW address sequence). opcodes/ChangeLog: * riscv-dis.c (print_insn_args): Use `xlen' to determine whether XLEN is larger than 32. --- opcodes/riscv-dis.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c index 164fd209dbd..3f69756606e 100644 --- a/opcodes/riscv-dis.c +++ b/opcodes/riscv-dis.c @@ -235,7 +235,7 @@ print_insn_args (const char *oparg, insn_t l, bfd_vma pc, disassemble_info *info case 'j': if (((l & MASK_C_ADDI) == MATCH_C_ADDI) && rd != 0) maybe_print_address (pd, rd, EXTRACT_CITYPE_IMM (l), 0); - if (info->mach == bfd_mach_riscv64 + if (xlen > 32 && ((l & MASK_C_ADDIW) == MATCH_C_ADDIW) && rd != 0) maybe_print_address (pd, rd, EXTRACT_CITYPE_IMM (l), 1); print (info->stream, dis_style_immediate, "%d", @@ -433,7 +433,7 @@ print_insn_args (const char *oparg, insn_t l, bfd_vma pc, disassemble_info *info if (((l & MASK_ADDI) == MATCH_ADDI && rs1 != 0) || (l & MASK_JALR) == MATCH_JALR) maybe_print_address (pd, rs1, EXTRACT_ITYPE_IMM (l), 0); - if (info->mach == bfd_mach_riscv64 + if (xlen > 32 && ((l & MASK_ADDIW) == MATCH_ADDIW) && rs1 != 0) maybe_print_address (pd, rs1, EXTRACT_ITYPE_IMM (l), 1); print (info->stream, dis_style_immediate, "%d",