From 3ff9dbbce503c6e3f77a4a7b75ce6d02be9965b5 Mon Sep 17 00:00:00 2001 From: Tsukasa OI Date: Tue, 18 Jan 2022 19:02:00 +0900 Subject: [PATCH] UNRATIFIED RISC-V: Add 'Zihintntl' extension [DO NOT MERGE] Until 'Zihintntl' extension is ratified and final version number is determined, this patch should not merged upstream. This commit uses unratified version 0.2 as in documentation (instead of possible 1.0 after ratification). This commit adds 'Zihintntl' extension and its hint instructions. bfd/ChangeLog: * elfxx-riscv.c (riscv_supported_std_z_ext): Add 'Zihintntl' standard hint 'Z' extension. (riscv_multi_subset_supports): Add handling for new instruction classes. include/ChangeLog: * opcode/riscv.h (enum riscv_insn_class): Add new instruction classes: INSN_CLASS_ZIHINTNTL and INSN_CLASS_ZIHINTNTL_AND_C. (MASK_NTL_P1, MATCH_NTL_P1, MASK_NTL_PALL, MATCH_NTL_PALL, MASK_NTL_S1, MATCH_NTL_S1, MASK_NTL_ALL, MATCH_NTL_ALL, MASK_C_NTL_P1, MATCH_C_NTL_P1, MASK_C_NTL_PALL, MATCH_C_NTL_PALL, MASK_C_NTL_S1, MATCH_C_NTL_S1, MASK_C_NTL_ALL, MATCH_C_NTL_ALL): New macros. opcodes/ChangeLog: * riscv-opc.c (riscv_opcodes): Add non-temporal locality hint instructions and aliases. --- bfd/elfxx-riscv.c | 16 ++++++++++++++++ include/opcode/riscv-opc.h | 17 +++++++++++++++++ include/opcode/riscv.h | 2 ++ opcodes/riscv-opc.c | 12 ++++++++++++ 4 files changed, 47 insertions(+) diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c index c9636bcbdc8..31a1210a3dc 100644 --- a/bfd/elfxx-riscv.c +++ b/bfd/elfxx-riscv.c @@ -1159,6 +1159,7 @@ static struct riscv_supported_ext riscv_supported_std_z_ext[] = {"zicsr", ISA_SPEC_CLASS_20190608, 2, 0, 0 }, {"zifencei", ISA_SPEC_CLASS_20191213, 2, 0, 0 }, {"zifencei", ISA_SPEC_CLASS_20190608, 2, 0, 0 }, + {"zihintntl", ISA_SPEC_CLASS_DRAFT, 0, 2, 0 }, {"zihintpause", ISA_SPEC_CLASS_DRAFT, 2, 0, 0 }, {"zfh", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, {"zfhmin", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, @@ -2283,6 +2284,11 @@ riscv_multi_subset_supports (riscv_parse_subset_t *rps, return riscv_subset_supports (rps, "zicsr"); case INSN_CLASS_ZIFENCEI: return riscv_subset_supports (rps, "zifencei"); + case INSN_CLASS_ZIHINTNTL: + return riscv_subset_supports (rps, "zihintntl"); + case INSN_CLASS_ZIHINTNTL_AND_C: + return (riscv_subset_supports (rps, "zihintntl") + && riscv_subset_supports (rps, "c")); case INSN_CLASS_ZIHINTPAUSE: return riscv_subset_supports (rps, "zihintpause"); case INSN_CLASS_M: @@ -2398,6 +2404,16 @@ riscv_multi_subset_supports_ext (riscv_parse_subset_t *rps, return "zicsr"; case INSN_CLASS_ZIFENCEI: return "zifencei"; + case INSN_CLASS_ZIHINTNTL: + return "zihintntl"; + case INSN_CLASS_ZIHINTNTL_AND_C: + if (!riscv_subset_supports (rps, "zihintntl") + && !riscv_subset_supports (rps, "c")) + return _("zihintntl' and `c"); + else if (!riscv_subset_supports (rps, "zihintntl")) + return "zihintntl"; + else + return "c"; case INSN_CLASS_ZIHINTPAUSE: return "zihintpause"; case INSN_CLASS_M: diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h index 88b8d7ff595..fff98a8777d 100644 --- a/include/opcode/riscv-opc.h +++ b/include/opcode/riscv-opc.h @@ -2113,6 +2113,23 @@ #define MASK_CBO_INVAL 0xfff07fff #define MATCH_CBO_ZERO 0x40200f #define MASK_CBO_ZERO 0xfff07fff +/* Zihintntl hint instructions */ +#define MATCH_NTL_P1 0x200033 +#define MASK_NTL_P1 0xffffffff +#define MATCH_NTL_PALL 0x300033 +#define MASK_NTL_PALL 0xffffffff +#define MATCH_NTL_S1 0x400033 +#define MASK_NTL_S1 0xffffffff +#define MATCH_NTL_ALL 0x500033 +#define MASK_NTL_ALL 0xffffffff +#define MATCH_C_NTL_P1 0x900a +#define MASK_C_NTL_P1 0xffff +#define MATCH_C_NTL_PALL 0x900e +#define MASK_C_NTL_PALL 0xffff +#define MATCH_C_NTL_S1 0x9012 +#define MASK_C_NTL_S1 0xffff +#define MATCH_C_NTL_ALL 0x9016 +#define MASK_C_NTL_ALL 0xffff /* Unprivileged Counter/Timers CSR addresses. */ #define CSR_CYCLE 0xc00 #define CSR_TIME 0xc01 diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h index b115e338a05..64fe0189ce3 100644 --- a/include/opcode/riscv.h +++ b/include/opcode/riscv.h @@ -366,6 +366,8 @@ enum riscv_insn_class INSN_CLASS_D_AND_C, INSN_CLASS_ZICSR, INSN_CLASS_ZIFENCEI, + INSN_CLASS_ZIHINTNTL, + INSN_CLASS_ZIHINTNTL_AND_C, INSN_CLASS_ZIHINTPAUSE, INSN_CLASS_F_OR_ZFINX, INSN_CLASS_D_OR_ZDINX, diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c index 2f9945aa930..6d348d2c663 100644 --- a/opcodes/riscv-opc.c +++ b/opcodes/riscv-opc.c @@ -344,6 +344,14 @@ const struct riscv_opcode riscv_opcodes[] = {"addi", 0, INSN_CLASS_C, "d,Cz,Co", MATCH_C_LI, MASK_C_LI, match_rd_nonzero, INSN_ALIAS }, {"addi", 0, INSN_CLASS_C, "d,CV,z", MATCH_C_MV, MASK_C_MV, match_c_add, INSN_ALIAS }, {"addi", 0, INSN_CLASS_I, "d,s,j", MATCH_ADDI, MASK_ADDI, match_opcode, 0 }, +{"ntl.p1", 0, INSN_CLASS_ZIHINTNTL_AND_C, "", MATCH_C_NTL_P1, MASK_C_NTL_P1, match_opcode, INSN_ALIAS }, +{"ntl.p1", 0, INSN_CLASS_ZIHINTNTL, "", MATCH_NTL_P1, MASK_NTL_P1, match_opcode, 0 }, +{"ntl.pall", 0, INSN_CLASS_ZIHINTNTL_AND_C, "", MATCH_C_NTL_PALL, MASK_C_NTL_PALL, match_opcode, INSN_ALIAS }, +{"ntl.pall", 0, INSN_CLASS_ZIHINTNTL, "", MATCH_NTL_PALL, MASK_NTL_PALL, match_opcode, 0 }, +{"ntl.s1", 0, INSN_CLASS_ZIHINTNTL_AND_C, "", MATCH_C_NTL_S1, MASK_C_NTL_S1, match_opcode, INSN_ALIAS }, +{"ntl.s1", 0, INSN_CLASS_ZIHINTNTL, "", MATCH_NTL_S1, MASK_NTL_S1, match_opcode, 0 }, +{"ntl.all", 0, INSN_CLASS_ZIHINTNTL_AND_C, "", MATCH_C_NTL_ALL, MASK_C_NTL_ALL, match_opcode, INSN_ALIAS }, +{"ntl.all", 0, INSN_CLASS_ZIHINTNTL, "", MATCH_NTL_ALL, MASK_NTL_ALL, match_opcode, 0 }, {"add", 0, INSN_CLASS_C, "d,CU,CV", MATCH_C_ADD, MASK_C_ADD, match_c_add, INSN_ALIAS }, {"add", 0, INSN_CLASS_C, "d,CV,CU", MATCH_C_ADD, MASK_C_ADD, match_c_add, INSN_ALIAS }, {"add", 0, INSN_CLASS_C, "d,CU,Co", MATCH_C_ADDI, MASK_C_ADDI, match_rd_nonzero, INSN_ALIAS }, @@ -855,6 +863,10 @@ const struct riscv_opcode riscv_opcodes[] = {"c.addi4spn", 0, INSN_CLASS_C, "Ct,Cc,CK", MATCH_C_ADDI4SPN, MASK_C_ADDI4SPN, match_c_addi4spn, 0 }, {"c.addi16sp", 0, INSN_CLASS_C, "Cc,CL", MATCH_C_ADDI16SP, MASK_C_ADDI16SP, match_c_addi16sp, 0 }, {"c.addi", 0, INSN_CLASS_C, "d,Co", MATCH_C_ADDI, MASK_C_ADDI, match_opcode, 0 }, +{"c.ntl.p1", 0, INSN_CLASS_ZIHINTNTL_AND_C, "", MATCH_C_NTL_P1, MASK_C_NTL_P1, match_opcode, 0 }, +{"c.ntl.pall", 0, INSN_CLASS_ZIHINTNTL_AND_C, "", MATCH_C_NTL_PALL, MASK_C_NTL_PALL, match_opcode, 0 }, +{"c.ntl.s1", 0, INSN_CLASS_ZIHINTNTL_AND_C, "", MATCH_C_NTL_S1, MASK_C_NTL_S1, match_opcode, 0 }, +{"c.ntl.all", 0, INSN_CLASS_ZIHINTNTL_AND_C, "", MATCH_C_NTL_ALL, MASK_C_NTL_ALL, match_opcode, 0 }, {"c.add", 0, INSN_CLASS_C, "d,CV", MATCH_C_ADD, MASK_C_ADD, match_c_add_with_hint, 0 }, {"c.sub", 0, INSN_CLASS_C, "Cs,Ct", MATCH_C_SUB, MASK_C_SUB, match_opcode, 0 }, {"c.and", 0, INSN_CLASS_C, "Cs,Ct", MATCH_C_AND, MASK_C_AND, match_opcode, 0 },