Merge main to pico2-support branch #472
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Previously a long and slow SCSI transfer could exceed the 15 second timeout, resulting in early termination.
Reset watchdog while data transfer is progressing
Moved the RP2040 and RP2350 to the same customized arduino pico framework. That is compatible with both USB mass storage and the DaynaPORT Pico W SPI pio Wifi interface. Other changes include a base PlatformIO target that all RP builds inherit from. This gets rid of a lot of repeated settings. An unrelated change was the added the ability to set the timeout for USB enumeration as sometimes RP devices take longer than second to enumerate when on a USB hub. And adding both `EnableUSBMassStorage` and the new `USBMassStorageWaitPeriod` to the example `zuluscsi.ini` file.
Since the arduino pico library and the pico-sdk automatically build for either the RP2040 and RP23XX MCUs, both libraries have been merged into `lib/ZuluSCSI_platform_RP2MCU` with `#if` type C macros for some of the files and code snippets that are tied to the MCU. For example RP's PIO assembly files, timing delays and clock dividers.
Setup up SDIO delays in a struct that is rewritable and used that struct to initialize the SDIO interface. This should allow reclocking of the SDIO interface PIO statemachine.
There are two clock speed that can be reclocked to currently that seem to work 125MHz at 10MB/s sync and 250MHz at 20MB/s. Forcing slower sync speeds at 250MHz hasn't been tested. The Pico and Pico 2 haven't been setup either. The settings are to test it out are ``` [SCSI] ReclockInKHz = 250000 # set to 250MHz using KHz MaxSyncSpeed = 20 # to enable ultra Synchronous SCSI mode ```
In `lib/ZuluSCSI_platform_RP2MCU/timings.c` are the three clock settings for the product line. With a special setting for the SD clock rate of the Pico 2 as it could not do 50MHz SDIO clock at a 250MHz system clock. Was able to consolidate all the sdio pio and scsi_accel_target pio assembly files into one file for each function by setting the gpio waits dynamically via rewriting the the command in code. There are 3 things left to do. - Consolidate the scsi_accel_host pio files - Turn the Audio Build back on - See about DaynaPORT compatibility at high clock rates
Added back the Audio build and consolidated the initiator PIO assembly files into one by setting the wait GPIO in the C++ code. Also confirmed that the DaynaPORT works at 250MHz.
Added `zuluscsi_timings.ini` so users can modify their timing values by themselves. It limits their clock rate to 250MHz as higher clock rates than 266MHz require a recompile and 250MHz creates a nice 50MHz SDIO clock.
This is used for .cue/.bin sets where the files are stored in a subfolder.
There is circular dependency as GD32F205 platform includes ZuluSCSI_disk.h for the prefetchbytes workaround. This requires `lib_ldf_mode = chain+` for platformio. In addition the GD32F205 with audio buffers is very low on RAM. Moved some constants into flash so that the new multi-bin/cue support fits.
Add support for .cue files with multiple .bin files
Pressing `m` or `r` then `y` will reboot the board. If `m` is pressed the board will reboot into mass storage. This will be useful to users playing with their timings or modifying their `zuluscsi.ini` settings. For users modifying their timings, they will need to reboot into mass storage, edit their `zulu_timings.ini` file, then do an 'r' reboot to reclock their board with their new settings. Most zuluscsi.ini file settings get reloaded after ejecting the mass storage device.
Removed the `zuluscsi.ini` setting for matching reclocking via KHz presets to using SpeedGrade = TurboMax etc.
Merge the RP2350 and the RP2040 base MCU platform libraries into a common library
Ultra SCSI (Fast20) support with reclocking the RP2040 and RP2350 line of boards and user editable reclocking timings
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