From 9804a38373ac8b1dc47279c04d1bdcbc685e0f23 Mon Sep 17 00:00:00 2001 From: Morio Date: Mon, 21 Aug 2023 12:42:58 -0700 Subject: [PATCH 1/5] SD Card interface working and renamed files The SD card is working with the ZuluSCSI Pico FS. scsi_accel* and rp2040_sdio* files have been renamed so that RP2040 becomes a specific target, like BS2 and the new Pico suffix. For example: rp2040_sdio.pio -> sdio_RP2040.pio rp2040_sdio_BS2.pio.h -> sdio_BS2.pio.h --- .github/workflows/firmware_build.yml | 2 +- .../ZuluSCSI_platform.cpp | 2 +- .../ZuluSCSI_platform.h | 13 +- .../ZuluSCSI_platform_gpio_Pico.h | 170 +++++++++++++ ...gpio.h => ZuluSCSI_platform_gpio_RP2040.h} | 0 lib/ZuluSCSI_platform_RP2040/run_pioasm.sh | 8 +- lib/ZuluSCSI_platform_RP2040/scsiPhy.cpp | 2 +- .../{scsi_accel_rp2040.cpp => scsi_accel.cpp} | 8 +- .../{scsi_accel_rp2040.h => scsi_accel.h} | 0 .../{scsi_accel.pio => scsi_accel_Pico.pio} | 0 ...scsi_accel.pio.h => scsi_accel_Pico.pio.h} | 0 .../scsi_accel_RP2040.pio | 124 ++++++++++ .../scsi_accel_RP2040.pio.h | 225 ++++++++++++++++++ .../scsi_accel_host.cpp | 6 +- ...ccel_host.pio => scsi_accel_host_Pico.pio} | 0 ..._host.pio.h => scsi_accel_host_Pico.pio.h} | 0 .../scsi_accel_host_RP2040.pio | 46 ++++ .../scsi_accel_host_RP2040.pio.h | 44 ++++ lib/ZuluSCSI_platform_RP2040/sd_card_sdio.cpp | 2 +- .../{rp2040_sdio.cpp => sdio.cpp} | 10 +- .../{rp2040_sdio.h => sdio.h} | 0 .../{rp2040_sdio_BS2.pio => sdio_BS2.pio} | 0 .../{rp2040_sdio_BS2.pio.h => sdio_BS2.pio.h} | 0 lib/ZuluSCSI_platform_RP2040/sdio_Pico.pio | 164 +++++++++++++ lib/ZuluSCSI_platform_RP2040/sdio_Pico.pio.h | 121 ++++++++++ .../{rp2040_sdio.pio => sdio_RP2040.pio} | 0 .../{rp2040_sdio.pio.h => sdio_RP2040.pio.h} | 0 platformio.ini | 18 +- src/ZuluSCSI_config.h | 4 +- 29 files changed, 948 insertions(+), 21 deletions(-) create mode 100644 lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform_gpio_Pico.h rename lib/ZuluSCSI_platform_RP2040/{ZuluSCSI_platform_gpio.h => ZuluSCSI_platform_gpio_RP2040.h} (100%) rename lib/ZuluSCSI_platform_RP2040/{scsi_accel_rp2040.cpp => scsi_accel.cpp} (99%) rename lib/ZuluSCSI_platform_RP2040/{scsi_accel_rp2040.h => scsi_accel.h} (100%) rename lib/ZuluSCSI_platform_RP2040/{scsi_accel.pio => scsi_accel_Pico.pio} (100%) rename lib/ZuluSCSI_platform_RP2040/{scsi_accel.pio.h => scsi_accel_Pico.pio.h} (100%) create mode 100644 lib/ZuluSCSI_platform_RP2040/scsi_accel_RP2040.pio create mode 100644 lib/ZuluSCSI_platform_RP2040/scsi_accel_RP2040.pio.h rename lib/ZuluSCSI_platform_RP2040/{scsi_accel_host.pio => scsi_accel_host_Pico.pio} (100%) rename lib/ZuluSCSI_platform_RP2040/{scsi_accel_host.pio.h => scsi_accel_host_Pico.pio.h} (100%) create mode 100644 lib/ZuluSCSI_platform_RP2040/scsi_accel_host_RP2040.pio create mode 100644 lib/ZuluSCSI_platform_RP2040/scsi_accel_host_RP2040.pio.h rename lib/ZuluSCSI_platform_RP2040/{rp2040_sdio.cpp => sdio.cpp} (99%) rename lib/ZuluSCSI_platform_RP2040/{rp2040_sdio.h => sdio.h} (100%) rename lib/ZuluSCSI_platform_RP2040/{rp2040_sdio_BS2.pio => sdio_BS2.pio} (100%) rename lib/ZuluSCSI_platform_RP2040/{rp2040_sdio_BS2.pio.h => sdio_BS2.pio.h} (100%) create mode 100644 lib/ZuluSCSI_platform_RP2040/sdio_Pico.pio create mode 100644 lib/ZuluSCSI_platform_RP2040/sdio_Pico.pio.h rename lib/ZuluSCSI_platform_RP2040/{rp2040_sdio.pio => sdio_RP2040.pio} (100%) rename lib/ZuluSCSI_platform_RP2040/{rp2040_sdio.pio.h => sdio_RP2040.pio.h} (100%) diff --git a/.github/workflows/firmware_build.yml b/.github/workflows/firmware_build.yml index 0358af58..5287261b 100644 --- a/.github/workflows/firmware_build.yml +++ b/.github/workflows/firmware_build.yml @@ -24,7 +24,7 @@ jobs: - name: Build firmware run: | cd ZuluSCSI - pio run -v + pio run -v -e ZuluSCSI_Pico - name: Rename firmware files run: | diff --git a/lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform.cpp b/lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform.cpp index c173e5f2..408c1107 100644 --- a/lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform.cpp +++ b/lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform.cpp @@ -38,7 +38,7 @@ #include #include #include "audio.h" -#include "scsi_accel_rp2040.h" +#include "scsi_accel.h" extern "C" { diff --git a/lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform.h b/lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform.h index e9768e8f..283ede60 100644 --- a/lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform.h +++ b/lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform.h @@ -26,12 +26,15 @@ #include #include -#ifdef ZULUSCSI_BS2 +#ifdef ZULUSCSI_PICO +// ZuluSCSI Pico carrier board variant +#include "ZuluSCSI_platform_gpio_Pico.h" +#elif defined(ZULUSCSI_BS2) // BS2 hardware variant, using Raspberry Pico board on a carrier PCB #include "ZuluSCSI_platform_gpio_BS2.h" #else // Normal RP2040 variant, using RP2040 chip directly -#include "ZuluSCSI_platform_gpio.h" +#include "ZuluSCSI_platform_gpio_RP2040.h" #endif #include "scsiHostPhy.h" @@ -44,7 +47,11 @@ extern "C" { /* These are used in debug output and default SCSI strings */ extern const char *g_platform_name; -#ifdef ZULUSCSI_BS2 +#ifdef ZULUSCSI_PICO +# define PLATFORM_NAME "ZuluSCSI Pico" +# define PLATFORM_REVISION "2.0" +# define PLATFORM_HAS_INITIATOR_MODE 1 +#elif defined(ZULUSCSI_BS2) # define PLATFORM_NAME "ZuluSCSI BS2" # define PLATFORM_REVISION "1.0" #else diff --git a/lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform_gpio_Pico.h b/lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform_gpio_Pico.h new file mode 100644 index 00000000..ec590409 --- /dev/null +++ b/lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform_gpio_Pico.h @@ -0,0 +1,170 @@ +/** + * ZuluSCSI™ - Copyright (c) 2022 Rabbit Hole Computing™ + * + * ZuluSCSI™ firmware is licensed under the GPL version 3 or any later version.  + * + * https://www.gnu.org/licenses/gpl-3.0.html + * ---- + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version.  + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details.  + * + * You should have received a copy of the GNU General Public License + * along with this program.  If not, see . +**/ + +// GPIO definitions for ZuluSCSI RP2040-based hardware + +#pragma once + +#include + +// SCSI data input/output port. +// The data bus uses external bidirectional buffer, with +// direction controlled by DATA_DIR pin. +#define SCSI_IO_DB0 0 +#define SCSI_IO_DB1 1 +#define SCSI_IO_DB2 2 +#define SCSI_IO_DB3 3 +#define SCSI_IO_DB4 4 +#define SCSI_IO_DB5 5 +#define SCSI_IO_DB6 6 +#define SCSI_IO_DB7 7 +#define SCSI_IO_DBP 8 +#define SCSI_IO_DATA_MASK 0x1FF +#define SCSI_IO_SHIFT 0 + +// Data direction control +#define SCSI_DATA_DIR 9 + +// SCSI output status lines +#define SCSI_OUT_IO 22 +#define SCSI_OUT_CD 18 +#define SCSI_OUT_MSG 20 +#define SCSI_OUT_RST 21 +#define SCSI_OUT_BSY 27 +#define SCSI_OUT_REQ 17 +#define SCSI_OUT_SEL 19 + +// SCSI input status signals +#define SCSI_IN_SEL 18 +#define SCSI_IN_ACK 26 +#define SCSI_IN_ATN 28 +#define SCSI_IN_BSY 20 +#define SCSI_IN_RST 21 + +// Status line outputs for initiator mode +#define SCSI_OUT_ACK 26 +#define SCSI_OUT_ATN 28 + +// Status line inputs for initiator mode +#define SCSI_IN_IO 22 +#define SCSI_IN_CD 24 +#define SCSI_IN_MSG 20 +#define SCSI_IN_REQ 17 + +// Status LED pins +#define LED_PIN 15 +#define LED_ON() sio_hw->gpio_set = 1 << LED_PIN +#define LED_OFF() sio_hw->gpio_clr = 1 << LED_PIN + +// SD card pins in SDIO mode +#define SDIO_CLK 10 +#define SDIO_CMD 11 +#define SDIO_D0 12 +#define SDIO_D1 13 +#define SDIO_D2 14 +#define SDIO_D3 15 + +// SD card pins in SPI mode +#define SD_SPI spi0 +#define SD_SPI_SCK 10 +#define SD_SPI_MOSI 11 +#define SD_SPI_MISO 12 +#define SD_SPI_CS 15 + +#ifndef ENABLE_AUDIO_OUTPUT + // IO expander I2C + #define GPIO_I2C_SDA 14 + #define GPIO_I2C_SCL 15 +#else + // IO expander I2C pins being used as SPI for audio + #define AUDIO_SPI spi1 + #define GPIO_EXP_SPARE 14 + #define GPIO_EXP_AUDIO 15 +#endif + +// DIP switch pins +#define HAS_DIP_SWITCHES +#define DIP_INITIATOR 26 +#define DIP_DBGLOG 16 +#define DIP_TERM 17 + +// Other pins +#define SWO_PIN 16 + +// Below are GPIO access definitions that are used from scsiPhy.cpp. + +// Write a single SCSI pin. +// Example use: SCSI_OUT(ATN, 1) sets SCSI_ATN to low (active) state. +#define SCSI_OUT(pin, state) \ + *(state ? &sio_hw->gpio_clr : &sio_hw->gpio_set) = 1 << (SCSI_OUT_ ## pin) + +// Read a single SCSI pin. +// Example use: SCSI_IN(ATN), returns 1 for active low state. +#define SCSI_IN(pin) \ + ((sio_hw->gpio_in & (1 << (SCSI_IN_ ## pin))) ? 0 : 1) + +// Set pin directions for initiator vs. target mode +#define SCSI_ENABLE_INITIATOR() \ + (sio_hw->gpio_oe_set = (1 << SCSI_OUT_ACK) | \ + (1 << SCSI_OUT_ATN)), \ + (sio_hw->gpio_oe_clr = (1 << SCSI_IN_IO) | \ + (1 << SCSI_IN_CD) | \ + (1 << SCSI_IN_MSG) | \ + (1 << SCSI_IN_REQ)) + +// Enable driving of shared control pins +#define SCSI_ENABLE_CONTROL_OUT() \ + (sio_hw->gpio_oe_set = (1 << SCSI_OUT_CD) | \ + (1 << SCSI_OUT_MSG)) + +// Set SCSI data bus to output +#define SCSI_ENABLE_DATA_OUT() \ + (sio_hw->gpio_clr = (1 << SCSI_DATA_DIR), \ + sio_hw->gpio_oe_set = SCSI_IO_DATA_MASK) + +// Write SCSI data bus, also sets REQ to inactive. +#define SCSI_OUT_DATA(data) \ + gpio_put_masked(SCSI_IO_DATA_MASK | (1 << SCSI_OUT_REQ), \ + g_scsi_parity_lookup[(uint8_t)(data)] | (1 << SCSI_OUT_REQ)), \ + SCSI_ENABLE_DATA_OUT() + +// Release SCSI data bus and REQ signal +#define SCSI_RELEASE_DATA_REQ() \ + (sio_hw->gpio_oe_clr = SCSI_IO_DATA_MASK, \ + sio_hw->gpio_set = (1 << SCSI_DATA_DIR) | (1 << SCSI_OUT_REQ)) + +// Release all SCSI outputs +#define SCSI_RELEASE_OUTPUTS() \ + SCSI_RELEASE_DATA_REQ(), \ + sio_hw->gpio_oe_clr = (1 << SCSI_OUT_CD) | \ + (1 << SCSI_OUT_MSG), \ + sio_hw->gpio_set = (1 << SCSI_OUT_IO) | \ + (1 << SCSI_OUT_CD) | \ + (1 << SCSI_OUT_MSG) | \ + (1 << SCSI_OUT_RST) | \ + (1 << SCSI_OUT_BSY) | \ + (1 << SCSI_OUT_REQ) | \ + (1 << SCSI_OUT_SEL) + +// Read SCSI data bus +#define SCSI_IN_DATA() \ + (~sio_hw->gpio_in & SCSI_IO_DATA_MASK) >> SCSI_IO_SHIFT + diff --git a/lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform_gpio.h b/lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform_gpio_RP2040.h similarity index 100% rename from lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform_gpio.h rename to lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform_gpio_RP2040.h diff --git a/lib/ZuluSCSI_platform_RP2040/run_pioasm.sh b/lib/ZuluSCSI_platform_RP2040/run_pioasm.sh index c3e1e04a..39c7d0b6 100755 --- a/lib/ZuluSCSI_platform_RP2040/run_pioasm.sh +++ b/lib/ZuluSCSI_platform_RP2040/run_pioasm.sh @@ -2,8 +2,10 @@ # This script regenerates the .pio.h files from .pio -pioasm rp2040_sdio.pio rp2040_sdio.pio.h -pioasm rp2040_sdio_BS2.pio rp2040_sdio_BS2.pio.h +pioasm sdio_RP2040.pio sdio_RP2040.pio.h +pioasm sdio_Pico.pio sdio_Pico.pio.h +pioasm sdio_BS2.pio sdio_BS2.pio.h -pioasm scsi_accel.pio scsi_accel.pio.h +pioasm scsi_accel_RP2040.pio scsi_accel.pio_RP2040.h +pioasm scsi_accel_Pico.pio scsi_accel_Pico.pio.h pioasm scsi_accel_BS2.pio scsi_accel_BS2.pio.h diff --git a/lib/ZuluSCSI_platform_RP2040/scsiPhy.cpp b/lib/ZuluSCSI_platform_RP2040/scsiPhy.cpp index bc4e9fc3..d5f0e6f8 100644 --- a/lib/ZuluSCSI_platform_RP2040/scsiPhy.cpp +++ b/lib/ZuluSCSI_platform_RP2040/scsiPhy.cpp @@ -29,7 +29,7 @@ #include "ZuluSCSI_log.h" #include "ZuluSCSI_log_trace.h" #include "ZuluSCSI_config.h" -#include "scsi_accel_rp2040.h" +#include "scsi_accel.h" #include "hardware/structs/iobank0.h" #include diff --git a/lib/ZuluSCSI_platform_RP2040/scsi_accel_rp2040.cpp b/lib/ZuluSCSI_platform_RP2040/scsi_accel.cpp similarity index 99% rename from lib/ZuluSCSI_platform_RP2040/scsi_accel_rp2040.cpp rename to lib/ZuluSCSI_platform_RP2040/scsi_accel.cpp index 9fb8b216..839188f3 100644 --- a/lib/ZuluSCSI_platform_RP2040/scsi_accel_rp2040.cpp +++ b/lib/ZuluSCSI_platform_RP2040/scsi_accel.cpp @@ -29,7 +29,7 @@ #include "ZuluSCSI_platform.h" #include "ZuluSCSI_log.h" -#include "scsi_accel_rp2040.h" +#include "scsi_accel.h" #include #include #include @@ -38,10 +38,12 @@ #include #include -#ifdef ZULUSCSI_BS2 +#ifdef ZULUSCSI_PICO +#include "scsi_accel_Pico.pio.h" +#elif defined(ZULUSCSI_BS2) #include "scsi_accel_BS2.pio.h" #else -#include "scsi_accel.pio.h" +#include "scsi_accel_RP2040.pio.h" #endif // SCSI bus write acceleration uses up to 3 PIO state machines: diff --git a/lib/ZuluSCSI_platform_RP2040/scsi_accel_rp2040.h b/lib/ZuluSCSI_platform_RP2040/scsi_accel.h similarity index 100% rename from lib/ZuluSCSI_platform_RP2040/scsi_accel_rp2040.h rename to lib/ZuluSCSI_platform_RP2040/scsi_accel.h diff --git a/lib/ZuluSCSI_platform_RP2040/scsi_accel.pio b/lib/ZuluSCSI_platform_RP2040/scsi_accel_Pico.pio similarity index 100% rename from lib/ZuluSCSI_platform_RP2040/scsi_accel.pio rename to lib/ZuluSCSI_platform_RP2040/scsi_accel_Pico.pio diff --git a/lib/ZuluSCSI_platform_RP2040/scsi_accel.pio.h b/lib/ZuluSCSI_platform_RP2040/scsi_accel_Pico.pio.h similarity index 100% rename from lib/ZuluSCSI_platform_RP2040/scsi_accel.pio.h rename to lib/ZuluSCSI_platform_RP2040/scsi_accel_Pico.pio.h diff --git a/lib/ZuluSCSI_platform_RP2040/scsi_accel_RP2040.pio b/lib/ZuluSCSI_platform_RP2040/scsi_accel_RP2040.pio new file mode 100644 index 00000000..2f835dfe --- /dev/null +++ b/lib/ZuluSCSI_platform_RP2040/scsi_accel_RP2040.pio @@ -0,0 +1,124 @@ +; ZuluSCSI™ - Copyright (c) 2022 Rabbit Hole Computing™ +; +; ZuluSCSI™ firmware is licensed under the GPL version 3 or any later version.  +; +; https://www.gnu.org/licenses/gpl-3.0.html +; ---- +; This program is free software: you can redistribute it and/or modify +; it under the terms of the GNU General Public License as published by +; the Free Software Foundation, either version 3 of the License, or +; (at your option) any later version.  +; +; This program is distributed in the hope that it will be useful, +; but WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the +; GNU General Public License for more details.  +; +; You should have received a copy of the GNU General Public License +; along with this program.  If not, see . + + +; RP2040 PIO program for accelerating SCSI communication +; Run "pioasm scsi_accel.pio scsi_accel.pio.h" to regenerate the C header from this. +; GPIO mapping: +; - 0-7: DB0-DB7 +; - 8: DBP +; Side set is REQ pin + +.define REQ 9 +.define ACK 10 + +; Delay from data setup to REQ assertion. +; deskew delay + cable skew delay = 55 ns minimum +; One clock cycle is 8 ns => delay 7 clocks +.define REQ_DLY 7 + +; Adds parity to data that is to be written to SCSI +; This works by generating addresses for DMA to fetch data from. +; Register X should be initialized to the base address of the lookup table. +.program scsi_parity + pull block + in NULL, 1 + in OSR, 8 + in X, 23 + +; Write to SCSI bus using asynchronous handshake. +; Data is written as 32-bit words that contain the 8 data bits + 1 parity bit. +; 23 bits in each word are discarded. +; Number of bytes to send must be multiple of 2. +.program scsi_accel_async_write + .side_set 1 + + pull ifempty block side 1 ; Get data from TX FIFO + out pins, 9 side 1 ; Write data and parity bit + out null, 23 [REQ_DLY-2] side 1 ; Discard unused bits, wait for data preset time + wait 1 gpio ACK side 1 ; Wait for ACK to be inactive + wait 0 gpio ACK side 0 ; Assert REQ, wait for ACK low + +; Read from SCSI bus using sync or async handshake. +; Data is returned as 32-bit words: +; - bit 0: always zero +; - bits 1-8: data byte +; - bit 9: parity bit +; - bits 10-31: lookup table address +; Lookup table address should be loaded into register Y. +; One dummy word should be written to TX fifo for every byte to receive. +.program scsi_accel_read + .side_set 1 + + pull block side 1 ; Pull from TX fifo for counting bytes and pacing sync mode + wait 1 gpio ACK side 1 ; Wait for ACK high + in null, 1 side 0 ; Zero bit because lookup table entries are 16-bit + wait 0 gpio ACK side 0 ; Assert REQ, wait for ACK low + in pins, 9 side 1 ; Deassert REQ, read GPIO + in y, 22 side 1 ; Copy parity lookup table address + +; Data state machine for synchronous writes. +; Takes the lowest 9 bits of each 32 bit word and writes them to bus with REQ pulse. +; The delay times will be rewritten by C code to match the negotiated SCSI sync speed. +; +; Shifts one bit to ISR per every byte transmitted. This is used to control the transfer +; pace, the RX fifo acts as a counter to keep track of unacknowledged bytes. The C code +; can set the syncOffset by changing autopush threshold, e.g. threshold 3 = 12 bytes offset. +.program scsi_sync_write + .side_set 1 + + out pins, 9 [0] side 1 ; Write data and parity bit, wait for deskew delay + out null, 23 [0] side 0 ; Assert REQ, wait for assert time + in null, 1 [0] side 1 ; Deassert REQ, wait for transfer period, wait for space in ACK buffer + +; Data pacing state machine for synchronous writes. +; Takes one bit from ISR on every falling edge of ACK. +; The C code should set autopull threshold to match scsi_sync_write autopush threshold. +; System DMA will then move words from scsi_sync_write RX fifo to scsi_sync_write_pacer TX fifo. +.program scsi_sync_write_pacer + wait 1 gpio ACK + wait 0 gpio ACK ; Wait for falling edge on ACK + out null, 1 ; Let scsi_sync_write send one more byte + +; Data pacing state machine for synchronous reads. +; The delay times will be rewritten by C code to match the negotiated SCSI sync speed. +; Number of bytes to receive minus one should be loaded into register X. +; In synchronous mode this generates the REQ pulses and dummy words. +; In asynchronous mode it just generates dummy words to feed to scsi_accel_read. +.program scsi_sync_read_pacer + .side_set 1 + +start: + push block [0] side 1 ; Send dummy word to scsi_accel_read, wait for transfer period + jmp x-- start [0] side 0 ; Assert REQ, wait for assert time + +finish: + jmp finish [0] side 1 + +; Parity checker for reads from SCSI bus. +; Receives 16-bit words from g_scsi_parity_check_lookup +; Bottom 8 bits are the data byte, which is passed to output FIFO +; The 9th bit is parity valid bit, which is 1 for valid and 0 for parity error. +.program scsi_read_parity +parity_valid: + out isr, 8 ; Take the 8 data bits for passing to RX fifo + push block ; Push the data to RX fifo + out x, 24 ; Take the parity valid bit, and the rest of 32-bit word + jmp x-- parity_valid ; If parity valid bit is 1, repeat from start + irq set 0 ; Parity error, set interrupt flag diff --git a/lib/ZuluSCSI_platform_RP2040/scsi_accel_RP2040.pio.h b/lib/ZuluSCSI_platform_RP2040/scsi_accel_RP2040.pio.h new file mode 100644 index 00000000..38dae6a0 --- /dev/null +++ b/lib/ZuluSCSI_platform_RP2040/scsi_accel_RP2040.pio.h @@ -0,0 +1,225 @@ +// -------------------------------------------------- // +// This file is autogenerated by pioasm; do not edit! // +// -------------------------------------------------- // + +#pragma once + +#if !PICO_NO_HARDWARE +#include "hardware/pio.h" +#endif + +// ----------- // +// scsi_parity // +// ----------- // + +#define scsi_parity_wrap_target 0 +#define scsi_parity_wrap 3 + +static const uint16_t scsi_parity_program_instructions[] = { + // .wrap_target + 0x80a0, // 0: pull block + 0x4061, // 1: in null, 1 + 0x40e8, // 2: in osr, 8 + 0x4037, // 3: in x, 23 + // .wrap +}; + +#if !PICO_NO_HARDWARE +static const struct pio_program scsi_parity_program = { + .instructions = scsi_parity_program_instructions, + .length = 4, + .origin = -1, +}; + +static inline pio_sm_config scsi_parity_program_get_default_config(uint offset) { + pio_sm_config c = pio_get_default_sm_config(); + sm_config_set_wrap(&c, offset + scsi_parity_wrap_target, offset + scsi_parity_wrap); + return c; +} +#endif + +// ---------------------- // +// scsi_accel_async_write // +// ---------------------- // + +#define scsi_accel_async_write_wrap_target 0 +#define scsi_accel_async_write_wrap 4 + +static const uint16_t scsi_accel_async_write_program_instructions[] = { + // .wrap_target + 0x90e0, // 0: pull ifempty block side 1 + 0x7009, // 1: out pins, 9 side 1 + 0x7577, // 2: out null, 23 side 1 [5] + 0x308a, // 3: wait 1 gpio, 10 side 1 + 0x200a, // 4: wait 0 gpio, 10 side 0 + // .wrap +}; + +#if !PICO_NO_HARDWARE +static const struct pio_program scsi_accel_async_write_program = { + .instructions = scsi_accel_async_write_program_instructions, + .length = 5, + .origin = -1, +}; + +static inline pio_sm_config scsi_accel_async_write_program_get_default_config(uint offset) { + pio_sm_config c = pio_get_default_sm_config(); + sm_config_set_wrap(&c, offset + scsi_accel_async_write_wrap_target, offset + scsi_accel_async_write_wrap); + sm_config_set_sideset(&c, 1, false, false); + return c; +} +#endif + +// --------------- // +// scsi_accel_read // +// --------------- // + +#define scsi_accel_read_wrap_target 0 +#define scsi_accel_read_wrap 5 + +static const uint16_t scsi_accel_read_program_instructions[] = { + // .wrap_target + 0x90a0, // 0: pull block side 1 + 0x308a, // 1: wait 1 gpio, 10 side 1 + 0x4061, // 2: in null, 1 side 0 + 0x200a, // 3: wait 0 gpio, 10 side 0 + 0x5009, // 4: in pins, 9 side 1 + 0x5056, // 5: in y, 22 side 1 + // .wrap +}; + +#if !PICO_NO_HARDWARE +static const struct pio_program scsi_accel_read_program = { + .instructions = scsi_accel_read_program_instructions, + .length = 6, + .origin = -1, +}; + +static inline pio_sm_config scsi_accel_read_program_get_default_config(uint offset) { + pio_sm_config c = pio_get_default_sm_config(); + sm_config_set_wrap(&c, offset + scsi_accel_read_wrap_target, offset + scsi_accel_read_wrap); + sm_config_set_sideset(&c, 1, false, false); + return c; +} +#endif + +// --------------- // +// scsi_sync_write // +// --------------- // + +#define scsi_sync_write_wrap_target 0 +#define scsi_sync_write_wrap 2 + +static const uint16_t scsi_sync_write_program_instructions[] = { + // .wrap_target + 0x7009, // 0: out pins, 9 side 1 + 0x6077, // 1: out null, 23 side 0 + 0x5061, // 2: in null, 1 side 1 + // .wrap +}; + +#if !PICO_NO_HARDWARE +static const struct pio_program scsi_sync_write_program = { + .instructions = scsi_sync_write_program_instructions, + .length = 3, + .origin = -1, +}; + +static inline pio_sm_config scsi_sync_write_program_get_default_config(uint offset) { + pio_sm_config c = pio_get_default_sm_config(); + sm_config_set_wrap(&c, offset + scsi_sync_write_wrap_target, offset + scsi_sync_write_wrap); + sm_config_set_sideset(&c, 1, false, false); + return c; +} +#endif + +// --------------------- // +// scsi_sync_write_pacer // +// --------------------- // + +#define scsi_sync_write_pacer_wrap_target 0 +#define scsi_sync_write_pacer_wrap 2 + +static const uint16_t scsi_sync_write_pacer_program_instructions[] = { + // .wrap_target + 0x208a, // 0: wait 1 gpio, 10 + 0x200a, // 1: wait 0 gpio, 10 + 0x6061, // 2: out null, 1 + // .wrap +}; + +#if !PICO_NO_HARDWARE +static const struct pio_program scsi_sync_write_pacer_program = { + .instructions = scsi_sync_write_pacer_program_instructions, + .length = 3, + .origin = -1, +}; + +static inline pio_sm_config scsi_sync_write_pacer_program_get_default_config(uint offset) { + pio_sm_config c = pio_get_default_sm_config(); + sm_config_set_wrap(&c, offset + scsi_sync_write_pacer_wrap_target, offset + scsi_sync_write_pacer_wrap); + return c; +} +#endif + +// -------------------- // +// scsi_sync_read_pacer // +// -------------------- // + +#define scsi_sync_read_pacer_wrap_target 0 +#define scsi_sync_read_pacer_wrap 2 + +static const uint16_t scsi_sync_read_pacer_program_instructions[] = { + // .wrap_target + 0x9020, // 0: push block side 1 + 0x0040, // 1: jmp x--, 0 side 0 + 0x1002, // 2: jmp 2 side 1 + // .wrap +}; + +#if !PICO_NO_HARDWARE +static const struct pio_program scsi_sync_read_pacer_program = { + .instructions = scsi_sync_read_pacer_program_instructions, + .length = 3, + .origin = -1, +}; + +static inline pio_sm_config scsi_sync_read_pacer_program_get_default_config(uint offset) { + pio_sm_config c = pio_get_default_sm_config(); + sm_config_set_wrap(&c, offset + scsi_sync_read_pacer_wrap_target, offset + scsi_sync_read_pacer_wrap); + sm_config_set_sideset(&c, 1, false, false); + return c; +} +#endif + +// ---------------- // +// scsi_read_parity // +// ---------------- // + +#define scsi_read_parity_wrap_target 0 +#define scsi_read_parity_wrap 4 + +static const uint16_t scsi_read_parity_program_instructions[] = { + // .wrap_target + 0x60c8, // 0: out isr, 8 + 0x8020, // 1: push block + 0x6038, // 2: out x, 24 + 0x0040, // 3: jmp x--, 0 + 0xc000, // 4: irq nowait 0 + // .wrap +}; + +#if !PICO_NO_HARDWARE +static const struct pio_program scsi_read_parity_program = { + .instructions = scsi_read_parity_program_instructions, + .length = 5, + .origin = -1, +}; + +static inline pio_sm_config scsi_read_parity_program_get_default_config(uint offset) { + pio_sm_config c = pio_get_default_sm_config(); + sm_config_set_wrap(&c, offset + scsi_read_parity_wrap_target, offset + scsi_read_parity_wrap); + return c; +} +#endif + diff --git a/lib/ZuluSCSI_platform_RP2040/scsi_accel_host.cpp b/lib/ZuluSCSI_platform_RP2040/scsi_accel_host.cpp index 9c61ff4b..1a65343d 100644 --- a/lib/ZuluSCSI_platform_RP2040/scsi_accel_host.cpp +++ b/lib/ZuluSCSI_platform_RP2040/scsi_accel_host.cpp @@ -24,13 +24,17 @@ #include "scsi_accel_host.h" #include "ZuluSCSI_platform.h" #include "ZuluSCSI_log.h" -#include "scsi_accel_host.pio.h" #include #include #include #include #include +#ifdef ZULUSCSI_RP2040 +#include "scsi_accel_host_Pico.pio.h" +#else +#include "scsi_accel_host_RP2040.pio.h" +#endif #ifdef PLATFORM_HAS_INITIATOR_MODE #define SCSI_PIO pio0 diff --git a/lib/ZuluSCSI_platform_RP2040/scsi_accel_host.pio b/lib/ZuluSCSI_platform_RP2040/scsi_accel_host_Pico.pio similarity index 100% rename from lib/ZuluSCSI_platform_RP2040/scsi_accel_host.pio rename to lib/ZuluSCSI_platform_RP2040/scsi_accel_host_Pico.pio diff --git a/lib/ZuluSCSI_platform_RP2040/scsi_accel_host.pio.h b/lib/ZuluSCSI_platform_RP2040/scsi_accel_host_Pico.pio.h similarity index 100% rename from lib/ZuluSCSI_platform_RP2040/scsi_accel_host.pio.h rename to lib/ZuluSCSI_platform_RP2040/scsi_accel_host_Pico.pio.h diff --git a/lib/ZuluSCSI_platform_RP2040/scsi_accel_host_RP2040.pio b/lib/ZuluSCSI_platform_RP2040/scsi_accel_host_RP2040.pio new file mode 100644 index 00000000..c279b5a8 --- /dev/null +++ b/lib/ZuluSCSI_platform_RP2040/scsi_accel_host_RP2040.pio @@ -0,0 +1,46 @@ +; ZuluSCSI™ - Copyright (c) 2022 Rabbit Hole Computing™ +; +; ZuluSCSI™ firmware is licensed under the GPL version 3 or any later version.  +; +; https://www.gnu.org/licenses/gpl-3.0.html +; ---- +; This program is free software: you can redistribute it and/or modify +; it under the terms of the GNU General Public License as published by +; the Free Software Foundation, either version 3 of the License, or +; (at your option) any later version.  +; +; This program is distributed in the hope that it will be useful, +; but WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the +; GNU General Public License for more details.  +; +; You should have received a copy of the GNU General Public License +; along with this program.  If not, see . + + +; RP2040 PIO program for accelerating SCSI initiator / host function +; Run "pioasm scsi_accel_host.pio scsi_accel_host.pio.h" to regenerate the C header from this. +; GPIO mapping: +; - 0-7: DB0-DB7 +; - 8: DBP +; Side set is ACK pin + +.define REQ 9 +.define ACK 10 + +; Read from SCSI bus using asynchronous handshake. +; Data is returned as 16-bit words that contain the 8 data bits + 1 parity bit. +; Number of bytes to receive minus 1 should be written to TX fifo. +; Number of bytes to receive must be divisible by 2. +.program scsi_host_async_read + .side_set 1 + + pull block side 1 ; Get number of bytes to receive + mov x, osr side 1 ; Store to counter X + +start: + wait 0 gpio REQ side 1 ; Wait for REQ low + in pins, 9 side 0 ; Assert ACK, read GPIO + in null, 7 side 0 ; Padding bits + wait 1 gpio REQ side 0 ; Wait for REQ high + jmp x-- start side 1 ; Deassert ACK, decrement byte count and jump to start diff --git a/lib/ZuluSCSI_platform_RP2040/scsi_accel_host_RP2040.pio.h b/lib/ZuluSCSI_platform_RP2040/scsi_accel_host_RP2040.pio.h new file mode 100644 index 00000000..ba286f2f --- /dev/null +++ b/lib/ZuluSCSI_platform_RP2040/scsi_accel_host_RP2040.pio.h @@ -0,0 +1,44 @@ +// -------------------------------------------------- // +// This file is autogenerated by pioasm; do not edit! // +// -------------------------------------------------- // + +#pragma once + +#if !PICO_NO_HARDWARE +#include "hardware/pio.h" +#endif + +// -------------------- // +// scsi_host_async_read // +// -------------------- // + +#define scsi_host_async_read_wrap_target 0 +#define scsi_host_async_read_wrap 6 + +static const uint16_t scsi_host_async_read_program_instructions[] = { + // .wrap_target + 0x90a0, // 0: pull block side 1 + 0xb027, // 1: mov x, osr side 1 + 0x3009, // 2: wait 0 gpio, 9 side 1 + 0x4009, // 3: in pins, 9 side 0 + 0x4067, // 4: in null, 7 side 0 + 0x2089, // 5: wait 1 gpio, 9 side 0 + 0x1042, // 6: jmp x--, 2 side 1 + // .wrap +}; + +#if !PICO_NO_HARDWARE +static const struct pio_program scsi_host_async_read_program = { + .instructions = scsi_host_async_read_program_instructions, + .length = 7, + .origin = -1, +}; + +static inline pio_sm_config scsi_host_async_read_program_get_default_config(uint offset) { + pio_sm_config c = pio_get_default_sm_config(); + sm_config_set_wrap(&c, offset + scsi_host_async_read_wrap_target, offset + scsi_host_async_read_wrap); + sm_config_set_sideset(&c, 1, false, false); + return c; +} +#endif + diff --git a/lib/ZuluSCSI_platform_RP2040/sd_card_sdio.cpp b/lib/ZuluSCSI_platform_RP2040/sd_card_sdio.cpp index 4a7f41bd..5599362e 100644 --- a/lib/ZuluSCSI_platform_RP2040/sd_card_sdio.cpp +++ b/lib/ZuluSCSI_platform_RP2040/sd_card_sdio.cpp @@ -26,7 +26,7 @@ #ifdef SD_USE_SDIO #include "ZuluSCSI_log.h" -#include "rp2040_sdio.h" +#include "sdio.h" #include #include #include diff --git a/lib/ZuluSCSI_platform_RP2040/rp2040_sdio.cpp b/lib/ZuluSCSI_platform_RP2040/sdio.cpp similarity index 99% rename from lib/ZuluSCSI_platform_RP2040/rp2040_sdio.cpp rename to lib/ZuluSCSI_platform_RP2040/sdio.cpp index e8d7b748..8690b2bb 100644 --- a/lib/ZuluSCSI_platform_RP2040/rp2040_sdio.cpp +++ b/lib/ZuluSCSI_platform_RP2040/sdio.cpp @@ -29,17 +29,19 @@ // https://www.sdcard.org/downloads/pls/ // "SDIO Physical Layer Simplified Specification Version 8.00" -#include "rp2040_sdio.h" +#include "sdio.h" #include #include #include #include #include -#ifdef ZULUSCSI_BS2 -#include "rp2040_sdio_BS2.pio.h" +#ifdef ZULUSCSI_PICO +#include "sdio_Pico.pio.h" +#elif defined(ZULUSCSI_BS2) +#include "sdio_BS2.pio.h" #else -#include "rp2040_sdio.pio.h" +#include "sdio_RP2040.pio.h" #endif #define SDIO_PIO pio1 diff --git a/lib/ZuluSCSI_platform_RP2040/rp2040_sdio.h b/lib/ZuluSCSI_platform_RP2040/sdio.h similarity index 100% rename from lib/ZuluSCSI_platform_RP2040/rp2040_sdio.h rename to lib/ZuluSCSI_platform_RP2040/sdio.h diff --git a/lib/ZuluSCSI_platform_RP2040/rp2040_sdio_BS2.pio b/lib/ZuluSCSI_platform_RP2040/sdio_BS2.pio similarity index 100% rename from lib/ZuluSCSI_platform_RP2040/rp2040_sdio_BS2.pio rename to lib/ZuluSCSI_platform_RP2040/sdio_BS2.pio diff --git a/lib/ZuluSCSI_platform_RP2040/rp2040_sdio_BS2.pio.h b/lib/ZuluSCSI_platform_RP2040/sdio_BS2.pio.h similarity index 100% rename from lib/ZuluSCSI_platform_RP2040/rp2040_sdio_BS2.pio.h rename to lib/ZuluSCSI_platform_RP2040/sdio_BS2.pio.h diff --git a/lib/ZuluSCSI_platform_RP2040/sdio_Pico.pio b/lib/ZuluSCSI_platform_RP2040/sdio_Pico.pio new file mode 100644 index 00000000..21d67332 --- /dev/null +++ b/lib/ZuluSCSI_platform_RP2040/sdio_Pico.pio @@ -0,0 +1,164 @@ +; ZuluSCSI™ - Copyright (c) 2022 Rabbit Hole Computing™ +; +; ZuluSCSI™ firmware is licensed under the GPL version 3 or any later version.  +; +; https://www.gnu.org/licenses/gpl-3.0.html +; ---- +; This program is free software: you can redistribute it and/or modify +; it under the terms of the GNU General Public License as published by +; the Free Software Foundation, either version 3 of the License, or +; (at your option) any later version.  +; +; This program is distributed in the hope that it will be useful, +; but WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the +; GNU General Public License for more details.  +; +; You should have received a copy of the GNU General Public License +; along with this program.  If not, see . + +; RP2040 PIO program for implementing SD card access in SDIO mode +; Run "pioasm rp2040_sdio.pio rp2040_sdio.pio.h" to regenerate the C header from this. + +; The RP2040 official work-in-progress code at +; https://github.com/raspberrypi/pico-extras/tree/master/src/rp2_common/pico_sd_card +; may be useful reference, but this is independent implementation. +; +; For official SDIO specifications, refer to: +; https://www.sdcard.org/downloads/pls/ +; "SDIO Physical Layer Simplified Specification Version 8.00" + +; Clock settings +; For 3.3V communication the available speeds are: +; - Default speed: max. 25 MHz clock +; - High speed: max. 50 MHz clock +; +; From the default RP2040 clock speed of 125 MHz, the closest dividers +; are 3 for 41.7 MHz and 5 for 25 MHz. The CPU can apply further divider +; through state machine registers for the initial handshake. +; +; Because data is written on the falling edge and read on the rising +; edge, it is preferrable to have a long 0 state and short 1 state. +;.define CLKDIV 3 +.define CLKDIV 5 +.define D0 ((CLKDIV + 1) / 2 - 1) +.define D1 (CLKDIV/2 - 1) +.define SDIO_CLK_GPIO 10 + +; State machine 0 is used to: +; - generate continuous clock on SDIO_CLK +; - send CMD packets +; - receive response packets +; +; Pin mapping for this state machine: +; - Sideset : CLK +; - IN/OUT/SET : CMD +; - JMP_PIN : CMD +; +; The commands to send are put on TX fifo and must have two words: +; Word 0 bits 31-24: Number of bits in command minus one (usually 47) +; Word 0 bits 23-00: First 24 bits of the command packet, shifted out MSB first +; Word 1 bits 31-08: Last 24 bits of the command packet, shifted out MSB first +; Word 1 bits 07-00: Number of bits in response minus one (usually 47), or 0 if no response +; +; The response is put on RX fifo, starting with the MSB. +; Partial last word will be padded with zero bits at the top. +; +; The state machine EXECCTRL should be set so that STATUS indicates TX FIFO < 2 +; and that AUTOPULL and AUTOPUSH are enabled. + +.program sdio_cmd_clk + .side_set 1 + + mov OSR, NULL side 1 [D1] ; Make sure OSR is full of zeros to prevent autopull + +wait_cmd: + mov Y, !STATUS side 0 [D0] ; Check if TX FIFO has data + jmp !Y wait_cmd side 1 [D1] + +load_cmd: + out NULL, 32 side 0 [D0] ; Load first word (trigger autopull) + out X, 8 side 1 [D1] ; Number of bits to send + set pins, 1 side 0 [D0] ; Initial state of CMD is high + set pindirs, 1 side 1 [D1] ; Set SDIO_CMD as output + +send_cmd: + out pins, 1 side 0 [D0] ; Write output on falling edge of CLK + jmp X-- send_cmd side 1 [D1] + +prep_resp: + set pindirs, 0 side 0 [D0] ; Set SDIO_CMD as input + out X, 8 side 1 [D1] ; Get number of bits in response + nop side 0 [D0] ; For clock alignment + jmp !X resp_done side 1 [D1] ; Check if we expect a response + +wait_resp: + nop side 0 [D0] + jmp PIN wait_resp side 1 [D1] ; Loop until SDIO_CMD = 0 + + ; Note: input bits are read at the same time as we write CLK=0. + ; Because the host controls the clock, the read happens before + ; the card sees the falling clock edge. This gives maximum time + ; for the data bit to settle. +read_resp: + in PINS, 1 side 0 [D0] ; Read input data bit + jmp X-- read_resp side 1 [D1] ; Loop to receive all data bits + +resp_done: + push side 0 [D0] ; Push the remaining part of response + +; State machine 1 is used to send and receive data blocks. +; Pin mapping for this state machine: +; - IN / OUT: SDIO_D0-D3 +; - GPIO defined at beginning of this file: SDIO_CLK + +; Data reception program +; This program will wait for initial start of block token and then +; receive a data block. The application must set number of nibbles +; to receive minus 1 to Y register before running this program. +.program sdio_data_rx + +wait_start: + mov X, Y ; Reinitialize number of nibbles to receive + wait 0 pin 0 ; Wait for zero state on D0 + wait 1 gpio SDIO_CLK_GPIO [CLKDIV-1] ; Wait for rising edge and then whole clock cycle + +rx_data: + in PINS, 4 [CLKDIV-2] ; Read nibble + jmp X--, rx_data + +; Data transmission program +; +; Before running this program, pindirs should be set as output +; and register X should be initialized with the number of nibbles +; to send minus 1 (typically 8 + 1024 + 16 + 1 - 1 = 1048) +; and register Y with the number of response bits minus 1 (typically 31). +; +; Words written to TX FIFO must be: +; - Word 0: start token 0xFFFFFFF0 +; - Word 1-128: transmitted data (512 bytes) +; - Word 129-130: CRC checksum +; - Word 131: end token 0xFFFFFFFF +; +; After the card reports idle status, RX FIFO will get a word that +; contains the D0 line response from card. + +.program sdio_data_tx + wait 0 gpio SDIO_CLK_GPIO + wait 1 gpio SDIO_CLK_GPIO [CLKDIV + D1 - 1]; Synchronize so that write occurs on falling edge + +tx_loop: + out PINS, 4 [D0] ; Write nibble and wait for whole clock cycle + jmp X-- tx_loop [D1] + + set pindirs, 0x00 [D0] ; Set data bus as input + +.wrap_target +response_loop: + in PINS, 1 [D1] ; Read D0 on rising edge + jmp Y--, response_loop [D0] + +wait_idle: + wait 1 pin 0 [D1] ; Wait for card to indicate idle condition + push [D0] ; Push the response token +.wrap \ No newline at end of file diff --git a/lib/ZuluSCSI_platform_RP2040/sdio_Pico.pio.h b/lib/ZuluSCSI_platform_RP2040/sdio_Pico.pio.h new file mode 100644 index 00000000..d4a4d0b8 --- /dev/null +++ b/lib/ZuluSCSI_platform_RP2040/sdio_Pico.pio.h @@ -0,0 +1,121 @@ +// -------------------------------------------------- // +// This file is autogenerated by pioasm; do not edit! // +// -------------------------------------------------- // + +#pragma once + +#if !PICO_NO_HARDWARE +#include "hardware/pio.h" +#endif + +// ------------ // +// sdio_cmd_clk // +// ------------ // + +#define sdio_cmd_clk_wrap_target 0 +#define sdio_cmd_clk_wrap 17 + +static const uint16_t sdio_cmd_clk_program_instructions[] = { + // .wrap_target + 0xb1e3, // 0: mov osr, null side 1 [1] + 0xa24d, // 1: mov y, !status side 0 [2] + 0x1161, // 2: jmp !y, 1 side 1 [1] + 0x6260, // 3: out null, 32 side 0 [2] + 0x7128, // 4: out x, 8 side 1 [1] + 0xe201, // 5: set pins, 1 side 0 [2] + 0xf181, // 6: set pindirs, 1 side 1 [1] + 0x6201, // 7: out pins, 1 side 0 [2] + 0x1147, // 8: jmp x--, 7 side 1 [1] + 0xe280, // 9: set pindirs, 0 side 0 [2] + 0x7128, // 10: out x, 8 side 1 [1] + 0xa242, // 11: nop side 0 [2] + 0x1131, // 12: jmp !x, 17 side 1 [1] + 0xa242, // 13: nop side 0 [2] + 0x11cd, // 14: jmp pin, 13 side 1 [1] + 0x4201, // 15: in pins, 1 side 0 [2] + 0x114f, // 16: jmp x--, 15 side 1 [1] + 0x8220, // 17: push block side 0 [2] + // .wrap +}; + +#if !PICO_NO_HARDWARE +static const struct pio_program sdio_cmd_clk_program = { + .instructions = sdio_cmd_clk_program_instructions, + .length = 18, + .origin = -1, +}; + +static inline pio_sm_config sdio_cmd_clk_program_get_default_config(uint offset) { + pio_sm_config c = pio_get_default_sm_config(); + sm_config_set_wrap(&c, offset + sdio_cmd_clk_wrap_target, offset + sdio_cmd_clk_wrap); + sm_config_set_sideset(&c, 1, false, false); + return c; +} +#endif + +// ------------ // +// sdio_data_rx // +// ------------ // + +#define sdio_data_rx_wrap_target 0 +#define sdio_data_rx_wrap 4 + +static const uint16_t sdio_data_rx_program_instructions[] = { + // .wrap_target + 0xa022, // 0: mov x, y + 0x2020, // 1: wait 0 pin, 0 + 0x248A, // 2: wait 1 gpio, 10 [4] + 0x4304, // 3: in pins, 4 [3] + 0x0043, // 4: jmp x--, 3 + // .wrap +}; + +#if !PICO_NO_HARDWARE +static const struct pio_program sdio_data_rx_program = { + .instructions = sdio_data_rx_program_instructions, + .length = 5, + .origin = -1, +}; + +static inline pio_sm_config sdio_data_rx_program_get_default_config(uint offset) { + pio_sm_config c = pio_get_default_sm_config(); + sm_config_set_wrap(&c, offset + sdio_data_rx_wrap_target, offset + sdio_data_rx_wrap); + return c; +} +#endif + +// ------------ // +// sdio_data_tx // +// ------------ // + +#define sdio_data_tx_wrap_target 5 +#define sdio_data_tx_wrap 8 + +static const uint16_t sdio_data_tx_program_instructions[] = { + 0x200A, // 0: wait 0 gpio, 10 + 0x258A, // 1: wait 1 gpio, 10 [5] + 0x6204, // 2: out pins, 4 [2] + 0x0142, // 3: jmp x--, 2 [1] + 0xe280, // 4: set pindirs, 0 [2] + // .wrap_target + 0x4101, // 5: in pins, 1 [1] + 0x0285, // 6: jmp y--, 5 [2] + 0x21a0, // 7: wait 1 pin, 0 [1] + 0x8220, // 8: push block [2] + // .wrap +}; + +#if !PICO_NO_HARDWARE +static const struct pio_program sdio_data_tx_program = { + .instructions = sdio_data_tx_program_instructions, + .length = 9, + .origin = -1, +}; + +static inline pio_sm_config sdio_data_tx_program_get_default_config(uint offset) { + pio_sm_config c = pio_get_default_sm_config(); + sm_config_set_wrap(&c, offset + sdio_data_tx_wrap_target, offset + sdio_data_tx_wrap); + return c; +} +#endif + diff --git a/lib/ZuluSCSI_platform_RP2040/rp2040_sdio.pio b/lib/ZuluSCSI_platform_RP2040/sdio_RP2040.pio similarity index 100% rename from lib/ZuluSCSI_platform_RP2040/rp2040_sdio.pio rename to lib/ZuluSCSI_platform_RP2040/sdio_RP2040.pio diff --git a/lib/ZuluSCSI_platform_RP2040/rp2040_sdio.pio.h b/lib/ZuluSCSI_platform_RP2040/sdio_RP2040.pio.h similarity index 100% rename from lib/ZuluSCSI_platform_RP2040/rp2040_sdio.pio.h rename to lib/ZuluSCSI_platform_RP2040/sdio_RP2040.pio.h diff --git a/platformio.ini b/platformio.ini index e084f791..e02291b8 100644 --- a/platformio.ini +++ b/platformio.ini @@ -1,7 +1,7 @@ ; PlatformIO Project Configuration File https://docs.platformio.org/page/projectconf.html [platformio] -default_envs = ZuluSCSIv1_0, ZuluSCSIv1_0_mini, ZuluSCSIv1_1, ZuluSCSI_RP2040, ZuluSCSI_RP2040_Audio, ZuluSCSI_BS2 +default_envs = ZuluSCSIv1_0, ZuluSCSIv1_0_mini, ZuluSCSIv1_1, ZuluSCSI_RP2040, ZuluSCSI_RP2040_Audio, ZuluSCSI_Pico, ZuluSCSI_BS2 ; Example platform to serve as a base for porting efforts [env:template] @@ -109,6 +109,22 @@ build_flags = -DENABLE_AUDIO_OUTPUT -DLOGBUFSIZE=8192 +; Variant of RP2040 platform, based on Raspberry Pico board and a carrier PCB +; Part of the ZuluSCSI_RP2040 platform, but with different pins. +[env:ZuluSCSI_Pico] +extends = env:ZuluSCSI_RP2040 +build_flags = + -O2 -Isrc -ggdb -g3 + -Wall -Wno-sign-compare -Wno-ignored-qualifiers + -DSPI_DRIVER_SELECT=3 + -DSD_CHIP_SELECT_MODE=2 + -DENABLE_DEDICATED_SPI=1 + -DHAS_SDIO_CLASS + -DUSE_ARDUINO=1 + -DZULUSCSI_V2_0 + -DZULUSCSI_PICO + + ; Variant of RP2040 platform, based on Raspberry Pico board and a carrier PCB ; Differs in pinout from ZuluSCSI_RP2040 platform, but shares most of the code. [env:ZuluSCSI_BS2] diff --git a/src/ZuluSCSI_config.h b/src/ZuluSCSI_config.h index cb7ada83..676ab82c 100644 --- a/src/ZuluSCSI_config.h +++ b/src/ZuluSCSI_config.h @@ -27,8 +27,8 @@ #include // Use variables for version number -#define FW_VER_NUM "23.08.08" -#define FW_VER_SUFFIX "devel" +#define FW_VER_NUM "23.08.21" +#define FW_VER_SUFFIX "pico" #define ZULU_FW_VERSION FW_VER_NUM "-" FW_VER_SUFFIX // Configuration and log file paths From c3b877ce708e226527c81198904fa8e2daf55d6c Mon Sep 17 00:00:00 2001 From: Morio Date: Mon, 21 Aug 2023 14:34:20 -0700 Subject: [PATCH 2/5] SCSI interface working Getting normal transfer rates for an RP2040 on the SCSI interface. Added a flag to disable the SWO pin (DISABLE_SWO). Not sure if the define should be in the platformio.ini file or in the ZuluSCSI_platform_RP2040 library. --- lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform.cpp | 3 +++ .../ZuluSCSI_platform_gpio_Pico.h | 2 +- lib/ZuluSCSI_platform_RP2040/scsi_accel_Pico.pio | 4 ++-- lib/ZuluSCSI_platform_RP2040/scsi_accel_Pico.pio.h | 12 ++++++------ platformio.ini | 2 +- 5 files changed, 13 insertions(+), 10 deletions(-) diff --git a/lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform.cpp b/lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform.cpp index 408c1107..ad4dac87 100644 --- a/lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform.cpp +++ b/lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform.cpp @@ -132,10 +132,13 @@ void platform_init() delay(10); #endif +#ifndef DISABLE_SWO /* Initialize logging to SWO pin (UART0) */ gpio_conf(SWO_PIN, GPIO_FUNC_UART,false,false, true, false, true); uart_init(uart0, 1000000); g_uart_initialized = true; +#endif + mbed_set_error_hook(mbed_error_hook); logmsg("Platform: ", g_platform_name); diff --git a/lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform_gpio_Pico.h b/lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform_gpio_Pico.h index ec590409..2b7acd8e 100644 --- a/lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform_gpio_Pico.h +++ b/lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform_gpio_Pico.h @@ -70,7 +70,7 @@ #define SCSI_IN_REQ 17 // Status LED pins -#define LED_PIN 15 +#define LED_PIN 16 #define LED_ON() sio_hw->gpio_set = 1 << LED_PIN #define LED_OFF() sio_hw->gpio_clr = 1 << LED_PIN diff --git a/lib/ZuluSCSI_platform_RP2040/scsi_accel_Pico.pio b/lib/ZuluSCSI_platform_RP2040/scsi_accel_Pico.pio index 2f835dfe..e199463c 100644 --- a/lib/ZuluSCSI_platform_RP2040/scsi_accel_Pico.pio +++ b/lib/ZuluSCSI_platform_RP2040/scsi_accel_Pico.pio @@ -25,8 +25,8 @@ ; - 8: DBP ; Side set is REQ pin -.define REQ 9 -.define ACK 10 +.define REQ 17 +.define ACK 26 ; Delay from data setup to REQ assertion. ; deskew delay + cable skew delay = 55 ns minimum diff --git a/lib/ZuluSCSI_platform_RP2040/scsi_accel_Pico.pio.h b/lib/ZuluSCSI_platform_RP2040/scsi_accel_Pico.pio.h index 38dae6a0..31f91a65 100644 --- a/lib/ZuluSCSI_platform_RP2040/scsi_accel_Pico.pio.h +++ b/lib/ZuluSCSI_platform_RP2040/scsi_accel_Pico.pio.h @@ -50,8 +50,8 @@ static const uint16_t scsi_accel_async_write_program_instructions[] = { 0x90e0, // 0: pull ifempty block side 1 0x7009, // 1: out pins, 9 side 1 0x7577, // 2: out null, 23 side 1 [5] - 0x308a, // 3: wait 1 gpio, 10 side 1 - 0x200a, // 4: wait 0 gpio, 10 side 0 + 0x309a, // 3: wait 1 gpio, 26 side 1 + 0x201a, // 4: wait 0 gpio, 26 side 0 // .wrap }; @@ -80,9 +80,9 @@ static inline pio_sm_config scsi_accel_async_write_program_get_default_config(ui static const uint16_t scsi_accel_read_program_instructions[] = { // .wrap_target 0x90a0, // 0: pull block side 1 - 0x308a, // 1: wait 1 gpio, 10 side 1 + 0x309a, // 1: wait 1 gpio, 26 side 1 0x4061, // 2: in null, 1 side 0 - 0x200a, // 3: wait 0 gpio, 10 side 0 + 0x201a, // 3: wait 0 gpio, 26 side 0 0x5009, // 4: in pins, 9 side 1 0x5056, // 5: in y, 22 side 1 // .wrap @@ -142,8 +142,8 @@ static inline pio_sm_config scsi_sync_write_program_get_default_config(uint offs static const uint16_t scsi_sync_write_pacer_program_instructions[] = { // .wrap_target - 0x208a, // 0: wait 1 gpio, 10 - 0x200a, // 1: wait 0 gpio, 10 + 0x209a, // 0: wait 1 gpio, 26 + 0x201a, // 1: wait 0 gpio, 26 0x6061, // 2: out null, 1 // .wrap }; diff --git a/platformio.ini b/platformio.ini index e02291b8..ed78a98b 100644 --- a/platformio.ini +++ b/platformio.ini @@ -121,8 +121,8 @@ build_flags = -DENABLE_DEDICATED_SPI=1 -DHAS_SDIO_CLASS -DUSE_ARDUINO=1 - -DZULUSCSI_V2_0 -DZULUSCSI_PICO + -DDISABLE_SWO ; Variant of RP2040 platform, based on Raspberry Pico board and a carrier PCB From 1db245af04a57265f68d3bed3e7b94eb153c97e2 Mon Sep 17 00:00:00 2001 From: Morio Date: Tue, 22 Aug 2023 11:00:43 -0700 Subject: [PATCH 3/5] The last of the renaming Missed adding target to scsi_accel files to be explicit between host and target scsi_accel files. --- lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform.cpp | 2 +- lib/ZuluSCSI_platform_RP2040/scsiPhy.cpp | 2 +- .../{scsi_accel.cpp => scsi_accel_target.cpp} | 8 ++++---- .../{scsi_accel.h => scsi_accel_target.h} | 0 .../{scsi_accel_BS2.pio => scsi_accel_target_BS2.pio} | 0 .../{scsi_accel_BS2.pio.h => scsi_accel_target_BS2.pio.h} | 0 .../{scsi_accel_Pico.pio => scsi_accel_target_Pico.pio} | 0 ...scsi_accel_Pico.pio.h => scsi_accel_target_Pico.pio.h} | 0 ...scsi_accel_RP2040.pio => scsi_accel_target_RP2040.pio} | 0 ..._accel_RP2040.pio.h => scsi_accel_target_RP2040.pio.h} | 0 10 files changed, 6 insertions(+), 6 deletions(-) rename lib/ZuluSCSI_platform_RP2040/{scsi_accel.cpp => scsi_accel_target.cpp} (99%) rename lib/ZuluSCSI_platform_RP2040/{scsi_accel.h => scsi_accel_target.h} (100%) rename lib/ZuluSCSI_platform_RP2040/{scsi_accel_BS2.pio => scsi_accel_target_BS2.pio} (100%) rename lib/ZuluSCSI_platform_RP2040/{scsi_accel_BS2.pio.h => scsi_accel_target_BS2.pio.h} (100%) rename lib/ZuluSCSI_platform_RP2040/{scsi_accel_Pico.pio => scsi_accel_target_Pico.pio} (100%) rename lib/ZuluSCSI_platform_RP2040/{scsi_accel_Pico.pio.h => scsi_accel_target_Pico.pio.h} (100%) rename lib/ZuluSCSI_platform_RP2040/{scsi_accel_RP2040.pio => scsi_accel_target_RP2040.pio} (100%) rename lib/ZuluSCSI_platform_RP2040/{scsi_accel_RP2040.pio.h => scsi_accel_target_RP2040.pio.h} (100%) diff --git a/lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform.cpp b/lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform.cpp index ad4dac87..125bee40 100644 --- a/lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform.cpp +++ b/lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform.cpp @@ -38,7 +38,7 @@ #include #include #include "audio.h" -#include "scsi_accel.h" +#include "scsi_accel_target.h" extern "C" { diff --git a/lib/ZuluSCSI_platform_RP2040/scsiPhy.cpp b/lib/ZuluSCSI_platform_RP2040/scsiPhy.cpp index d5f0e6f8..c8490bf5 100644 --- a/lib/ZuluSCSI_platform_RP2040/scsiPhy.cpp +++ b/lib/ZuluSCSI_platform_RP2040/scsiPhy.cpp @@ -29,7 +29,7 @@ #include "ZuluSCSI_log.h" #include "ZuluSCSI_log_trace.h" #include "ZuluSCSI_config.h" -#include "scsi_accel.h" +#include "scsi_accel_target.h" #include "hardware/structs/iobank0.h" #include diff --git a/lib/ZuluSCSI_platform_RP2040/scsi_accel.cpp b/lib/ZuluSCSI_platform_RP2040/scsi_accel_target.cpp similarity index 99% rename from lib/ZuluSCSI_platform_RP2040/scsi_accel.cpp rename to lib/ZuluSCSI_platform_RP2040/scsi_accel_target.cpp index 839188f3..c6800879 100644 --- a/lib/ZuluSCSI_platform_RP2040/scsi_accel.cpp +++ b/lib/ZuluSCSI_platform_RP2040/scsi_accel_target.cpp @@ -29,7 +29,7 @@ #include "ZuluSCSI_platform.h" #include "ZuluSCSI_log.h" -#include "scsi_accel.h" +#include "scsi_accel_target.h" #include #include #include @@ -39,11 +39,11 @@ #include #ifdef ZULUSCSI_PICO -#include "scsi_accel_Pico.pio.h" +#include "scsi_accel_target_Pico.pio.h" #elif defined(ZULUSCSI_BS2) -#include "scsi_accel_BS2.pio.h" +#include "scsi_accel_target_BS2.pio.h" #else -#include "scsi_accel_RP2040.pio.h" +#include "scsi_accel_target_RP2040.pio.h" #endif // SCSI bus write acceleration uses up to 3 PIO state machines: diff --git a/lib/ZuluSCSI_platform_RP2040/scsi_accel.h b/lib/ZuluSCSI_platform_RP2040/scsi_accel_target.h similarity index 100% rename from lib/ZuluSCSI_platform_RP2040/scsi_accel.h rename to lib/ZuluSCSI_platform_RP2040/scsi_accel_target.h diff --git a/lib/ZuluSCSI_platform_RP2040/scsi_accel_BS2.pio b/lib/ZuluSCSI_platform_RP2040/scsi_accel_target_BS2.pio similarity index 100% rename from lib/ZuluSCSI_platform_RP2040/scsi_accel_BS2.pio rename to lib/ZuluSCSI_platform_RP2040/scsi_accel_target_BS2.pio diff --git a/lib/ZuluSCSI_platform_RP2040/scsi_accel_BS2.pio.h b/lib/ZuluSCSI_platform_RP2040/scsi_accel_target_BS2.pio.h similarity index 100% rename from lib/ZuluSCSI_platform_RP2040/scsi_accel_BS2.pio.h rename to lib/ZuluSCSI_platform_RP2040/scsi_accel_target_BS2.pio.h diff --git a/lib/ZuluSCSI_platform_RP2040/scsi_accel_Pico.pio b/lib/ZuluSCSI_platform_RP2040/scsi_accel_target_Pico.pio similarity index 100% rename from lib/ZuluSCSI_platform_RP2040/scsi_accel_Pico.pio rename to lib/ZuluSCSI_platform_RP2040/scsi_accel_target_Pico.pio diff --git a/lib/ZuluSCSI_platform_RP2040/scsi_accel_Pico.pio.h b/lib/ZuluSCSI_platform_RP2040/scsi_accel_target_Pico.pio.h similarity index 100% rename from lib/ZuluSCSI_platform_RP2040/scsi_accel_Pico.pio.h rename to lib/ZuluSCSI_platform_RP2040/scsi_accel_target_Pico.pio.h diff --git a/lib/ZuluSCSI_platform_RP2040/scsi_accel_RP2040.pio b/lib/ZuluSCSI_platform_RP2040/scsi_accel_target_RP2040.pio similarity index 100% rename from lib/ZuluSCSI_platform_RP2040/scsi_accel_RP2040.pio rename to lib/ZuluSCSI_platform_RP2040/scsi_accel_target_RP2040.pio diff --git a/lib/ZuluSCSI_platform_RP2040/scsi_accel_RP2040.pio.h b/lib/ZuluSCSI_platform_RP2040/scsi_accel_target_RP2040.pio.h similarity index 100% rename from lib/ZuluSCSI_platform_RP2040/scsi_accel_RP2040.pio.h rename to lib/ZuluSCSI_platform_RP2040/scsi_accel_target_RP2040.pio.h From 6e8ce60b47687b4459af51cf5ae24730081b546e Mon Sep 17 00:00:00 2001 From: Morio Date: Tue, 12 Sep 2023 12:08:10 -0700 Subject: [PATCH 4/5] ZuluSCSI Pico firmware working Initiator mode is working, and the dip switch reading are now correct. --- .gitignore | 6 +----- lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform.cpp | 8 ++++++++ .../ZuluSCSI_platform_gpio_Pico.h | 8 ++++---- lib/ZuluSCSI_platform_RP2040/run_pioasm.sh | 9 ++++++--- lib/ZuluSCSI_platform_RP2040/scsi_accel_host.cpp | 14 +++++++++----- .../scsi_accel_host_Pico.pio | 4 ++-- .../scsi_accel_host_Pico.pio.h | 5 ++--- 7 files changed, 32 insertions(+), 22 deletions(-) diff --git a/.gitignore b/.gitignore index beaaf8a9..b9f3806a 100644 --- a/.gitignore +++ b/.gitignore @@ -1,6 +1,2 @@ .pio -.vscode/.browse.c_cpp.db* -.vscode/c_cpp_properties.json -.vscode/launch.json -.vscode/ipch -.vscode/extensions.json +.vscode diff --git a/lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform.cpp b/lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform.cpp index 125bee40..6bbf67e6 100644 --- a/lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform.cpp +++ b/lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform.cpp @@ -126,8 +126,14 @@ void platform_init() delay(10); // 10 ms delay to let pull-ups do their work +// On the ZuluSCSI Pico dbg and term readings are flipped +# ifdef ZULUSCSI_PICO + bool dbglog = gpio_get(DIP_DBGLOG); + bool termination = gpio_get(DIP_TERM); +# else bool dbglog = !gpio_get(DIP_DBGLOG); bool termination = !gpio_get(DIP_TERM); +# endif #else delay(10); #endif @@ -329,6 +335,8 @@ void platform_late_init() gpio_conf(SCSI_IN_REQ, GPIO_FUNC_SIO, true ,false, false, true, false); gpio_conf(SCSI_IN_BSY, GPIO_FUNC_SIO, true, false, false, true, false); gpio_conf(SCSI_IN_RST, GPIO_FUNC_SIO, true, false, false, true, false); + // Reinitialize OUT_RST to output mode. On RP Pico variant the pin is shared with IN_RST. + gpio_conf(SCSI_OUT_RST, GPIO_FUNC_SIO, false, false, true, true, true); gpio_conf(SCSI_OUT_SEL, GPIO_FUNC_SIO, false,false, true, true, true); gpio_conf(SCSI_OUT_ACK, GPIO_FUNC_SIO, false,false, true, true, true); gpio_conf(SCSI_OUT_ATN, GPIO_FUNC_SIO, false,false, true, true, true); diff --git a/lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform_gpio_Pico.h b/lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform_gpio_Pico.h index 2b7acd8e..3a98188e 100644 --- a/lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform_gpio_Pico.h +++ b/lib/ZuluSCSI_platform_RP2040/ZuluSCSI_platform_gpio_Pico.h @@ -65,7 +65,7 @@ // Status line inputs for initiator mode #define SCSI_IN_IO 22 -#define SCSI_IN_CD 24 +#define SCSI_IN_CD 18 #define SCSI_IN_MSG 20 #define SCSI_IN_REQ 17 @@ -102,9 +102,9 @@ // DIP switch pins #define HAS_DIP_SWITCHES -#define DIP_INITIATOR 26 -#define DIP_DBGLOG 16 -#define DIP_TERM 17 +#define DIP_INITIATOR 28 +#define DIP_DBGLOG 20 +#define DIP_TERM 18 // Other pins #define SWO_PIN 16 diff --git a/lib/ZuluSCSI_platform_RP2040/run_pioasm.sh b/lib/ZuluSCSI_platform_RP2040/run_pioasm.sh index 39c7d0b6..056ccff7 100755 --- a/lib/ZuluSCSI_platform_RP2040/run_pioasm.sh +++ b/lib/ZuluSCSI_platform_RP2040/run_pioasm.sh @@ -6,6 +6,9 @@ pioasm sdio_RP2040.pio sdio_RP2040.pio.h pioasm sdio_Pico.pio sdio_Pico.pio.h pioasm sdio_BS2.pio sdio_BS2.pio.h -pioasm scsi_accel_RP2040.pio scsi_accel.pio_RP2040.h -pioasm scsi_accel_Pico.pio scsi_accel_Pico.pio.h -pioasm scsi_accel_BS2.pio scsi_accel_BS2.pio.h +pioasm scsi_accel_target_RP2040.pio scsi_accel_target_RPP2040.pio.h +pioasm scsi_accel_target_Pico.pio scsi_accel_target_Pico.pio.h +pioasm scsi_accel_target_BS2.pio scsi_accel_target_BS2.pio.h + +pioasm scsi_accel_host_RP2040.pio scsi_accel_host_RP2040.pio.h +pioasm scsi_accel_host_Pico.pio scsi_accel_host_Pico.pio.h \ No newline at end of file diff --git a/lib/ZuluSCSI_platform_RP2040/scsi_accel_host.cpp b/lib/ZuluSCSI_platform_RP2040/scsi_accel_host.cpp index 1a65343d..13fee5f1 100644 --- a/lib/ZuluSCSI_platform_RP2040/scsi_accel_host.cpp +++ b/lib/ZuluSCSI_platform_RP2040/scsi_accel_host.cpp @@ -30,12 +30,13 @@ #include #include -#ifdef ZULUSCSI_RP2040 +#ifdef PLATFORM_HAS_INITIATOR_MODE +#ifdef ZULUSCSI_PICO #include "scsi_accel_host_Pico.pio.h" #else #include "scsi_accel_host_RP2040.pio.h" #endif -#ifdef PLATFORM_HAS_INITIATOR_MODE + #define SCSI_PIO pio0 #define SCSI_SM 0 @@ -63,14 +64,16 @@ static void scsi_accel_host_config_gpio() iobank0_hw->io[SCSI_IO_DB6].ctrl = GPIO_FUNC_SIO; iobank0_hw->io[SCSI_IO_DB7].ctrl = GPIO_FUNC_SIO; iobank0_hw->io[SCSI_IO_DBP].ctrl = GPIO_FUNC_SIO; + iobank0_hw->io[SCSI_IN_REQ].ctrl = GPIO_FUNC_SIO; iobank0_hw->io[SCSI_OUT_ACK].ctrl = GPIO_FUNC_SIO; } else if (g_scsi_host_state == SCSIHOST_READ) { // Data bus and REQ as input, ACK pin as output - pio_sm_set_pins(SCSI_PIO, SCSI_SM, 0x7FF); - pio_sm_set_consecutive_pindirs(SCSI_PIO, SCSI_SM, 0, 10, false); - pio_sm_set_consecutive_pindirs(SCSI_PIO, SCSI_SM, 10, 1, true); + pio_sm_set_pins(SCSI_PIO, SCSI_SM, SCSI_IO_DATA_MASK | 1 << SCSI_IN_REQ | 1 << SCSI_OUT_ACK); + pio_sm_set_consecutive_pindirs(SCSI_PIO, SCSI_SM, SCSI_IO_DB0, 9, false); + pio_sm_set_consecutive_pindirs(SCSI_PIO, SCSI_SM, SCSI_IN_REQ, 1, false); + pio_sm_set_consecutive_pindirs(SCSI_PIO, SCSI_SM, SCSI_OUT_ACK, 1, true); iobank0_hw->io[SCSI_IO_DB0].ctrl = GPIO_FUNC_SIO; iobank0_hw->io[SCSI_IO_DB1].ctrl = GPIO_FUNC_SIO; @@ -81,6 +84,7 @@ static void scsi_accel_host_config_gpio() iobank0_hw->io[SCSI_IO_DB6].ctrl = GPIO_FUNC_SIO; iobank0_hw->io[SCSI_IO_DB7].ctrl = GPIO_FUNC_SIO; iobank0_hw->io[SCSI_IO_DBP].ctrl = GPIO_FUNC_SIO; + iobank0_hw->io[SCSI_IN_REQ].ctrl = GPIO_FUNC_SIO; iobank0_hw->io[SCSI_OUT_ACK].ctrl = GPIO_FUNC_PIO0; } } diff --git a/lib/ZuluSCSI_platform_RP2040/scsi_accel_host_Pico.pio b/lib/ZuluSCSI_platform_RP2040/scsi_accel_host_Pico.pio index c279b5a8..1f495b9a 100644 --- a/lib/ZuluSCSI_platform_RP2040/scsi_accel_host_Pico.pio +++ b/lib/ZuluSCSI_platform_RP2040/scsi_accel_host_Pico.pio @@ -25,8 +25,8 @@ ; - 8: DBP ; Side set is ACK pin -.define REQ 9 -.define ACK 10 +.define REQ 17 +.define ACK 26 ; Read from SCSI bus using asynchronous handshake. ; Data is returned as 16-bit words that contain the 8 data bits + 1 parity bit. diff --git a/lib/ZuluSCSI_platform_RP2040/scsi_accel_host_Pico.pio.h b/lib/ZuluSCSI_platform_RP2040/scsi_accel_host_Pico.pio.h index ba286f2f..1734cc3f 100644 --- a/lib/ZuluSCSI_platform_RP2040/scsi_accel_host_Pico.pio.h +++ b/lib/ZuluSCSI_platform_RP2040/scsi_accel_host_Pico.pio.h @@ -19,10 +19,10 @@ static const uint16_t scsi_host_async_read_program_instructions[] = { // .wrap_target 0x90a0, // 0: pull block side 1 0xb027, // 1: mov x, osr side 1 - 0x3009, // 2: wait 0 gpio, 9 side 1 + 0x3011, // 2: wait 0 gpio, 17 side 1 0x4009, // 3: in pins, 9 side 0 0x4067, // 4: in null, 7 side 0 - 0x2089, // 5: wait 1 gpio, 9 side 0 + 0x2091, // 5: wait 1 gpio, 17 side 0 0x1042, // 6: jmp x--, 2 side 1 // .wrap }; @@ -41,4 +41,3 @@ static inline pio_sm_config scsi_host_async_read_program_get_default_config(uint return c; } #endif - From 354456b0a86f68c1a52960fbfbccd8a8b99d3d38 Mon Sep 17 00:00:00 2001 From: Morio Date: Tue, 12 Sep 2023 15:26:18 -0700 Subject: [PATCH 5/5] Target all boards for GitHub workflow The workflow specifically targeted the Pico firmware. Now that separate development is over, building all targets. --- .github/workflows/firmware_build.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.github/workflows/firmware_build.yml b/.github/workflows/firmware_build.yml index 5287261b..0358af58 100644 --- a/.github/workflows/firmware_build.yml +++ b/.github/workflows/firmware_build.yml @@ -24,7 +24,7 @@ jobs: - name: Build firmware run: | cd ZuluSCSI - pio run -v -e ZuluSCSI_Pico + pio run -v - name: Rename firmware files run: |