struct_learn reaches assertion error

[guyvdbroeck]

vtree = Vtree(784, :balanced);
init_circuit = fully_factorized_circuit(StructLogicCircuit,vtree)
struct_learn(init_circuit; stop=x->false)

eventually gives

ERROR: AssertionError: GateType(or) isa ⋁Gate && (GateType(and) isa ⋀Gate && and in children(or))
Stacktrace:
 [1] split(::PlainStruct⋁Node, ::Tuple{PlainStruct⋁Node,PlainStruct⋁Node}, ::UInt32; depth::Int64, sanity_check::Bool) at /home/guyvdb/space/.julia/dev/LogicCircuits/src/transformations.jl:209
 [2] split_step(::PlainStruct⋁Node; loss::typeof(random_split), depth::Int64, sanity_check::Bool) at /home/guyvdb/space/.julia/dev/LogicCircuits/src/transformations.jl:329
 [3] struct_learn(::PlainStruct⋁Node; primitives::Array{typeof(split_step),1}, kwargs::Dict{typeof(split_step),NamedTuple{(:loss, :depth),Tuple{typeof(random_split),Int64}}}, maxiter::Int64, stop::var"#1#2") at /home/guyvdb/space/.julia/dev/LogicCircuits/src/transformations.jl:343
 [4] top-level scope at REPL[8]:1

[YitaoLiang]

In the process of trying to reproduce this error.
It seems like the initial structure cannot be properly saved.

[guyvdbroeck]

(I can no longer reproduce the issue, it may have been accidentally fixed)

[khosravipasha]

@MhDang @guyvdbroeck @YitaoLiang
this seems to be fixed, should I close it?